|
1 | | -NATIVE INT8 3 0 1 2 |
2 | | -NATIVE UINT8 3 0 1 2 |
3 | | -NATIVE INT16 6 0 1 2 |
4 | | -NATIVE UINT16 6 0 1 2 |
5 | | -NATIVE INT32 12 0 1 2 |
6 | | -NATIVE UINT32 12 0 1 2 |
7 | | -NATIVE INT64 24 0 1 2 |
8 | | -NATIVE UINT64 24 0 1 2 |
9 | | -LITTLE_ENDIAN INT8 3 0 1 2 |
10 | | -LITTLE_ENDIAN UINT8 3 0 1 2 |
11 | | -LITTLE_ENDIAN INT16 6 0 1 2 |
12 | | -LITTLE_ENDIAN UINT16 6 0 1 2 |
13 | | -LITTLE_ENDIAN INT32 12 0 1 2 |
14 | | -LITTLE_ENDIAN UINT32 12 0 1 2 |
15 | | -LITTLE_ENDIAN INT64 24 0 1 2 |
16 | | -LITTLE_ENDIAN UINT64 24 0 1 2 |
17 | | -BIG_ENDIAN INT8 3 0 1 2 |
18 | | -BIG_ENDIAN UINT8 3 0 1 2 |
19 | | -BIG_ENDIAN INT16 6 0 1 2 |
20 | | -BIG_ENDIAN UINT16 6 0 1 2 |
21 | | -BIG_ENDIAN INT32 12 0 1 2 |
22 | | -BIG_ENDIAN UINT32 12 0 1 2 |
23 | | -BIG_ENDIAN INT64 24 0 1 2 |
24 | | -BIG_ENDIAN UINT64 24 0 1 2 |
| 1 | +NATIVE INT8 5 -2 -1 0 1 2 |
| 2 | +NATIVE UINT8 5 254 255 0 1 2 |
| 3 | +NATIVE INT16 10 -2 -1 0 1 2 |
| 4 | +NATIVE UINT16 10 65534 65535 0 1 2 |
| 5 | +NATIVE INT32 20 -2 -1 0 1 2 |
| 6 | +NATIVE UINT32 20 4294967294 4294967295 0 1 2 |
| 7 | +NATIVE INT64 40 -2 -1 0 1 2 |
| 8 | +NATIVE UINT64 40 18446744073709551614 18446744073709551615 0 1 2 |
| 9 | +LITTLE_ENDIAN INT8 5 -2 -1 0 1 2 |
| 10 | +LITTLE_ENDIAN UINT8 5 254 255 0 1 2 |
| 11 | +LITTLE_ENDIAN INT16 10 -2 -1 0 1 2 |
| 12 | +LITTLE_ENDIAN UINT16 10 65534 65535 0 1 2 |
| 13 | +LITTLE_ENDIAN INT32 20 -2 -1 0 1 2 |
| 14 | +LITTLE_ENDIAN UINT32 20 4294967294 4294967295 0 1 2 |
| 15 | +LITTLE_ENDIAN INT64 40 -2 -1 0 1 2 |
| 16 | +LITTLE_ENDIAN UINT64 40 18446744073709551614 18446744073709551615 0 1 2 |
| 17 | +BIG_ENDIAN INT8 5 -2 -1 0 1 2 |
| 18 | +BIG_ENDIAN UINT8 5 254 255 0 1 2 |
| 19 | +BIG_ENDIAN INT16 10 -2 -1 0 1 2 |
| 20 | +BIG_ENDIAN UINT16 10 65534 65535 0 1 2 |
| 21 | +BIG_ENDIAN INT32 20 -2 -1 0 1 2 |
| 22 | +BIG_ENDIAN UINT32 20 4294967294 4294967295 0 1 2 |
| 23 | +BIG_ENDIAN INT64 40 -2 -1 0 1 2 |
| 24 | +BIG_ENDIAN UINT64 40 18446744073709551614 18446744073709551615 0 1 2 |
0 commit comments