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bkokoszxMarcin Maka
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Marcin Maka
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mailbox: deduplication of mailbox headers for cavs
Signed-off-by: Bartosz Kokoszko <bartoszx.kokoszko@linux.intel.com>
1 parent 53a63ea commit eae1d3a

8 files changed

Lines changed: 98 additions & 177 deletions

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‎src/platform/apollolake/include/platform/mailbox.h‎

Lines changed: 1 addition & 46 deletions
Original file line numberDiff line numberDiff line change
@@ -32,51 +32,6 @@
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#ifndef __INCLUDE_PLATFORM_MAILBOX__
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#define __INCLUDE_PLATFORM_MAILBOX__
3434

35-
#include <platform/memory.h>
36-
37-
38-
/*
39-
* The Window Region on Broxton HPSRAM is organised like this :-
40-
* +--------------------------------------------------------------------------+
41-
* | Offset | Region | Size |
42-
* +---------------------+----------------+-----------------------------------+
43-
* | SRAM_TRACE_BASE | Trace Buffer W3| SRAM_TRACE_SIZE |
44-
* +---------------------+----------------+-----------------------------------+
45-
* | SRAM_DEBUG_BASE | Debug data W2 | SRAM_DEBUG_SIZE |
46-
* +---------------------+----------------+-----------------------------------+
47-
* | SRAM_INBOX_BASE | Inbox W1 | SRAM_INBOX_SIZE |
48-
* +---------------------+----------------+-----------------------------------+
49-
* | SRAM_OUTBOX_BASE | Outbox W0 | SRAM_MAILBOX_SIZE |
50-
* +---------------------+----------------+-----------------------------------+
51-
* | SRAM_SW_REG_BASE | SW Registers W0| SRAM_SW_REG_SIZE |
52-
* +---------------------+----------------+-----------------------------------+
53-
*/
54-
55-
/* window 3 - trace */
56-
#define MAILBOX_TRACE_SIZE SRAM_TRACE_SIZE
57-
#define MAILBOX_TRACE_BASE SRAM_TRACE_BASE
58-
59-
/* window 2 debug, exception and stream */
60-
#define MAILBOX_DEBUG_SIZE SRAM_DEBUG_SIZE
61-
#define MAILBOX_DEBUG_BASE SRAM_DEBUG_BASE
62-
63-
#define MAILBOX_EXCEPTION_SIZE SRAM_EXCEPT_SIZE
64-
#define MAILBOX_EXCEPTION_BASE SRAM_EXCEPT_BASE
65-
#define MAILBOX_EXCEPTION_OFFSET SRAM_DEBUG_SIZE
66-
67-
#define MAILBOX_STREAM_SIZE SRAM_STREAM_SIZE
68-
#define MAILBOX_STREAM_BASE SRAM_STREAM_BASE
69-
#define MAILBOX_STREAM_OFFSET (SRAM_DEBUG_SIZE + SRAM_EXCEPT_SIZE)
70-
71-
/* window 1 inbox/downlink and FW registers */
72-
#define MAILBOX_HOSTBOX_SIZE SRAM_INBOX_SIZE
73-
#define MAILBOX_HOSTBOX_BASE SRAM_INBOX_BASE
74-
75-
/* window 0 */
76-
#define MAILBOX_DSPBOX_SIZE SRAM_OUTBOX_SIZE
77-
#define MAILBOX_DSPBOX_BASE SRAM_OUTBOX_BASE
78-
79-
#define MAILBOX_SW_REG_SIZE SRAM_SW_REG_SIZE
80-
#define MAILBOX_SW_REG_BASE SRAM_SW_REG_BASE
35+
#include <cavs/mailbox.h>
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#endif

‎src/platform/cannonlake/include/platform/mailbox.h‎

Lines changed: 1 addition & 46 deletions
Original file line numberDiff line numberDiff line change
@@ -33,51 +33,6 @@
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#ifndef __INCLUDE_PLATFORM_MAILBOX__
3434
#define __INCLUDE_PLATFORM_MAILBOX__
3535

36-
#include <platform/memory.h>
37-
38-
39-
/*
40-
* The Window Region on Broxton HPSRAM is organised like this :-
41-
* +--------------------------------------------------------------------------+
42-
* | Offset | Region | Size |
43-
* +---------------------+----------------+-----------------------------------+
44-
* | SRAM_TRACE_BASE | Trace Buffer W3| SRAM_TRACE_SIZE |
45-
* +---------------------+----------------+-----------------------------------+
46-
* | SRAM_DEBUG_BASE | Debug data W2 | SRAM_DEBUG_SIZE |
47-
* +---------------------+----------------+-----------------------------------+
48-
* | SRAM_INBOX_BASE | Inbox W1 | SRAM_INBOX_SIZE |
49-
* +---------------------+----------------+-----------------------------------+
50-
* | SRAM_OUTBOX_BASE | Outbox W0 | SRAM_MAILBOX_SIZE |
51-
* +---------------------+----------------+-----------------------------------+
52-
* | SRAM_SW_REG_BASE | SW Registers W0| SRAM_SW_REG_SIZE |
53-
* +---------------------+----------------+-----------------------------------+
54-
*/
55-
56-
/* window 3 - trace */
57-
#define MAILBOX_TRACE_SIZE SRAM_TRACE_SIZE
58-
#define MAILBOX_TRACE_BASE SRAM_TRACE_BASE
59-
60-
/* window 2 debug, exception and stream */
61-
#define MAILBOX_DEBUG_SIZE SRAM_DEBUG_SIZE
62-
#define MAILBOX_DEBUG_BASE SRAM_DEBUG_BASE
63-
64-
#define MAILBOX_EXCEPTION_SIZE SRAM_EXCEPT_SIZE
65-
#define MAILBOX_EXCEPTION_BASE SRAM_EXCEPT_BASE
66-
#define MAILBOX_EXCEPTION_OFFSET SRAM_DEBUG_SIZE
67-
68-
#define MAILBOX_STREAM_SIZE SRAM_STREAM_SIZE
69-
#define MAILBOX_STREAM_BASE SRAM_STREAM_BASE
70-
#define MAILBOX_STREAM_OFFSET (SRAM_DEBUG_SIZE + SRAM_EXCEPT_SIZE)
71-
72-
/* window 1 inbox/downlink and FW registers */
73-
#define MAILBOX_HOSTBOX_SIZE SRAM_INBOX_SIZE
74-
#define MAILBOX_HOSTBOX_BASE SRAM_INBOX_BASE
75-
76-
/* window 0 */
77-
#define MAILBOX_DSPBOX_SIZE SRAM_OUTBOX_SIZE
78-
#define MAILBOX_DSPBOX_BASE SRAM_OUTBOX_BASE
79-
80-
#define MAILBOX_SW_REG_SIZE SRAM_SW_REG_SIZE
81-
#define MAILBOX_SW_REG_BASE SRAM_SW_REG_BASE
36+
#include <cavs/mailbox.h>
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#endif

‎src/platform/icelake/include/platform/mailbox.h‎

Lines changed: 1 addition & 46 deletions
Original file line numberDiff line numberDiff line change
@@ -33,51 +33,6 @@
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#ifndef __INCLUDE_PLATFORM_MAILBOX__
3434
#define __INCLUDE_PLATFORM_MAILBOX__
3535

36-
#include <platform/memory.h>
37-
38-
39-
/*
40-
* The Window Region on Broxton HPSRAM is organised like this :-
41-
* +--------------------------------------------------------------------------+
42-
* | Offset | Region | Size |
43-
* +---------------------+----------------+-----------------------------------+
44-
* | SRAM_TRACE_BASE | Trace Buffer W3| SRAM_TRACE_SIZE |
45-
* +---------------------+----------------+-----------------------------------+
46-
* | SRAM_DEBUG_BASE | Debug data W2 | SRAM_DEBUG_SIZE |
47-
* +---------------------+----------------+-----------------------------------+
48-
* | SRAM_INBOX_BASE | Inbox W1 | SRAM_INBOX_SIZE |
49-
* +---------------------+----------------+-----------------------------------+
50-
* | SRAM_OUTBOX_BASE | Outbox W0 | SRAM_MAILBOX_SIZE |
51-
* +---------------------+----------------+-----------------------------------+
52-
* | SRAM_SW_REG_BASE | SW Registers W0| SRAM_SW_REG_SIZE |
53-
* +---------------------+----------------+-----------------------------------+
54-
*/
55-
56-
/* window 3 - trace */
57-
#define MAILBOX_TRACE_SIZE SRAM_TRACE_SIZE
58-
#define MAILBOX_TRACE_BASE SRAM_TRACE_BASE
59-
60-
/* window 2 debug, exception and stream */
61-
#define MAILBOX_DEBUG_SIZE SRAM_DEBUG_SIZE
62-
#define MAILBOX_DEBUG_BASE SRAM_DEBUG_BASE
63-
64-
#define MAILBOX_EXCEPTION_SIZE SRAM_EXCEPT_SIZE
65-
#define MAILBOX_EXCEPTION_BASE SRAM_EXCEPT_BASE
66-
#define MAILBOX_EXCEPTION_OFFSET SRAM_DEBUG_SIZE
67-
68-
#define MAILBOX_STREAM_SIZE SRAM_STREAM_SIZE
69-
#define MAILBOX_STREAM_BASE SRAM_STREAM_BASE
70-
#define MAILBOX_STREAM_OFFSET (SRAM_DEBUG_SIZE + SRAM_EXCEPT_SIZE)
71-
72-
/* window 1 inbox/downlink and FW registers */
73-
#define MAILBOX_HOSTBOX_SIZE SRAM_INBOX_SIZE
74-
#define MAILBOX_HOSTBOX_BASE SRAM_INBOX_BASE
75-
76-
/* window 0 */
77-
#define MAILBOX_DSPBOX_SIZE SRAM_OUTBOX_SIZE
78-
#define MAILBOX_DSPBOX_BASE SRAM_OUTBOX_BASE
79-
80-
#define MAILBOX_SW_REG_SIZE SRAM_SW_REG_SIZE
81-
#define MAILBOX_SW_REG_BASE SRAM_SW_REG_BASE
36+
#include <cavs/mailbox.h>
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#endif

‎src/platform/intel/cavs/CMakeLists.txt‎

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@@ -5,3 +5,5 @@ add_local_sources(sof
55
memory.c
66
pm_runtime.c
77
)
8+
9+
target_include_directories(sof_options INTERFACE ${PROJECT_SOURCE_DIR}/src/platform/intel/cavs/include)

‎src/platform/intel/cavs/include/cavs/mailbox.h‎

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1+
/*
2+
* Copyright (c) 2019, Intel Corporation
3+
* All rights reserved.
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*
5+
* Redistribution and use in source and binary forms, with or without
6+
* modification, are permitted provided that the following conditions are met:
7+
* * Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
9+
* * Redistributions in binary form must reproduce the above copyright
10+
* notice, this list of conditions and the following disclaimer in the
11+
* documentation and/or other materials provided with the distribution.
12+
* * Neither the name of the Intel Corporation nor the
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* names of its contributors may be used to endorse or promote products
14+
* derived from this software without specific prior written permission.
15+
*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18+
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19+
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
20+
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
21+
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
22+
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
23+
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
24+
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
25+
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
26+
* POSSIBILITY OF SUCH DAMAGE.
27+
*
28+
* Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
29+
* Keyon Jie <yang.jie@linux.intel.com>
30+
*/
31+
32+
#ifndef __INCLUDE_CAVS_MAILBOX__
33+
#define __INCLUDE_CAVS_MAILBOX__
34+
35+
#include <platform/memory.h>
36+
37+
/*
38+
* The Window Region on HPSRAM for cAVS platforms is organised like this :-
39+
* +--------------------------------------------------------------------------+
40+
* | Offset | Region | Size |
41+
* +---------------------+----------------+-----------------------------------+
42+
* | SRAM_TRACE_BASE | Trace Buffer W3| SRAM_TRACE_SIZE |
43+
* +---------------------+----------------+-----------------------------------+
44+
* | SRAM_DEBUG_BASE | Debug data W2 | SRAM_DEBUG_SIZE |
45+
* +---------------------+----------------+-----------------------------------+
46+
* | SRAM_INBOX_BASE | Inbox W1 | SRAM_INBOX_SIZE |
47+
* +---------------------+----------------+-----------------------------------+
48+
* | SRAM_OUTBOX_BASE | Outbox W0 | SRAM_MAILBOX_SIZE |
49+
* +---------------------+----------------+-----------------------------------+
50+
* | SRAM_SW_REG_BASE | SW Registers W0| SRAM_SW_REG_SIZE |
51+
* +---------------------+----------------+-----------------------------------+
52+
*
53+
* Note: For suecreek SRAM_SW_REG window does not exist - MAILBOX_SW_REG_BASE
54+
* and MAILBOX_SW_REG_BASE are equal to 0
55+
*/
56+
57+
/* window 3 - trace */
58+
#define MAILBOX_TRACE_SIZE SRAM_TRACE_SIZE
59+
#define MAILBOX_TRACE_BASE SRAM_TRACE_BASE
60+
61+
/* window 2 debug, exception and stream */
62+
#define MAILBOX_DEBUG_SIZE SRAM_DEBUG_SIZE
63+
#define MAILBOX_DEBUG_BASE SRAM_DEBUG_BASE
64+
65+
#define MAILBOX_EXCEPTION_SIZE SRAM_EXCEPT_SIZE
66+
#define MAILBOX_EXCEPTION_BASE SRAM_EXCEPT_BASE
67+
#define MAILBOX_EXCEPTION_OFFSET SRAM_DEBUG_SIZE
68+
69+
#define MAILBOX_STREAM_SIZE SRAM_STREAM_SIZE
70+
#define MAILBOX_STREAM_BASE SRAM_STREAM_BASE
71+
#define MAILBOX_STREAM_OFFSET (SRAM_DEBUG_SIZE + SRAM_EXCEPT_SIZE)
72+
73+
/* window 1 inbox/downlink and FW registers */
74+
#define MAILBOX_HOSTBOX_SIZE SRAM_INBOX_SIZE
75+
#define MAILBOX_HOSTBOX_BASE SRAM_INBOX_BASE
76+
77+
/* window 0 */
78+
#define MAILBOX_DSPBOX_SIZE SRAM_OUTBOX_SIZE
79+
#define MAILBOX_DSPBOX_BASE SRAM_OUTBOX_BASE
80+
81+
#define MAILBOX_SW_REG_SIZE SRAM_SW_REG_SIZE
82+
#define MAILBOX_SW_REG_BASE SRAM_SW_REG_BASE
83+
84+
#endif

‎src/platform/suecreek/include/platform/mailbox.h‎

Lines changed: 1 addition & 39 deletions
Original file line numberDiff line numberDiff line change
@@ -33,44 +33,6 @@
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#ifndef __INCLUDE_PLATFORM_MAILBOX__
3434
#define __INCLUDE_PLATFORM_MAILBOX__
3535

36-
#include <platform/memory.h>
37-
38-
/*
39-
* The Window Region on Suecreek HPSRAM is organised like this :-
40-
* +--------------------------------------------------------------------------+
41-
* | Offset | Region | Size |
42-
* +---------------------+----------------+-----------------------------------+
43-
* | SRAM_TRACE_BASE | Trace Buffer | SRAM_TRACE_SIZE |
44-
* +---------------------+----------------+-----------------------------------+
45-
* | SRAM_DEBUG_BASE | Debug data | SRAM_DEBUG_SIZE |
46-
* +---------------------+----------------+-----------------------------------+
47-
* | SRAM_INBOX_BASE | Inbox | SRAM_INBOX_SIZE |
48-
* +---------------------+----------------+-----------------------------------+
49-
* | SRAM_OUTBOX_BASE | Outbox | SRAM_MAILBOX_SIZE |
50-
* +---------------------+----------------+-----------------------------------+
51-
*/
52-
53-
#define MAILBOX_TRACE_SIZE SRAM_TRACE_SIZE
54-
#define MAILBOX_TRACE_BASE SRAM_TRACE_BASE
55-
56-
#define MAILBOX_DEBUG_SIZE SRAM_DEBUG_SIZE
57-
#define MAILBOX_DEBUG_BASE SRAM_DEBUG_BASE
58-
59-
#define MAILBOX_EXCEPTION_SIZE SRAM_EXCEPT_SIZE
60-
#define MAILBOX_EXCEPTION_BASE SRAM_EXCEPT_BASE
61-
#define MAILBOX_EXCEPTION_OFFSET SRAM_DEBUG_SIZE
62-
63-
#define MAILBOX_STREAM_SIZE SRAM_STREAM_SIZE
64-
#define MAILBOX_STREAM_BASE SRAM_STREAM_BASE
65-
#define MAILBOX_STREAM_OFFSET (SRAM_DEBUG_SIZE + SRAM_EXCEPT_SIZE)
66-
67-
#define MAILBOX_HOSTBOX_SIZE SRAM_INBOX_SIZE
68-
#define MAILBOX_HOSTBOX_BASE SRAM_INBOX_BASE
69-
70-
#define MAILBOX_DSPBOX_SIZE SRAM_OUTBOX_SIZE
71-
#define MAILBOX_DSPBOX_BASE SRAM_OUTBOX_BASE
72-
73-
#define MAILBOX_SW_REG_SIZE 0
74-
#define MAILBOX_SW_REG_BASE 0
36+
#include <cavs/mailbox.h>
7537

7638
#endif

‎src/platform/suecreek/include/platform/memory.h‎

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@@ -250,6 +250,10 @@
250250
#define SRAM_TRACE_BASE (SRAM_STREAM_BASE + SRAM_STREAM_SIZE)
251251
#define SRAM_TRACE_SIZE 0x1000
252252

253+
/* Suecreek HPSRAM does not have SW_REG window*/
254+
#define SRAM_SW_REG_BASE 0
255+
#define SRAM_SW_REG_SIZE 0
256+
253257
#define SOF_MAILBOX_SIZE (SRAM_INBOX_SIZE + SRAM_OUTBOX_SIZE \
254258
+ SRAM_DEBUG_SIZE + SRAM_EXCEPT_SIZE \
255259
+ SRAM_STREAM_SIZE + SRAM_TRACE_SIZE)

‎test/cmocka/CMakeLists.txt‎

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@@ -33,6 +33,10 @@ else()
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set(CMOCKA_INCLUDE_DIR ${source_dir}/include)
3434
endif()
3535

36+
if(CONFIG_CAVS)
37+
target_include_directories(sof_options INTERFACE ${PROJECT_SOURCE_DIR}/src/platform/intel/cavs/include)
38+
endif()
39+
3640
# linker script, just for log entries
3741
set(memory_mock_lds_in ${PROJECT_SOURCE_DIR}/test/cmocka/memory_mock.x.in)
3842
set(memory_mock_lds_out ${PROJECT_BINARY_DIR}/test/cmocka/memory_mock.x)

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