Add frozen PAJ7620 submodule and adjust firmware flash allocation

noqman · noqman · commit 51057e75d8f4 · 2025-12-22T04:32:10.000+08:00
diff --git a/.gitmodules b/.gitmodules
@@ -418,3 +418,6 @@
 [submodule "frozen/Adafruit_CircuitPython_OPT4048"]
 	path = frozen/Adafruit_CircuitPython_OPT4048
 	url = https://github.com/adafruit/Adafruit_CircuitPython_OPT4048.git
+[submodule "frozen/CircuitPython_edupico2_paj7620"]
+	path = frozen/CircuitPython_edupico2_paj7620
+	url = https://github.com/CytronTechnologies/CircuitPython_edupico2_paj7620.git
diff --git a/frozen/CircuitPython_edupico2_paj7620 b/frozen/CircuitPython_edupico2_paj7620
@@ -0,0 +1 @@
+Subproject commit 16a4d784724992862cffd594aeed8c627ecc18b3
diff --git a/ports/raspberrypi/boards/cytron_edu_pico_v2_2w/link.ld b/ports/raspberrypi/boards/cytron_edu_pico_v2_2w/link.ld
@@ -0,0 +1 @@
+firmware_size = 1532k;
diff --git a/ports/raspberrypi/boards/cytron_edu_pico_v2_2w/mpconfigboard.mk b/ports/raspberrypi/boards/cytron_edu_pico_v2_2w/mpconfigboard.mk
@@ -9,10 +9,10 @@ CHIP_FAMILY = rp2
 
 EXTERNAL_FLASH_DEVICES = "W25Q16JVxQ"
 
-CIRCUITPY__EVE = 1
-
 CIRCUITPY_SDCARDIO = 1
 
+CIRCUITPY__EVE = 1
+
 CIRCUITPY_CYW43 = 1
 CIRCUITPY_SSL = 1
 CIRCUITPY_HASHLIB = 1
@@ -21,6 +21,11 @@ CIRCUITPY_MDNS = 1
 CIRCUITPY_SOCKETPOOL = 1
 CIRCUITPY_WIFI = 1
 
+CIRCUITPY_MAX3421E = 0
+CIRCUITPY_ULAB = 0
+CIRCUITPY_ZLIB = 0
+CIRCUITPY_SSL_MBEDTLS = 0
+
 CFLAGS += \
     -DCYW43_PIN_WL_DYNAMIC=0 \
 	-DCYW43_DEFAULT_PIN_WL_HOST_WAKE=24 \
@@ -33,9 +38,6 @@ CFLAGS += \
 	-DCYW43_WL_GPIO_LED_PIN=0
 	-DCYW43_PIO_CLOCK_DIV_INT=3
 
-# Must be accompanied by a linker script change
-CFLAGS += -DCIRCUITPY_FIRMWARE_SIZE='(1536 * 1024)'
-
 # The default is -O3. Change to -O2 because the build was overflowing.
 OPTIMIZATION_FLAGS = -O2
 
@@ -46,9 +48,12 @@ FROZEN_MPY_DIRS += $(TOP)/frozen/Adafruit_CircuitPython_NeoPixel
 FROZEN_MPY_DIRS += $(TOP)/frozen/Adafruit_CircuitPython_Motor
 FROZEN_MPY_DIRS += $(TOP)/frozen/Adafruit_CircuitPython_SimpleIO
 FROZEN_MPY_DIRS += $(TOP)/frozen/Adafruit_CircuitPython_framebuf
+FROZEN_MPY_DIRS += $(TOP)/frozen/Adafruit_CircuitPython_OPT4048
 FROZEN_MPY_DIRS += $(TOP)/frozen/Adafruit_CircuitPython_SSD1306
 FROZEN_MPY_DIRS += $(TOP)/frozen/Adafruit_CircuitPython_DisplayIO_SSD1306
-FROZEN_MPY_DIRS += $(TOP)/frozen/Adafruit_CircuitPython_OPT4048
 FROZEN_MPY_DIRS += $(TOP)/frozen/Adafruit_CircuitPython_ImageLoad
 FROZEN_MPY_DIRS += $(TOP)/frozen/Adafruit_CircuitPython_AHTx0
 FROZEN_MPY_DIRS += $(TOP)/frozen/Adafruit_CircuitPython_HTTPServer
+FROZEN_MPY_DIRS += $(TOP)/frozen/CircuitPython_edupico2_paj7620
+
+CFLAGS += -DCIRCUITPY_FIRMWARE_SIZE='(1536 * 1024)'
