/*

* Copyright (C) 2008-2021 Apple Inc. All rights reserved.

* Copyright (C) 2010 MIPS Technologies, Inc. All rights reserved.

*

* Redistribution and use in source and binary forms, with or without

* modification, are permitted provided that the following conditions

* are met:

* 1. Redistributions of source code must retain the above copyright

* notice, this list of conditions and the following disclaimer.

* 2. Redistributions in binary form must reproduce the above copyright

* notice, this list of conditions and the following disclaimer in the

* documentation and/or other materials provided with the distribution.

*

* THIS SOFTWARE IS PROVIDED BY MIPS TECHNOLOGIES, INC. ``AS IS'' AND ANY

* EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE

* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR

* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL MIPS TECHNOLOGIES, INC. OR

* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,

* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,

* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR

* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY

* OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE

* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

*/

#pragma once

#if ENABLE(ASSEMBLER) && CPU(MIPS)

#include "MIPSAssembler.h"

#include "AbstractMacroAssembler.h"

namespace JSC {

using Assembler = TARGET_ASSEMBLER;

class MacroAssemblerMIPS : public AbstractMacroAssembler<Assembler> {

public:

typedef MIPSRegisters::FPRegisterID FPRegisterID;

static constexpr unsigned numGPRs = 32;

static constexpr unsigned numFPRs = 32;

MacroAssemblerMIPS()

: m_fixedWidth(false)

{

}

static bool isCompactPtrAlignedAddressOffset(ptrdiff_t value)

{

return value >= -2147483647 - 1 && value <= 2147483647;

}

inline bool isPowerOf2(int32_t v)

{

return hasOneBitSet(v);

}

inline int bitPosition(int32_t v)

{

return getLSBSet(v);

}

// For storing immediate number

static constexpr RegisterID immTempRegister = MIPSRegisters::t0;

// For storing data loaded from the memory

static constexpr RegisterID dataTempRegister = MIPSRegisters::t1;

// For storing address base

static constexpr RegisterID addrTempRegister = MIPSRegisters::t7;

// For storing compare result

static constexpr RegisterID cmpTempRegister = MIPSRegisters::t8;

// FP temp register

static constexpr FPRegisterID fpTempRegister = MIPSRegisters::f16;

RegisterID scratchRegister() { return dataTempRegister; }

static constexpr int MaximumCompactPtrAlignedAddressOffset = 0x7FFFFFFF;

enum RelationalCondition {

Equal,

NotEqual,

Above,

AboveOrEqual,

Below,

BelowOrEqual,

GreaterThan,

GreaterThanOrEqual,

LessThan,

LessThanOrEqual

};

enum ResultCondition {

Overflow,

Signed,

PositiveOrZero,

Zero,

NonZero

};

enum DoubleCondition {

DoubleEqualAndOrdered,

DoubleNotEqualAndOrdered,

DoubleGreaterThanAndOrdered,

DoubleGreaterThanOrEqualAndOrdered,

DoubleLessThanAndOrdered,

DoubleLessThanOrEqualAndOrdered,

DoubleEqualOrUnordered,

DoubleNotEqualOrUnordered,

DoubleGreaterThanOrUnordered,

DoubleGreaterThanOrEqualOrUnordered,

DoubleLessThanOrUnordered,

DoubleLessThanOrEqualOrUnordered

};

enum class LoadAddressMode {

ScaleAndAddOffsetIfOffsetIsOutOfBounds,

Scale

};

static constexpr RegisterID stackPointerRegister = MIPSRegisters::sp;

static constexpr RegisterID framePointerRegister = MIPSRegisters::fp;

static constexpr RegisterID returnAddressRegister = MIPSRegisters::ra;

// Integer arithmetic operations:

//

// Operations are typically two operand - operation(source, srcDst)

// For many operations the source may be an TrustedImm32, the srcDst operand

// may often be a memory location (explictly described using an Address

// object).

void add32(RegisterID src, RegisterID dest)

{

m_assembler.addu(dest, dest, src);

}

void add32(RegisterID op1, RegisterID op2, RegisterID dest)

{

m_assembler.addu(dest, op1, op2);

}

void add32(TrustedImm32 imm, RegisterID dest)

{

add32(imm, dest, dest);

}

void add32(TrustedImm32 imm, RegisterID src, RegisterID dest)

{

if (imm.m_value >= -32768 && imm.m_value <= 32767

&& !m_fixedWidth) {

/*

addiu dest, src, imm

*/

m_assembler.addiu(dest, src, imm.m_value);

} else {

/*

li immTemp, imm

addu dest, src, immTemp

*/

move(imm, immTempRegister);

m_assembler.addu(dest, src, immTempRegister);

}

}

void add32(RegisterID src, TrustedImm32 imm, RegisterID dest)

{

add32(imm, src, dest);

}

void add32(TrustedImm32 imm, Address address)

{

if (address.offset >= -32768 && address.offset <= 32767

&& !m_fixedWidth) {

/*

lw dataTemp, offset(base)

li immTemp, imm

addu dataTemp, dataTemp, immTemp

sw dataTemp, offset(base)

*/

m_assembler.lw(dataTempRegister, address.base, address.offset);

if (imm.m_value >= -32768 && imm.m_value <= 32767

&& !m_fixedWidth)

m_assembler.addiu(dataTempRegister, dataTempRegister, imm.m_value);

else {

move(imm, immTempRegister);

m_assembler.addu(dataTempRegister, dataTempRegister, immTempRegister);

}

m_assembler.sw(dataTempRegister, address.base, address.offset);

} else {

/*

lui addrTemp, (offset + 0x8000) >> 16

addu addrTemp, addrTemp, base

lw dataTemp, (offset & 0xffff)(addrTemp)

li immtemp, imm

addu dataTemp, dataTemp, immTemp

sw dataTemp, (offset & 0xffff)(addrTemp)

*/

m_assembler.lui(addrTempRegister, (address.offset + 0x8000) >> 16);

m_assembler.addu(addrTempRegister, addrTempRegister, address.base);

m_assembler.lw(dataTempRegister, addrTempRegister, address.offset);

if (imm.m_value >= -32768 && imm.m_value <= 32767 && !m_fixedWidth)

m_assembler.addiu(dataTempRegister, dataTempRegister, imm.m_value);

else {

move(imm, immTempRegister);

m_assembler.addu(dataTempRegister, dataTempRegister, immTempRegister);

}

m_assembler.sw(dataTempRegister, addrTempRegister, address.offset);

}

}

void add32(Address src, RegisterID dest)

{

load32(src, dataTempRegister);

add32(dataTempRegister, dest);

}

void add32(AbsoluteAddress src, RegisterID dest)

{

load32(src.m_ptr, dataTempRegister);

add32(dataTempRegister, dest);

}

void add32(RegisterID src, Address dest)

{

if (dest.offset >= -32768 && dest.offset <= 32767 && !m_fixedWidth) {

/*

lw dataTemp, offset(base)

addu dataTemp, dataTemp, src

sw dataTemp, offset(base)

*/

m_assembler.lw(dataTempRegister, dest.base, dest.offset);

m_assembler.addu(dataTempRegister, dataTempRegister, src);

m_assembler.sw(dataTempRegister, dest.base, dest.offset);

} else {

/*

lui addrTemp, (offset + 0x8000) >> 16

addu addrTemp, addrTemp, base

lw dataTemp, (offset & 0xffff)(addrTemp)

addu dataTemp, dataTemp, src

sw dataTemp, (offset & 0xffff)(addrTemp)

*/

m_assembler.lui(addrTempRegister, (dest.offset + 0x8000) >> 16);

m_assembler.addu(addrTempRegister, addrTempRegister, dest.base);

m_assembler.lw(dataTempRegister, addrTempRegister, dest.offset);

m_assembler.addu(dataTempRegister, dataTempRegister, src);

m_assembler.sw(dataTempRegister, addrTempRegister, dest.offset);

}

}

void add32(TrustedImm32 imm, AbsoluteAddress address)

{

if (!m_fixedWidth) {

uintptr_t adr = reinterpret_cast<uintptr_t>(address.m_ptr);

m_assembler.lui(addrTempRegister, (adr + 0x8000) >> 16);

m_assembler.lw(cmpTempRegister, addrTempRegister, adr & 0xffff);

if (imm.m_value >= -32768 && imm.m_value <= 32767)

m_assembler.addiu(dataTempRegister, cmpTempRegister, imm.m_value);

else {

move(imm, immTempRegister);

m_assembler.addu(dataTempRegister, cmpTempRegister, immTempRegister);

}

m_assembler.sw(dataTempRegister, addrTempRegister, adr & 0xffff);

} else {

/*

li addrTemp, address

li immTemp, imm

lw cmpTemp, 0(addrTemp)

addu dataTemp, cmpTemp, immTemp

sw dataTemp, 0(addrTemp)

*/

move(TrustedImmPtr(address.m_ptr), addrTempRegister);

m_assembler.lw(cmpTempRegister, addrTempRegister, 0);

move(imm, immTempRegister);

m_assembler.addu(dataTempRegister, cmpTempRegister, immTempRegister);

m_assembler.sw(dataTempRegister, addrTempRegister, 0);

}

}

void add64(TrustedImm32 imm, AbsoluteAddress address)

{

if (!m_fixedWidth) {

uintptr_t adr = reinterpret_cast<uintptr_t>(address.m_ptr);

if ((adr >> 15) == ((adr + 4) >> 15)) {

m_assembler.lui(addrTempRegister, (adr + 0x8000) >> 16);

m_assembler.lw(cmpTempRegister, addrTempRegister, adr & 0xffff);

if (imm.m_value >= -32768 && imm.m_value <= 32767)

m_assembler.addiu(dataTempRegister, cmpTempRegister, imm.m_value);

else {

move(imm, immTempRegister);

m_assembler.addu(dataTempRegister, cmpTempRegister, immTempRegister);

}

m_assembler.sw(dataTempRegister, addrTempRegister, adr & 0xffff);

m_assembler.sltu(immTempRegister, dataTempRegister, cmpTempRegister);

m_assembler.lw(dataTempRegister, addrTempRegister, (adr + 4) & 0xffff);

if (imm.m_value >> 31)

m_assembler.addiu(dataTempRegister, dataTempRegister, -1);

m_assembler.addu(dataTempRegister, dataTempRegister, immTempRegister);

m_assembler.sw(dataTempRegister, addrTempRegister, (adr + 4) & 0xffff);

return;

}

}

/*

add32(imm, address)

sltu immTemp, dataTemp, cmpTemp # set carry-in bit

lw dataTemp, 4(addrTemp)

addiu dataTemp, imm.m_value >> 31 ? -1 : 0

addu dataTemp, dataTemp, immTemp

sw dataTemp, 4(addrTemp)

*/

move(TrustedImmPtr(address.m_ptr), addrTempRegister);

m_assembler.lw(cmpTempRegister, addrTempRegister, 0);

if (imm.m_value >= -32768 && imm.m_value <= 32767 && !m_fixedWidth)

m_assembler.addiu(dataTempRegister, cmpTempRegister, imm.m_value);

else {

move(imm, immTempRegister);

m_assembler.addu(dataTempRegister, cmpTempRegister, immTempRegister);

}

m_assembler.sw(dataTempRegister, addrTempRegister, 0);

m_assembler.sltu(immTempRegister, dataTempRegister, cmpTempRegister);

m_assembler.lw(dataTempRegister, addrTempRegister, 4);

if (imm.m_value >> 31)

m_assembler.addiu(dataTempRegister, dataTempRegister, -1);

m_assembler.addu(dataTempRegister, dataTempRegister, immTempRegister);

m_assembler.sw(dataTempRegister, addrTempRegister, 4);

}

void loadAddress(BaseIndex address, LoadAddressMode mode)

{

if (mode == LoadAddressMode::ScaleAndAddOffsetIfOffsetIsOutOfBounds) {

if (!address.scale)

m_assembler.addu(addrTempRegister, address.index, address.base);

else {

m_assembler.sll(addrTempRegister, address.index, address.scale);

m_assembler.addu(addrTempRegister, addrTempRegister, address.base);

}

if (address.offset < -32768 || address.offset > 32767) {

m_assembler.lui(immTempRegister, (address.offset + 0x8000) >> 16);

m_assembler.addu(addrTempRegister, addrTempRegister, immTempRegister);

}

} else {

if (!address.scale)

m_assembler.addu(addrTempRegister, address.index, address.base);

else {

m_assembler.sll(addrTempRegister, address.index, address.scale);

m_assembler.addu(addrTempRegister, addrTempRegister, address.base);

}

}

}

void getEffectiveAddress(BaseIndex address, RegisterID dest)

{

if (!address.scale && !m_fixedWidth)

m_assembler.addu(dest, address.index, address.base);

else {

m_assembler.sll(addrTempRegister, address.index, address.scale);

m_assembler.addu(dest, addrTempRegister, address.base);

}

if (address.offset)

add32(TrustedImm32(address.offset), dest);

}

void and16(Address src, RegisterID dest)

{

load16(src, dataTempRegister);

and32(dataTempRegister, dest);

}

void and32(Address src, RegisterID dest)

{

load32(src, dataTempRegister);

and32(dataTempRegister, dest);

}

void and32(RegisterID src, RegisterID dest)

{

m_assembler.andInsn(dest, dest, src);

}

void and32(RegisterID op1, RegisterID op2, RegisterID dest)

{

m_assembler.andInsn(dest, op1, op2);

}

void and32(TrustedImm32 imm, RegisterID dest)

{

if (!imm.m_value && !m_fixedWidth)

move(MIPSRegisters::zero, dest);

else if (imm.m_value > 0 && imm.m_value <= 65535 && !m_fixedWidth)

m_assembler.andi(dest, dest, imm.m_value);

else {

/*

li immTemp, imm

and dest, dest, immTemp

*/

move(imm, immTempRegister);

m_assembler.andInsn(dest, dest, immTempRegister);

}

}

void and32(TrustedImm32 imm, RegisterID src, RegisterID dest)

{

if (!imm.m_value && !m_fixedWidth)

move(MIPSRegisters::zero, dest);

else if (imm.m_value > 0 && imm.m_value <= 65535 && !m_fixedWidth)

m_assembler.andi(dest, src, imm.m_value);

else {

move(imm, immTempRegister);

m_assembler.andInsn(dest, src, immTempRegister);

}

}

void countLeadingZeros32(RegisterID src, RegisterID dest)

{

#if WTF_MIPS_ISA_AT_LEAST(32)

m_assembler.clz(dest, src);

#else

static_assert(false, "CLZ opcode is not available for this ISA");

#endif

}

void lshift32(RegisterID shiftAmount, RegisterID dest)

{

m_assembler.sllv(dest, dest, shiftAmount);

}

void lshift32(RegisterID src, RegisterID shiftAmount, RegisterID dest)

{

m_assembler.sllv(dest, src, shiftAmount);

}

void lshift32(TrustedImm32 imm, RegisterID dest)

{

m_assembler.sll(dest, dest, imm.m_value);

}

void lshift32(RegisterID src, TrustedImm32 imm, RegisterID dest)

{

m_assembler.sll(dest, src, imm.m_value);

}

void mul32(RegisterID src, RegisterID dest)

{

m_assembler.mul(dest, dest, src);

}

void mul32(RegisterID op1, RegisterID op2, RegisterID dest)

{

m_assembler.mul(dest, op1, op2);

}

void mul32(TrustedImm32 imm, RegisterID src, RegisterID dest)

{

if (!imm.m_value && !m_fixedWidth)

move(MIPSRegisters::zero, dest);

else if (imm.m_value == 1 && !m_fixedWidth)

move(src, dest);

else {

/*

li dataTemp, imm

mul dest, src, dataTemp

*/

move(imm, dataTempRegister);

m_assembler.mul(dest, src, dataTempRegister);

}

}

void neg32(RegisterID srcDest)

{

m_assembler.subu(srcDest, MIPSRegisters::zero, srcDest);

}

void neg32(RegisterID src, RegisterID dest)

{

m_assembler.subu(dest, MIPSRegisters::zero, src);

}

void or8(TrustedImm32 imm, AbsoluteAddress dest)

{

if (!imm.m_value && !m_fixedWidth)

return;

if (m_fixedWidth) {

load8(dest.m_ptr, immTempRegister);

or32(imm, immTempRegister);

store8(immTempRegister, dest.m_ptr);

} else {

uintptr_t adr = reinterpret_cast<uintptr_t>(dest.m_ptr);

m_assembler.lui(addrTempRegister, (adr + 0x8000) >> 16);

m_assembler.lbu(immTempRegister, addrTempRegister, adr & 0xffff);

or32(imm, immTempRegister);

m_assembler.sb(immTempRegister, addrTempRegister, adr & 0xffff);

}

}

void or16(TrustedImm32 imm, AbsoluteAddress dest)

{

if (!imm.m_value && !m_fixedWidth)

return;

if (m_fixedWidth) {

// TODO: Swap dataTempRegister and immTempRegister usage

load16(dest.m_ptr, immTempRegister);

or32(imm, immTempRegister);

store16(immTempRegister, dest.m_ptr);

} else {

uintptr_t adr = reinterpret_cast<uintptr_t>(dest.m_ptr);

m_assembler.lui(addrTempRegister, (adr + 0x8000) >> 16);

m_assembler.lhu(immTempRegister, addrTempRegister, adr & 0xffff);

or32(imm, immTempRegister);

m_assembler.sh(immTempRegister, addrTempRegister, adr & 0xffff);

}

}

void or32(RegisterID src, RegisterID dest)

{

m_assembler.orInsn(dest, dest, src);

}

void or32(RegisterID op1, RegisterID op2, RegisterID dest)

{

m_assembler.orInsn(dest, op1, op2);

}

void or32(TrustedImm32 imm, AbsoluteAddress dest)

{

if (!imm.m_value && !m_fixedWidth)

return;

if (m_fixedWidth) {

// TODO: Swap dataTempRegister and immTempRegister usage

load32(dest.m_ptr, immTempRegister);

or32(imm, immTempRegister);

store32(immTempRegister, dest.m_ptr);

} else {

uintptr_t adr = reinterpret_cast<uintptr_t>(dest.m_ptr);

m_assembler.lui(addrTempRegister, (adr + 0x8000) >> 16);

m_assembler.lw(immTempRegister, addrTempRegister, adr & 0xffff);

or32(imm, immTempRegister);

m_assembler.sw(immTempRegister, addrTempRegister, adr & 0xffff);

}

}

void or32(TrustedImm32 imm, RegisterID dest)

{

if (!imm.m_value && !m_fixedWidth)

return;

if (imm.m_value > 0 && imm.m_value <= 65535

&& !m_fixedWidth) {

m_assembler.ori(dest, dest, imm.m_value);

return;

}

/*

li dataTemp, imm

or dest, dest, dataTemp

*/

move(imm, dataTempRegister);

m_assembler.orInsn(dest, dest, dataTempRegister);

}

void or32(TrustedImm32 imm, RegisterID src, RegisterID dest)

{

if (!imm.m_value && !m_fixedWidth) {

move(src, dest);

return;

}

if (imm.m_value > 0 && imm.m_value <= 65535 && !m_fixedWidth) {

m_assembler.ori(dest, src, imm.m_value);

return;

}

/*

li dataTemp, imm

or dest, src, dataTemp

*/

move(imm, dataTempRegister);

m_assembler.orInsn(dest, src, dataTempRegister);

}

void or32(RegisterID src, AbsoluteAddress dest)

{

if (m_fixedWidth) {

load32(dest.m_ptr, dataTempRegister);

m_assembler.orInsn(dataTempRegister, dataTempRegister, src);

store32(dataTempRegister, dest.m_ptr);

} else {

uintptr_t adr = reinterpret_cast<uintptr_t>(dest.m_ptr);

m_assembler.lui(addrTempRegister, (adr + 0x8000) >> 16);

m_assembler.lw(dataTempRegister, addrTempRegister, adr & 0xffff);

m_assembler.orInsn(dataTempRegister, dataTempRegister, src);

m_assembler.sw(dataTempRegister, addrTempRegister, adr & 0xffff);

}

}

void or32(TrustedImm32 imm, Address address)

{

if (address.offset >= -32768 && address.offset <= 32767

&& !m_fixedWidth) {

/*

lw dataTemp, offset(base)

li immTemp, imm

or dataTemp, dataTemp, immTemp

sw dataTemp, offset(base)

*/

m_assembler.lw(dataTempRegister, address.base, address.offset);

if (imm.m_value >= 0 && imm.m_value <= 65535 && !m_fixedWidth)

m_assembler.ori(dataTempRegister, dataTempRegister, imm.m_value);

else {

move(imm, immTempRegister);

m_assembler.orInsn(dataTempRegister, dataTempRegister, immTempRegister);

}

m_assembler.sw(dataTempRegister, address.base, address.offset);

} else {

/*

lui addrTemp, (offset + 0x8000) >> 16

addu addrTemp, addrTemp, base

lw dataTemp, (offset & 0xffff)(addrTemp)

li immtemp, imm

or dataTemp, dataTemp, immTemp

sw dataTemp, (offset & 0xffff)(addrTemp)

*/

m_assembler.lui(addrTempRegister, (address.offset + 0x8000) >> 16);

m_assembler.addu(addrTempRegister, addrTempRegister, address.base);

m_assembler.lw(dataTempRegister, addrTempRegister, address.offset);

if (imm.m_value >= 0 && imm.m_value <= 65535 && !m_fixedWidth)

m_assembler.ori(dataTempRegister, dataTempRegister, imm.m_value);

else {

move(imm, immTempRegister);

m_assembler.orInsn(dataTempRegister, dataTempRegister, immTempRegister);

}

m_assembler.sw(dataTempRegister, addrTempRegister, address.offset);

}

}

// This is only referenced by code intented for ARM64_32.

void rotateRight32(TrustedImm32, RegisterID)

{

UNREACHABLE_FOR_PLATFORM();

}

void rshift32(RegisterID shiftAmount, RegisterID dest)

{

m_assembler.srav(dest, dest, shiftAmount);

}

void rshift32(RegisterID src, RegisterID shiftAmount, RegisterID dest)

{

m_assembler.srav(dest, src, shiftAmount);

}

void rshift32(TrustedImm32 imm, RegisterID dest)

{

m_assembler.sra(dest, dest, imm.m_value);

}

void rshift32(RegisterID src, TrustedImm32 imm, RegisterID dest)

{

m_assembler.sra(dest, src, imm.m_value);

}

void urshift32(RegisterID shiftAmount, RegisterID dest)

{

m_assembler.srlv(dest, dest, shiftAmount);

}

void urshift32(RegisterID src, RegisterID shiftAmount, RegisterID dest)

{

m_assembler.srlv(dest, src, shiftAmount);

}

void urshift32(TrustedImm32 imm, RegisterID dest)

{

m_assembler.srl(dest, dest, imm.m_value);

}

void urshift32(RegisterID src, TrustedImm32 imm, RegisterID dest)

{

m_assembler.srl(dest, src, imm.m_value);

}

void sub32(RegisterID src, RegisterID dest)

{

m_assembler.subu(dest, dest, src);

}

void sub32(RegisterID op1, RegisterID op2, RegisterID dest)

{

m_assembler.subu(dest, op1, op2);

}

void sub32(TrustedImm32 imm, RegisterID dest)

{

if (imm.m_value >= -32767 && imm.m_value <= 32768

&& !m_fixedWidth) {

/*

addiu dest, src, imm

*/

m_assembler.addiu(dest, dest, -imm.m_value);

} else {

/*

li immTemp, imm

subu dest, src, immTemp

*/

move(imm, immTempRegister);

m_assembler.subu(dest, dest, immTempRegister);

}

}

void sub32(RegisterID src, TrustedImm32 imm, RegisterID dest)

{

if (imm.m_value >= -32767 && imm.m_value <= 32768

&& !m_fixedWidth) {

/*

addiu dest, src, imm

*/

m_assembler.addiu(dest, src, -imm.m_value);

} else {

/*

li immTemp, imm

subu dest, src, immTemp

*/

move(imm, immTempRegister);

m_assembler.subu(dest, src, immTempRegister);

}

}

void sub32(TrustedImm32 imm, Address address)

{

if (address.offset >= -32768 && address.offset <= 32767

&& !m_fixedWidth) {

/*

lw dataTemp, offset(base)

li immTemp, imm

subu dataTemp, dataTemp, immTemp

sw dataTemp, offset(base)

*/

m_assembler.lw(dataTempRegister, address.base, address.offset);

if (imm.m_value >= -32767 && imm.m_value <= 32768 && !m_fixedWidth)

m_assembler.addiu(dataTempRegister, dataTempRegister, -imm.m_value);

else {

move(imm, immTempRegister);

m_assembler.subu(dataTempRegister, dataTempRegister, immTempRegister);

}

m_assembler.sw(dataTempRegister, address.base, address.offset);

} else {

/*

lui addrTemp, (offset + 0x8000) >> 16

addu addrTemp, addrTemp, base

lw dataTemp, (offset & 0xffff)(addrTemp)

li immtemp, imm

subu dataTemp, dataTemp, immTemp

sw dataTemp, (offset & 0xffff)(addrTemp)

*/

m_assembler.lui(addrTempRegister, (address.offset + 0x8000) >> 16);

m_assembler.addu(addrTempRegister, addrTempRegister, address.base);

m_assembler.lw(dataTempRegister, addrTempRegister, address.offset);

if (imm.m_value >= -32767 && imm.m_value <= 32768

&& !m_fixedWidth)

m_assembler.addiu(dataTempRegister, dataTempRegister, -imm.m_value);

else {

move(imm, immTempRegister);

m_assembler.subu(dataTempRegister, dataTempRegister, immTempRegister);

}

m_assembler.sw(dataTempRegister, addrTempRegister, address.offset);

}

}

void sub32(Address src, RegisterID dest)

{

load32(src, dataTempRegister);

sub32(dataTempRegister, dest);

}

void sub32(TrustedImm32 imm, AbsoluteAddress address)

{

if (!m_fixedWidth) {

uintptr_t adr = reinterpret_cast<uintptr_t>(address.m_ptr);

m_assembler.lui(addrTempRegister, (adr + 0x8000) >> 16);

m_assembler.lw(cmpTempRegister, addrTempRegister, adr & 0xffff);

if (imm.m_value >= -32767 && imm.m_value <= 32768)

m_assembler.addiu(dataTempRegister, cmpTempRegister, -imm.m_value);

else {

move(imm, immTempRegister);

m_assembler.subu(dataTempRegister, cmpTempRegister, immTempRegister);

}

m_assembler.sw(dataTempRegister, addrTempRegister, adr & 0xffff);

} else {

/*

li addrTemp, address

lw dataTemp, 0(addrTemp)

li immTemp, imm

subu dataTemp, dataTemp, immTemp

sw dataTemp, 0(addrTemp)

*/

move(TrustedImmPtr(address.m_ptr), addrTempRegister);

m_assembler.lw(cmpTempRegister, addrTempRegister, 0);

move(imm, immTempRegister);

m_assembler.subu(dataTempRegister, cmpTempRegister, immTempRegister);

m_assembler.sw(dataTempRegister, addrTempRegister, 0);

}

}

void xor32(RegisterID src, RegisterID dest)

{

m_assembler.xorInsn(dest, dest, src);

}

void xor32(RegisterID op1, RegisterID op2, RegisterID dest)

{

m_assembler.xorInsn(dest, op1, op2);

}

void xor32(Address src, RegisterID dest)

{

load32(src, dataTempRegister);

xor32(dataTempRegister, dest);

}

void xor32(TrustedImm32 imm, RegisterID dest)

{

if (!m_fixedWidth) {

if (imm.m_value == -1) {

m_assembler.nor(dest, dest, MIPSRegisters::zero);

return;

}

if (imm.m_value >= 0 && imm.m_value <= 65535) {

m_assembler.xori(dest, dest, imm.m_value);

return;

}

}

/*

li immTemp, imm

xor dest, dest, immTemp

*/

move(imm, immTempRegister);

m_assembler.xorInsn(dest, dest, immTempRegister);

}

void xor32(TrustedImm32 imm, RegisterID src, RegisterID dest)

{

if (!m_fixedWidth) {

if (imm.m_value == -1) {

m_assembler.nor(dest, src, MIPSRegisters::zero);

return;

}

if (imm.m_value >= 0 && imm.m_value <= 65535) {

m_assembler.xori(dest, src, imm.m_value);

return;

}

}

/*

li immTemp, imm

xor dest, src, immTemp

*/

move(imm, immTempRegister);

m_assembler.xorInsn(dest, src, immTempRegister);

}

void not32(RegisterID srcDest)

{

m_assembler.nor(srcDest, srcDest, MIPSRegisters::zero);

}

void sqrtDouble(FPRegisterID src, FPRegisterID dst)

{

m_assembler.sqrtd(dst, src);

}

void absDouble(FPRegisterID src, FPRegisterID dst)

{

m_assembler.absd(dst, src);

}

NO_RETURN_DUE_TO_CRASH void ceilDouble(FPRegisterID, FPRegisterID)

{

ASSERT(!supportsFloatingPointRounding());

CRASH();

}

NO_RETURN_DUE_TO_CRASH void floorDouble(FPRegisterID, FPRegisterID)

{

ASSERT(!supportsFloatingPointRounding());

CRASH();

}

NO_RETURN_DUE_TO_CRASH void roundTowardZeroDouble(FPRegisterID, FPRegisterID)

{

ASSERT(!supportsFloatingPointRounding());

CRASH();

}

ConvertibleLoadLabel convertibleLoadPtr(Address address, RegisterID dest)

{

ConvertibleLoadLabel result(this);

/*

lui addrTemp, (offset + 0x8000) >> 16

addu addrTemp, addrTemp, base

lw dest, (offset & 0xffff)(addrTemp)

*/

m_assembler.lui(addrTempRegister, (address.offset + 0x8000) >> 16);

m_assembler.addu(addrTempRegister, addrTempRegister, address.base);

m_assembler.lw(dest, addrTempRegister, address.offset);

return result;

}

// Memory access operations:

//

// Loads are of the form load(address, destination) and stores of the form

// store(source, address). The source for a store may be an TrustedImm32. Address

// operand objects to loads and store will be implicitly constructed if a

// register is passed.

/* Need to use zero-extened load byte for load8. */

void load8(Address address, RegisterID dest)

{

if (address.offset >= -32768 && address.offset <= 32767

&& !m_fixedWidth)

m_assembler.lbu(dest, address.base, address.offset);

else {

/*

lui addrTemp, (offset + 0x8000) >> 16

addu addrTemp, addrTemp, base

lbu dest, (offset & 0xffff)(addrTemp)

*/

m_assembler.lui(addrTempRegister, (address.offset + 0x8000) >> 16);

m_assembler.addu(addrTempRegister, addrTempRegister, address.base);

m_assembler.lbu(dest, addrTempRegister, address.offset);

}

}

void load8(BaseIndex address, RegisterID dest)

{

if (!m_fixedWidth) {

loadAddress(address, LoadAddressMode::ScaleAndAddOffsetIfOffsetIsOutOfBounds);

m_assembler.lbu(dest, addrTempRegister, address.offset);

} else {

/*

sll addrTemp, address.index, address.scale

addu addrTemp, addrTemp, address.base

lui immTemp, (address.offset + 0x8000) >> 16

addu addrTemp, addrTemp, immTemp

lbu dest, (address.offset & 0xffff)(at)

*/

m_assembler.sll(addrTempRegister, address.index, address.scale);

m_assembler.addu(addrTempRegister, addrTempRegister, address.base);

m_assembler.lui(immTempRegister, (address.offset + 0x8000) >> 16);

m_assembler.addu(addrTempRegister, addrTempRegister, immTempRegister);

m_assembler.lbu(dest, addrTempRegister, address.offset);

}

}

ALWAYS_INLINE void load8(AbsoluteAddress address, RegisterID dest)

{

load8(address.m_ptr, dest);

}

void load8(const void* address, RegisterID dest)

{

if (m_fixedWidth) {

/*

li addrTemp, address

lbu dest, 0(addrTemp)

*/

move(TrustedImmPtr(address), addrTempRegister);

m_assembler.lbu(dest, addrTempRegister, 0);

} else {

uintptr_t adr = reinterpret_cast<uintptr_t>(address);

m_assembler.lui(addrTempRegister, (adr + 0x8000) >> 16);

m_assembler.lbu(dest, addrTempRegister, adr & 0xffff);

}

}

void load8SignedExtendTo32(Address address, RegisterID dest)

{

if (address.offset >= -32768 && address.offset <= 32767

&& !m_fixedWidth)

m_assembler.lb(dest, address.base, address.offset);

else {

/*

lui addrTemp, (offset + 0x8000) >> 16

addu addrTemp, addrTemp, base

lb dest, (offset & 0xffff)(addrTemp)

*/

m_assembler.lui(addrTempRegister, (address.offset + 0x8000) >> 16);

m_assembler.addu(addrTempRegister, addrTempRegister, address.base);

m_assembler.lb(dest, addrTempRegister, address.offset);

}

}

void load8SignedExtendTo32(BaseIndex address, RegisterID dest)

{

if (!m_fixedWidth) {

loadAddress(address, LoadAddressMode::ScaleAndAddOffsetIfOffsetIsOutOfBounds);

m_assembler.lb(dest, addrTempRegister, address.offset);