From 3dcad928cdd2ad0552393176ec261587eba3974f Mon Sep 17 00:00:00 2001 From: phuzzyday Date: Thu, 14 May 2026 18:35:43 -0600 Subject: [PATCH 1/3] Refactor PSRAM clock frequency handling Read clock speed before entering direct mode (flash access is unavailable while QMI direct mode is enabled) Signed-off-by: phuzzyday --- ports/rp2/rp2_psram.c | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/ports/rp2/rp2_psram.c b/ports/rp2/rp2_psram.c index bb063f4af7a06..022fd7607d8fd 100644 --- a/ports/rp2/rp2_psram.c +++ b/ports/rp2/rp2_psram.c @@ -119,6 +119,11 @@ size_t __no_inline_not_in_flash_func(psram_init)(uint cs_pin) { return 0; } + // Read clock speed before entering direct mode (flash access is + // unavailable while QMI direct mode is enabled) + const int max_psram_freq = 133000000; + const int clock_hz = clock_get_hz(clk_sys); + // Enable direct mode, PSRAM CS, clkdiv of 10. qmi_hw->direct_csr = 10 << QMI_DIRECT_CSR_CLKDIV_LSB | \ QMI_DIRECT_CSR_EN_BITS | \ @@ -138,8 +143,6 @@ size_t __no_inline_not_in_flash_func(psram_init)(uint cs_pin) { // Using an rxdelay equal to the divisor isn't enough when running the APS6404 close to 133MHz. // So: don't allow running at divisor 1 above 100MHz (because delay of 2 would be too late), // and add an extra 1 to the rxdelay if the divided clock is > 100MHz (i.e. sys clock > 200MHz). - const int max_psram_freq = 133000000; - const int clock_hz = clock_get_hz(clk_sys); int divisor = (clock_hz + max_psram_freq - 1) / max_psram_freq; if (divisor == 1 && clock_hz > 100000000) { divisor = 2; From 6436206c8d63f64becd3a3ac399c32b4d3cde981 Mon Sep 17 00:00:00 2001 From: phuzzyday Date: Thu, 14 May 2026 22:34:28 -0600 Subject: [PATCH 2/3] Remove redundant comment in rp2_psram.c Removed blank space Signed-off-by: phuzzyday --- ports/rp2/rp2_psram.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/ports/rp2/rp2_psram.c b/ports/rp2/rp2_psram.c index 022fd7607d8fd..38ec3deb47a48 100644 --- a/ports/rp2/rp2_psram.c +++ b/ports/rp2/rp2_psram.c @@ -123,8 +123,7 @@ size_t __no_inline_not_in_flash_func(psram_init)(uint cs_pin) { // unavailable while QMI direct mode is enabled) const int max_psram_freq = 133000000; const int clock_hz = clock_get_hz(clk_sys); - - // Enable direct mode, PSRAM CS, clkdiv of 10. + // Enable direct mode, PSRAM CS, clkdiv of 10. qmi_hw->direct_csr = 10 << QMI_DIRECT_CSR_CLKDIV_LSB | \ QMI_DIRECT_CSR_EN_BITS | \ QMI_DIRECT_CSR_AUTO_CS1N_BITS; From a21b9b0911a51fa021ea138c1c7e50db09cf044e Mon Sep 17 00:00:00 2001 From: phuzzyday Date: Thu, 14 May 2026 22:38:00 -0600 Subject: [PATCH 3/3] Fix formatting of comments in rp2_psram.c Signed-off-by: phuzzyday --- ports/rp2/rp2_psram.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/ports/rp2/rp2_psram.c b/ports/rp2/rp2_psram.c index 38ec3deb47a48..c5cb0649436a3 100644 --- a/ports/rp2/rp2_psram.c +++ b/ports/rp2/rp2_psram.c @@ -123,7 +123,8 @@ size_t __no_inline_not_in_flash_func(psram_init)(uint cs_pin) { // unavailable while QMI direct mode is enabled) const int max_psram_freq = 133000000; const int clock_hz = clock_get_hz(clk_sys); - // Enable direct mode, PSRAM CS, clkdiv of 10. + + // Enable direct mode, PSRAM CS, clkdiv of 10. qmi_hw->direct_csr = 10 << QMI_DIRECT_CSR_CLKDIV_LSB | \ QMI_DIRECT_CSR_EN_BITS | \ QMI_DIRECT_CSR_AUTO_CS1N_BITS;