Similar to #8436, this appears to be yet another informational / relaxation-only reloc record type (62), which I have encountered in the object file output of the latest ESP-IDF compiler for ESP32S3 xtensa-esp32s3-elf-gcc (crosstool-NG esp-2022r1-RC1) 11.2.0
Reloc type details found here: https://github.com/jcmvbkbc/xtensa-abi/blob/master/relocations
I have applied a similar fix (ignoring the entry) to my local mpy_ld.py, which seems happier (although I am finding other issues, to be reported shortly!)
Diff:
@@ -76,6 +76,7 @@ R_X86_64_GOTPCREL = 9
R_X86_64_REX_GOTPCRELX = 42
R_386_GOT32X = 43
R_XTENSA_PDIFF32 = 59
+R_XTENSA_NDIFF32 = 62
################################################################################
# Architecture configuration
@@ -575,9 +576,9 @@ def do_relocation_text(env, text_addr, r):
reloc = addr - r_offset
reloc_type = "xtensa_l32r"
- elif env.arch.name == "EM_XTENSA" and r_info_type in (R_XTENSA_DIFF32, R_XTENSA_PDIFF32):
+ elif env.arch.name == "EM_XTENSA" and r_info_type in (R_XTENSA_DIFF32, R_XTENSA_PDIFF32, R_XTENSA_NDIFF32):
if s.section.name.startswith(".text"):
- # it looks like R_XTENSA_[P]DIFF32 into .text is already correctly relocated
+ # it looks like R_XTENSA_[P|N]DIFF32 into .text is already correctly relocated
return
assert 0
Similar to #8436, this appears to be yet another informational / relaxation-only reloc record type (62), which I have encountered in the object file output of the latest ESP-IDF compiler for ESP32S3
xtensa-esp32s3-elf-gcc (crosstool-NG esp-2022r1-RC1) 11.2.0Reloc type details found here: https://github.com/jcmvbkbc/xtensa-abi/blob/master/relocations
I have applied a similar fix (ignoring the entry) to my local
mpy_ld.py, which seems happier (although I am finding other issues, to be reported shortly!)Diff: