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dhylandsdpgeorge
dhylands
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dpgeorge
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stmhal: Add STM32F7 support for USB serial and storage.
USB serial is now working for F7. Internal file storage is now working for F7. The flash is laid out a bit differently to the F4 - 4 x 32K, 1 x 128K with the rest 256K, so the internal storage is 96K. Added more pind definitions for STM32F7DISC board. Made USART1 be the default HWUART repl. The STLINK usb connector also looks like a USB serial port which is attached to USART1 on the STM32F7DISC.
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6 files changed

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-28
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6 files changed

+59
-28
lines changed

‎stmhal/boards/STM32F7DISC/mpconfigboard.h‎

Lines changed: 17 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -30,17 +30,22 @@ void STM32F7DISC_board_early_init(void);
3030
#define MICROPY_HW_FLASH_LATENCY FLASH_LATENCY_6
3131

3232
// UART config
33-
#define MICROPY_HW_UART6_PORT (GPIOC)
34-
#define MICROPY_HW_UART6_PINS (GPIO_PIN_6 | GPIO_PIN_7)
35-
#define MICROPY_HW_UART7_PORT (GPIOF)
36-
#define MICROPY_HW_UART7_PINS (GPIO_PIN_6 | GPIO_PIN_7)
33+
#define MICROPY_HW_UART1_TX_PORT (GPIOA)
34+
#define MICROPY_HW_UART1_TX_PIN (GPIO_PIN_9)
35+
#define MICROPY_HW_UART1_RX_PORT (GPIOB)
36+
#define MICROPY_HW_UART1_RX_PIN (GPIO_PIN_7)
3737

38-
#define MICROPY_HW_UART_REPL PYB_UART_6
38+
#define MICROPY_HW_UART6_PORT (GPIOC)
39+
#define MICROPY_HW_UART6_PINS (GPIO_PIN_6 | GPIO_PIN_7)
40+
#define MICROPY_HW_UART7_PORT (GPIOF)
41+
#define MICROPY_HW_UART7_PINS (GPIO_PIN_6 | GPIO_PIN_7)
42+
43+
#define MICROPY_HW_UART_REPL PYB_UART_1
3944
#define MICROPY_HW_UART_REPL_BAUD 115200
4045

4146
// I2C busses
42-
#define MICROPY_HW_I2C1_SCL (pin_B8)
43-
#define MICROPY_HW_I2C1_SDA (pin_B9)
47+
#define MICROPY_HW_I2C1_SCL (pin_B8)
48+
#define MICROPY_HW_I2C1_SDA (pin_B9)
4449

4550
// USRSW is pulled low. Pressing the button makes the input go high.
4651
#define MICROPY_HW_USRSW_PIN (pin_I11)
@@ -55,5 +60,9 @@ void STM32F7DISC_board_early_init(void);
5560
#define MICROPY_HW_LED_OFF(pin) (pin->gpio->BSRR = (pin->pin_mask << 16))
5661

5762
// USB config (CN13 - USB OTG FS)
58-
#define MICROPY_HW_USB_VBUS_DETECT_PIN (pin_A9)
63+
// The Hardware VBUS detect only works on pin PA9. The STM32F7 Discovery uses
64+
// PA9 for VCP_TX functionality and connects the VBUS to pin J12 (so software
65+
// only detect). So we don't define the VBUS detect pin since that requires PA9.
66+
67+
/*#define MICROPY_HW_USB_VBUS_DETECT_PIN (pin_J12)*/
5968
#define MICROPY_HW_USB_OTG_ID_PIN (pin_A10)

‎stmhal/boards/STM32F7DISC/pins.csv‎

Lines changed: 12 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -25,8 +25,19 @@ SW,PI11
2525
TP1,PH2
2626
TP2,PI8
2727
TP3,PH15
28+
AUDIO_INT,PD6
29+
EXT_SDA,PB9
30+
EXT_SCL,PB8
31+
EXT_RST,PG3
32+
SD_SW,PC13
2833
LCD_BL_CTRL,PK3
29-
USB_VBUS,PA9
34+
LCD_INT,PI13
35+
OTG_FS_POWER,PD5
36+
OTG_FS_OVER_CURRENT,PD4
37+
OTG_HS_OVER_CURRENT,PE3
38+
USB_VBUS,PJ12
3039
USB_ID,PA10
3140
USB_DM,PA11
3241
USB_DP,PA12
42+
VCP_TX,PA9
43+
VCP_RX,PB7

‎stmhal/boards/STM32F7DISC/stm32f7xx_hal_conf.h‎

Lines changed: 2 additions & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -47,6 +47,7 @@
4747
/* Exported constants --------------------------------------------------------*/
4848

4949
#define STM32F746xx
50+
#define USE_USB_FS
5051

5152
/* ########################## Module Selection ############################## */
5253
/**
@@ -157,7 +158,7 @@
157158
* @brief This is the HAL system configuration section
158159
*/
159160
#define VDD_VALUE ((uint32_t)3300) /*!< Value of VDD in mv */
160-
#define TICK_INT_PRIORITY ((uint32_t)0x0F) /*!< tick interrupt priority */
161+
#define TICK_INT_PRIORITY ((uint32_t)0x00) /*!< tick interrupt priority */
161162
#define USE_RTOS 0
162163
#define ART_ACCLERATOR_ENABLE 1 /* To enable instruction cache and prefetch */
163164

@@ -415,14 +416,6 @@
415416
#define assert_param(expr) ((void)0)
416417
#endif /* USE_FULL_ASSERT */
417418

418-
/**
419-
* @}
420-
*/
421-
422-
/**
423-
* @}
424-
*/
425-
426419
#ifdef __cplusplus
427420
}
428421
#endif

‎stmhal/boards/stm32f746.ld‎

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -6,9 +6,9 @@
66
MEMORY
77
{
88
FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 1024K
9-
FLASH_ISR (rx) : ORIGIN = 0x08000000, LENGTH = 16K /* sector 0, 16K */
10-
FLASH_FS (r) : ORIGIN = 0x08004000, LENGTH = 112K /* sectors 1, 2, 3 (16K each) sector 4 (64K) */
11-
FLASH_TEXT (rx) : ORIGIN = 0x08020000, LENGTH = 896K /* sectors 5-11 7*128KiB = 896K */
9+
FLASH_ISR (rx) : ORIGIN = 0x08000000, LENGTH = 32K /* sector 0, 32K */
10+
FLASH_FS (r) : ORIGIN = 0x08008000, LENGTH = 96K /* sectors 1, 2, 3 (32K each) */
11+
FLASH_TEXT (rx) : ORIGIN = 0x08020000, LENGTH = 896K /* sectors 4-7 1*128Kib 3*256KiB = 896K */
1212
DTCM (xrw) : ORIGIN = 0x20000000, LENGTH = 64K /* Used for storage cache */
1313
RAM (xrw) : ORIGIN = 0x20010000, LENGTH = 256K /* SRAM1 = 240K, SRAM2 = 16K */
1414
}

‎stmhal/flash.c‎

Lines changed: 22 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -34,6 +34,21 @@
3434
#define FLASH_FLAG_PGSERR FLASH_FLAG_ERSERR
3535
#endif
3636

37+
#if defined(STM32F7)
38+
39+
/* Base address of the Flash sectors */
40+
#define ADDR_FLASH_SECTOR_0 ((uint32_t)0x08000000) /* Base @ of Sector 0, 32 Kbytes */
41+
#define ADDR_FLASH_SECTOR_1 ((uint32_t)0x08008000) /* Base @ of Sector 1, 32 Kbytes */
42+
#define ADDR_FLASH_SECTOR_2 ((uint32_t)0x08010000) /* Base @ of Sector 2, 32 Kbytes */
43+
#define ADDR_FLASH_SECTOR_3 ((uint32_t)0x08018000) /* Base @ of Sector 3, 32 Kbytes */
44+
#define ADDR_FLASH_SECTOR_4 ((uint32_t)0x08020000) /* Base @ of Sector 4, 128 Kbytes */
45+
#define ADDR_FLASH_SECTOR_5 ((uint32_t)0x08040000) /* Base @ of Sector 5, 256 Kbytes */
46+
#define ADDR_FLASH_SECTOR_6 ((uint32_t)0x08080000) /* Base @ of Sector 6, 256 Kbytes */
47+
#define ADDR_FLASH_SECTOR_7 ((uint32_t)0x080C0000) /* Base @ of Sector 7, 256 Kbytes */
48+
#define ADDR_FLASH_END ((uint32_t)0x08100000) /* 1 Mbytes total */
49+
50+
#else
51+
3752
/* Base address of the Flash sectors */
3853
#define ADDR_FLASH_SECTOR_0 ((uint32_t)0x08000000) /* Base @ of Sector 0, 16 Kbytes */
3954
#define ADDR_FLASH_SECTOR_1 ((uint32_t)0x08004000) /* Base @ of Sector 1, 16 Kbytes */
@@ -43,11 +58,16 @@
4358
#define ADDR_FLASH_SECTOR_5 ((uint32_t)0x08020000) /* Base @ of Sector 5, 128 Kbytes */
4459
#define ADDR_FLASH_SECTOR_6 ((uint32_t)0x08040000) /* Base @ of Sector 6, 128 Kbytes */
4560
#define ADDR_FLASH_SECTOR_7 ((uint32_t)0x08060000) /* Base @ of Sector 7, 128 Kbytes */
46-
#if defined(FLASH_SECTOR_8)
61+
#if !defined(FLASH_SECTOR_8)
62+
#define ADDR_FLASH_END ((uint32_t)0x08080000) /* 512 Kbytes total */
63+
#else
4764
#define ADDR_FLASH_SECTOR_8 ((uint32_t)0x08080000) /* Base @ of Sector 8, 128 Kbytes */
4865
#define ADDR_FLASH_SECTOR_9 ((uint32_t)0x080A0000) /* Base @ of Sector 9, 128 Kbytes */
4966
#define ADDR_FLASH_SECTOR_10 ((uint32_t)0x080C0000) /* Base @ of Sector 10, 128 Kbytes */
5067
#define ADDR_FLASH_SECTOR_11 ((uint32_t)0x080E0000) /* Base @ of Sector 11, 128 Kbytes */
68+
#define ADDR_FLASH_END ((uint32_t)0x08100000) /* 1 Mbytes total */
69+
#endif
70+
5171
#endif
5272

5373
static const uint32_t flash_info_table[26] = {
@@ -64,10 +84,8 @@ static const uint32_t flash_info_table[26] = {
6484
ADDR_FLASH_SECTOR_9, FLASH_SECTOR_9,
6585
ADDR_FLASH_SECTOR_10, FLASH_SECTOR_10,
6686
ADDR_FLASH_SECTOR_11, FLASH_SECTOR_11,
67-
ADDR_FLASH_SECTOR_11 + 0x20000, 0,
68-
#else
69-
ADDR_FLASH_SECTOR_7 + 0x20000, 0,
7087
#endif
88+
ADDR_FLASH_END, 0,
7189
};
7290

7391
uint32_t flash_get_sector_info(uint32_t addr, uint32_t *start_addr, uint32_t *size) {

‎stmhal/storage.c‎

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -60,9 +60,9 @@ STATIC byte flash_cache_mem[0x4000] __attribute__((aligned(4))); // 16k
6060
// The STM32F746 doesn't really have CCRAM, so we use the 64K DTCM for this.
6161

6262
#define CACHE_MEM_START_ADDR (0x20000000) // DTCM data RAM, 64k
63-
#define FLASH_SECTOR_SIZE_MAX (0x10000) // 64k max, size of DTCM
64-
#define FLASH_MEM_SEG1_START_ADDR (0x08004000) // sector 1
65-
#define FLASH_MEM_SEG1_NUM_BLOCKS (224) // sectors 1,2,3,4: 16k+16k+16k+64k=112k
63+
#define FLASH_SECTOR_SIZE_MAX (0x08000) // 32k max
64+
#define FLASH_MEM_SEG1_START_ADDR (0x08008000) // sector 1
65+
#define FLASH_MEM_SEG1_NUM_BLOCKS (192) // sectors 1,2,3: 32k+32k+32=96k
6666

6767
#else
6868
#error "no storage support for this MCU"

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