|
| 1 | +/* |
| 2 | + * Copyright 2017 NXP |
| 3 | + * All rights reserved. |
| 4 | + * |
| 5 | + * SPDX-License-Identifier: BSD-3-Clause |
| 6 | + */ |
| 7 | + |
| 8 | +#include "fsl_flexspi_nor_boot.h" |
| 9 | +#include "fsl_flexspi_nor_config.h" |
| 10 | + |
| 11 | + |
| 12 | +__attribute__((section(".boot_hdr.ivt"))) |
| 13 | +/************************************* |
| 14 | + * IVT Data |
| 15 | + *************************************/ |
| 16 | +const ivt image_vector_table = { |
| 17 | + IVT_HEADER, /* IVT Header */ |
| 18 | + IMAGE_ENTRY_ADDRESS, /* Image Entry Function */ |
| 19 | + IVT_RSVD, /* Reserved = 0 */ |
| 20 | + (uint32_t)DCD_ADDRESS, /* Address where DCD information is stored */ |
| 21 | + (uint32_t)BOOT_DATA_ADDRESS, /* Address where BOOT Data Structure is stored */ |
| 22 | + (uint32_t)&image_vector_table, /* Pointer to IVT Self (absolute address */ |
| 23 | + (uint32_t)CSF_ADDRESS, /* Address where CSF file is stored */ |
| 24 | + IVT_RSVD /* Reserved = 0 */ |
| 25 | +}; |
| 26 | + |
| 27 | +__attribute__((section(".boot_hdr.boot_data"))) |
| 28 | +/************************************* |
| 29 | + * Boot Data |
| 30 | + *************************************/ |
| 31 | +const BOOT_DATA_T boot_data = { |
| 32 | + FLASH_BASE, /* boot start location */ |
| 33 | + FLASH_SIZE, /* size */ |
| 34 | + PLUGIN_FLAG, /* Plugin flag*/ |
| 35 | + 0xFFFFFFFF /* empty - extra data word */ |
| 36 | +}; |
| 37 | + |
| 38 | +__attribute__((section(".boot_hdr.conf"))) |
| 39 | +// Values copied from https://github.com/PaulStoffregen/cores/blob/ddb23fa5d97dac763bc06e11b9b41f026bd51f0a/teensy4/bootdata.c#L39 |
| 40 | +const flexspi_nor_config_t qspiflash_config = { |
| 41 | + .memConfig = |
| 42 | + { |
| 43 | + .tag = FLEXSPI_CFG_BLK_TAG, |
| 44 | + .version = FLEXSPI_CFG_BLK_VERSION, |
| 45 | + .readSampleClkSrc = kFlexSPIReadSampleClk_LoopbackFromDqsPad, |
| 46 | + .csHoldTime = 1u, |
| 47 | + .csSetupTime = 2u, |
| 48 | + // Enable DDR mode, Wordaddressable, Safe configuration, Differential clock |
| 49 | + .deviceType = kFlexSpiDeviceType_SerialNOR, |
| 50 | + .sflashPadType = kSerialFlash_4Pads, |
| 51 | + .serialClkFreq = kFlexSpiSerialClk_60MHz, // 03 |
| 52 | + .sflashA1Size = FLASH_SIZE, |
| 53 | + .lookupTable = |
| 54 | + { |
| 55 | + // FLEXSPI_LUT_SEQ(cmd0, pad0, op0, cmd1, pad1, op1) |
| 56 | + // (FLEXSPI_LUT_OPERAND0(op0) | FLEXSPI_LUT_NUM_PADS0(pad0) | FLEXSPI_LUT_OPCODE0(cmd0) | FLEXSPI_LUT_OPERAND1(op1) | |
| 57 | + // FLEXSPI_LUT_NUM_PADS1(pad1) | FLEXSPI_LUT_OPCODE1(cmd1)) |
| 58 | + // Read LUTs |
| 59 | + FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0xEB, RADDR_SDR, FLEXSPI_4PAD, 0x18), |
| 60 | + FLEXSPI_LUT_SEQ(DUMMY_SDR, FLEXSPI_4PAD, 0x06, READ_SDR, FLEXSPI_4PAD, 0x04), |
| 61 | + 0, |
| 62 | + 0, |
| 63 | + |
| 64 | + 0x24040405, |
| 65 | + 0, |
| 66 | + 0, |
| 67 | + 0, |
| 68 | + |
| 69 | + 0, |
| 70 | + 0, |
| 71 | + 0, |
| 72 | + 0, |
| 73 | + |
| 74 | + 0x00000406, |
| 75 | + 0, |
| 76 | + 0, |
| 77 | + 0, |
| 78 | + |
| 79 | + 0, |
| 80 | + 0, |
| 81 | + 0, |
| 82 | + 0, |
| 83 | + |
| 84 | + 0x08180420, |
| 85 | + 0, |
| 86 | + 0, |
| 87 | + 0, |
| 88 | + |
| 89 | + 0, |
| 90 | + 0, |
| 91 | + 0, |
| 92 | + 0, |
| 93 | + |
| 94 | + 0, |
| 95 | + 0, |
| 96 | + 0, |
| 97 | + 0, |
| 98 | + |
| 99 | + 0x081804D8, |
| 100 | + 0, |
| 101 | + 0, |
| 102 | + 0, |
| 103 | + |
| 104 | + 0x08180402, |
| 105 | + 0x00002004, |
| 106 | + 0, |
| 107 | + 0, |
| 108 | + |
| 109 | + 0, |
| 110 | + 0, |
| 111 | + 0, |
| 112 | + 0, |
| 113 | + |
| 114 | + 0x00000460, |
| 115 | + }, |
| 116 | + }, |
| 117 | + .pageSize = 256u, |
| 118 | + .sectorSize = 4u * 1024u, |
| 119 | + .ipcmdSerialClkFreq = kFlexSpiSerialClk_30MHz, |
| 120 | + .blockSize = 0x00010000, |
| 121 | + .isUniformBlockSize = false, |
| 122 | +}; |
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