tests/ports/rp2: Add rp2-specific tests with a test for rp2.DMA.

dpgeorge · dpgeorge · commit 50b809c8e8bb · 2024-01-22T11:49:20.000+11:00
Signed-off-by: Damien George &lt;damien@micropython.org&gt;
diff --git a/tests/ports/rp2/rp2_dma.py b/tests/ports/rp2/rp2_dma.py
@@ -0,0 +1,90 @@
+# Test rp2.DMA functionality.
+
+import time
+import machine
+import rp2
+
+src = bytes(i & 0xFF for i in range(16 * 1024))
+
+print("# test basic usage")
+
+dma = rp2.DMA()
+print(dma)
+print(rp2.DMA.unpack_ctrl(dma.pack_ctrl()))
+dma.read = 0
+dma.write = 0
+dma.count = 0
+dma.ctrl = dma.pack_ctrl()
+print(dma.read, dma.write, dma.count, dma.ctrl & 0x01FFFFFF, dma.channel, dma.registers)
+dma.close()
+
+# Test closing when already closed.
+dma.close()
+
+# Test using when closed.
+try:
+    dma.active()
+    assert False
+except ValueError:
+    print("ValueError")
+
+# Test simple memory copy.
+print("# test memory copy")
+dest = bytearray(1024)
+dma = rp2.DMA()
+dma.config(read=src, write=dest, count=len(dest) // 4, ctrl=dma.pack_ctrl(), trigger=False)
+print(not any(dest))
+dma.active(True)
+while dma.active():
+    pass
+print(dest[:8], dest[-8:])
+dma.close()
+
+
+# Test time taken for a large memory copy.
+def run_and_time_dma(dma):
+    ticks_us = time.ticks_us
+    irq_state = machine.disable_irq()
+    t0 = ticks_us()
+    dma.active(True)
+    while dma.active():
+        pass
+    t1 = ticks_us()
+    machine.enable_irq(irq_state)
+    return time.ticks_diff(t1, t0)
+
+
+print("# test timing")
+dest = bytearray(16 * 1024)
+dma = rp2.DMA()
+dma.read = src
+dma.write = dest
+dma.count = len(dest) // 4
+dma.ctrl = dma.pack_ctrl()
+dt = run_and_time_dma(dma)
+print(60 <= dt <= 90)
+print(dest[:8], dest[-8:])
+dma.close()
+
+# Test using .config(trigger=True).
+print("# test immediate trigger")
+dest = bytearray(1024)
+dma = rp2.DMA()
+dma.config(read=src, write=dest, count=len(dest) // 4, ctrl=dma.pack_ctrl(), trigger=True)
+while dma.active():
+    pass
+print(dest[:8], dest[-8:])
+dma.close()
+
+# Test the DMA.irq() method.
+print("# test irq")
+dest = bytearray(1024)
+dma = rp2.DMA()
+dma.irq(lambda _: print("irq fired"))
+dma.config(
+    read=src, write=dest, count=len(dest) // 4, ctrl=dma.pack_ctrl(irq_quiet=0), trigger=True
+)
+while dma.active():
+    pass
+print(dest[:8], dest[-8:])
+dma.close()
diff --git a/tests/ports/rp2/rp2_dma.py.exp b/tests/ports/rp2/rp2_dma.py.exp
@@ -0,0 +1,16 @@
+# test basic usage
+DMA(0)
+{'inc_read': 1, 'high_pri': 0, 'write_err': 0, 'ring_sel': 0, 'enable': 1, 'treq_sel': 63, 'sniff_en': 0, 'irq_quiet': 1, 'read_err': 0, 'chain_to': 0, 'busy': 0, 'inc_write': 1, 'ring_size': 0, 'bswap': 0, 'size': 2, 'ahb_err': 0}
+0 0 0 4161593 0 <memoryview>
+ValueError
+# test memory copy
+True
+bytearray(b'\x00\x01\x02\x03\x04\x05\x06\x07') bytearray(b'\xf8\xf9\xfa\xfb\xfc\xfd\xfe\xff')
+# test timing
+True
+bytearray(b'\x00\x01\x02\x03\x04\x05\x06\x07') bytearray(b'\xf8\xf9\xfa\xfb\xfc\xfd\xfe\xff')
+# test immediate trigger
+bytearray(b'\x00\x01\x02\x03\x04\x05\x06\x07') bytearray(b'\xf8\xf9\xfa\xfb\xfc\xfd\xfe\xff')
+# test irq
+irq fired
+bytearray(b'\x00\x01\x02\x03\x04\x05\x06\x07') bytearray(b'\xf8\xf9\xfa\xfb\xfc\xfd\xfe\xff')
diff --git a/tests/run-tests.py b/tests/run-tests.py
@@ -1040,7 +1040,7 @@ def main():
             elif args.target in ("renesas-ra"):
                 test_dirs += ("float", "inlineasm", "ports/renesas-ra")
             elif args.target == "rp2":
-                test_dirs += ("float", "stress", "inlineasm", "thread")
+                test_dirs += ("float", "stress", "inlineasm", "thread", "ports/rp2")
             elif args.target in ("esp8266", "esp32", "minimal", "nrf"):
                 test_dirs += ("float",)
             elif args.target == "wipy":
