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stmhal: Change SPI phase spec to 0,1 to match standard conventions.
Was 1 or 2, now 0 or 1 (respectively). 0 means sample MISO on first edge, 1 means sample on second edge. Addresses issue adafruit#936.
1 parent de3c806 commit 480a7ce

3 files changed

Lines changed: 11 additions & 10 deletions

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stmhal/spi.c

Lines changed: 8 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -49,11 +49,12 @@
4949
/// parameters to init the SPI bus:
5050
///
5151
/// from pyb import SPI
52-
/// spi = SPI(1, SPI.MASTER, baudrate=600000, polarity=1, phase=1, crc=0x7)
52+
/// spi = SPI(1, SPI.MASTER, baudrate=600000, polarity=1, phase=0, crc=0x7)
5353
///
5454
/// Only required parameter is mode, SPI.MASTER or SPI.SLAVE. Polarity can be
55-
/// 0 or 1, and is the level the idle clock line sits at. Phase can be 1 or 2
56-
/// for number of edges. Crc can be None for no CRC, or a polynomial specifier.
55+
/// 0 or 1, and is the level the idle clock line sits at. Phase can be 0 or 1
56+
/// to sample data on the first or second clock edge respectively. Crc can be
57+
/// None for no CRC, or a polynomial specifier.
5758
///
5859
/// Additional method for SPI:
5960
///
@@ -223,15 +224,15 @@ STATIC void pyb_spi_print(void (*print)(void *env, const char *fmt, ...), void *
223224
} else {
224225
print(env, "SPI(%u, SPI.SLAVE", spi_num);
225226
}
226-
print(env, ", polarity=%u, phase=%u, bits=%u", self->spi->Init.CLKPolarity == SPI_POLARITY_LOW ? 0 : 1, self->spi->Init.CLKPhase == SPI_PHASE_1EDGE ? 1 : 2, self->spi->Init.DataSize == SPI_DATASIZE_8BIT ? 8 : 16);
227+
print(env, ", polarity=%u, phase=%u, bits=%u", self->spi->Init.CLKPolarity == SPI_POLARITY_LOW ? 0 : 1, self->spi->Init.CLKPhase == SPI_PHASE_1EDGE ? 0 : 1, self->spi->Init.DataSize == SPI_DATASIZE_8BIT ? 8 : 16);
227228
if (self->spi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLED) {
228229
print(env, ", crc=0x%x", self->spi->Init.CRCPolynomial);
229230
}
230231
print(env, ")");
231232
}
232233
}
233234

234-
/// \method init(mode, baudrate=328125, *, polarity=1, phase=1, bits=8, firstbit=SPI.MSB, ti=False, crc=None)
235+
/// \method init(mode, baudrate=328125, *, polarity=1, phase=0, bits=8, firstbit=SPI.MSB, ti=False, crc=None)
235236
///
236237
/// Initialise the SPI bus with the given parameters:
237238
///
@@ -241,7 +242,7 @@ STATIC const mp_arg_t pyb_spi_init_args[] = {
241242
{ MP_QSTR_mode, MP_ARG_REQUIRED | MP_ARG_INT, {.u_int = 0} },
242243
{ MP_QSTR_baudrate, MP_ARG_INT, {.u_int = 328125} },
243244
{ MP_QSTR_polarity, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 1} },
244-
{ MP_QSTR_phase, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 1} },
245+
{ MP_QSTR_phase, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 0} },
245246
{ MP_QSTR_dir, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = SPI_DIRECTION_2LINES} },
246247
{ MP_QSTR_bits, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 8} },
247248
{ MP_QSTR_nss, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = SPI_NSS_SOFT} },
@@ -281,7 +282,7 @@ STATIC mp_obj_t pyb_spi_init_helper(const pyb_spi_obj_t *self, mp_uint_t n_args,
281282
else { init->BaudRatePrescaler = SPI_BAUDRATEPRESCALER_256; }
282283

283284
init->CLKPolarity = vals[2].u_int == 0 ? SPI_POLARITY_LOW : SPI_POLARITY_HIGH;
284-
init->CLKPhase = vals[3].u_int == 1 ? SPI_PHASE_1EDGE : SPI_PHASE_2EDGE;
285+
init->CLKPhase = vals[3].u_int == 0 ? SPI_PHASE_1EDGE : SPI_PHASE_2EDGE;
285286
init->Direction = vals[4].u_int;
286287
init->DataSize = (vals[5].u_int == 16) ? SPI_DATASIZE_16BIT : SPI_DATASIZE_8BIT;
287288
init->NSS = vals[6].u_int;

tests/pyb/spi.py

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -5,10 +5,10 @@
55

66
spi = SPI(1, SPI.MASTER)
77
spi = SPI(1, SPI.MASTER, baudrate=500000)
8-
spi = SPI(1, SPI.MASTER, 500000, polarity=1, phase=1, bits=8, firstbit=SPI.MSB, ti=False, crc=None)
8+
spi = SPI(1, SPI.MASTER, 500000, polarity=1, phase=0, bits=8, firstbit=SPI.MSB, ti=False, crc=None)
99
print(spi)
1010

11-
spi.init(SPI.SLAVE)
11+
spi.init(SPI.SLAVE, phase=1)
1212
print(spi)
1313

1414
spi.init(SPI.MASTER)

tests/pyb/spi.py.exp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,5 @@
11
SPI(1)
2-
SPI(1, SPI.MASTER, baudrate=328125, polarity=1, phase=1, bits=8)
2+
SPI(1, SPI.MASTER, baudrate=328125, polarity=1, phase=0, bits=8)
33
SPI(1, SPI.SLAVE, polarity=1, phase=1, bits=8)
44
b'\xff'
55
b'\xff'

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