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tannewttannewt
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shared-bindings: Make MOSI and MISO optional for SPI.
1 parent 4933fa1 commit 9b3afc7

4 files changed

Lines changed: 73 additions & 26 deletions

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‎atmel-samd/common-hal/nativeio/SPI.c‎

Lines changed: 27 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -44,6 +44,8 @@ void common_hal_nativeio_spi_construct(nativeio_spi_obj_t *self,
4444

4545
Sercom* sercom = NULL;
4646
uint32_t clock_pinmux = 0;
47+
bool mosi_none = mosi == mp_const_none;
48+
bool miso_none = miso == mp_const_none;
4749
uint32_t mosi_pinmux = 0;
4850
uint32_t miso_pinmux = 0;
4951
uint8_t clock_pad = 0;
@@ -58,16 +60,27 @@ void common_hal_nativeio_spi_construct(nativeio_spi_obj_t *self,
5860
clock_pinmux = clock->sercom[i].pinmux;
5961
clock_pad = clock->sercom[i].pad;
6062
for (int j = 0; j < NUM_SERCOMS_PER_PIN; j++) {
61-
mosi_pinmux = mosi->sercom[j].pinmux;
62-
mosi_pad = mosi->sercom[j].pad;
63-
for (int k = 0; k < NUM_SERCOMS_PER_PIN; k++) {
64-
if (potential_sercom == miso->sercom[k].sercom) {
65-
miso_pinmux = miso->sercom[k].pinmux;
66-
miso_pad = miso->sercom[k].pad;
67-
sercom = potential_sercom;
63+
if (!mosi_none) {
64+
if(potential_sercom == mosi->sercom[j].sercom) {
65+
mosi_pinmux = mosi->sercom[j].pinmux;
66+
mosi_pad = mosi->sercom[j].pad;
67+
if (miso_none) {
68+
sercom = potential_sercom;
69+
}
70+
} else {
6871
break;
6972
}
7073
}
74+
if (!miso_none) {
75+
for (int k = 0; k < NUM_SERCOMS_PER_PIN; k++) {
76+
if (potential_sercom == miso->sercom[k].sercom) {
77+
miso_pinmux = miso->sercom[k].pinmux;
78+
miso_pad = miso->sercom[k].pad;
79+
sercom = potential_sercom;
80+
break;
81+
}
82+
}
83+
}
7184
if (sercom != NULL) {
7285
break;
7386
}
@@ -77,7 +90,7 @@ void common_hal_nativeio_spi_construct(nativeio_spi_obj_t *self,
7790
}
7891
}
7992
if (sercom == NULL) {
80-
nlr_raise(mp_obj_new_exception_msg(&mp_type_OSError,
93+
nlr_raise(mp_obj_new_exception_msg(&mp_type_ValueError,
8194
"No hardware support available with those pins."));
8295
}
8396

@@ -109,8 +122,12 @@ void common_hal_nativeio_spi_construct(nativeio_spi_obj_t *self,
109122
&config_spi_master.pinmux_pad2,
110123
&config_spi_master.pinmux_pad3};
111124
*pinmuxes[clock_pad] = clock_pinmux;
112-
*pinmuxes[mosi_pad] = mosi_pinmux;
113-
*pinmuxes[miso_pad] = miso_pinmux;
125+
if (!mosi_none) {
126+
*pinmuxes[mosi_pad] = mosi_pinmux;
127+
}
128+
if (!miso_none) {
129+
*pinmuxes[miso_pad] = miso_pinmux;
130+
}
114131

115132
config_spi_master.mode_specific.master.baudrate = baudrate;
116133

‎shared-bindings/bitbangio/SPI.c‎

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -68,8 +68,8 @@ STATIC mp_obj_t bitbangio_spi_make_new(const mp_obj_type_t *type, size_t n_args,
6868
enum { ARG_clock, ARG_MOSI, ARG_MISO, ARG_baudrate, ARG_polarity, ARG_phase, ARG_bits, ARG_firstbit };
6969
static const mp_arg_t allowed_args[] = {
7070
{ MP_QSTR_clock, MP_ARG_REQUIRED | MP_ARG_OBJ },
71-
{ MP_QSTR_MOSI, MP_ARG_REQUIRED | MP_ARG_OBJ },
72-
{ MP_QSTR_MISO, MP_ARG_REQUIRED | MP_ARG_OBJ },
71+
{ MP_QSTR_MOSI, MP_ARG_OBJ, {.u_obj = mp_const_none} },
72+
{ MP_QSTR_MISO, MP_ARG_OBJ, {.u_obj = mp_const_none} },
7373
{ MP_QSTR_baudrate, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 100000} },
7474
{ MP_QSTR_polarity, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 400000} },
7575
{ MP_QSTR_phase, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 400000} },

‎shared-module/bitbangio/SPI.c‎

Lines changed: 42 additions & 14 deletions
Original file line numberDiff line numberDiff line change
@@ -26,6 +26,7 @@
2626

2727
#include "mpconfigport.h"
2828

29+
#include "py/nlr.h"
2930
#include "py/obj.h"
3031

3132
#include "common-hal/microcontroller/types.h"
@@ -40,18 +41,29 @@ extern void shared_module_bitbangio_spi_construct(bitbangio_spi_obj_t *self,
4041
const mcu_pin_obj_t * miso, uint32_t baudrate) {
4142
digitalinout_result_t result = common_hal_nativeio_digitalinout_construct(&self->clock, clock);
4243
if (result != DIGITALINOUT_OK) {
43-
return;
44+
nlr_raise(mp_obj_new_exception_msg(&mp_type_ValueError,
45+
"Clock pin init failed."));
4446
}
45-
result = common_hal_nativeio_digitalinout_construct(&self->mosi, mosi);
46-
if (result != DIGITALINOUT_OK) {
47-
common_hal_nativeio_digitalinout_deinit(&self->clock);
48-
return;
47+
if (mosi != mp_const_none) {
48+
result = common_hal_nativeio_digitalinout_construct(&self->mosi, mosi);
49+
if (result != DIGITALINOUT_OK) {
50+
common_hal_nativeio_digitalinout_deinit(&self->clock);
51+
nlr_raise(mp_obj_new_exception_msg(&mp_type_ValueError,
52+
"MOSI pin init failed."));
53+
}
54+
self->has_mosi = true;
4955
}
50-
result = common_hal_nativeio_digitalinout_construct(&self->miso, miso);
51-
if (result != DIGITALINOUT_OK) {
52-
common_hal_nativeio_digitalinout_deinit(&self->clock);
53-
common_hal_nativeio_digitalinout_deinit(&self->mosi);
54-
return;
56+
if (miso != mp_const_none) {
57+
result = common_hal_nativeio_digitalinout_construct(&self->miso, miso);
58+
if (result != DIGITALINOUT_OK) {
59+
common_hal_nativeio_digitalinout_deinit(&self->clock);
60+
if (mosi != mp_const_none) {
61+
common_hal_nativeio_digitalinout_deinit(&self->mosi);
62+
}
63+
nlr_raise(mp_obj_new_exception_msg(&mp_type_ValueError,
64+
"MISO pin init failed."));
65+
}
66+
self->has_miso = true;
5567
}
5668

5769
self->delay_half = 500000 / baudrate;
@@ -66,13 +78,25 @@ extern void shared_module_bitbangio_spi_construct(bitbangio_spi_obj_t *self,
6678

6779
extern void shared_module_bitbangio_spi_deinit(bitbangio_spi_obj_t *self) {
6880
common_hal_nativeio_digitalinout_deinit(&self->clock);
69-
common_hal_nativeio_digitalinout_deinit(&self->mosi);
70-
common_hal_nativeio_digitalinout_deinit(&self->miso);
81+
if (self->has_mosi) {
82+
common_hal_nativeio_digitalinout_deinit(&self->mosi);
83+
}
84+
if (self->has_miso) {
85+
common_hal_nativeio_digitalinout_deinit(&self->miso);
86+
}
7187
}
7288

7389
bool shared_module_bitbangio_spi_transfer(bitbangio_spi_obj_t *self,
7490
const uint8_t *write_buffer, size_t write_buffer_len,
7591
uint8_t *read_buffer, size_t read_buffer_len) {
92+
if (write_buffer_len > 0 && !self->has_mosi) {
93+
nlr_raise(mp_obj_new_exception_msg(&mp_type_ValueError,
94+
"Cannot write without MOSI pin."));
95+
}
96+
if (read_buffer_len > 0 && !self->has_miso) {
97+
nlr_raise(mp_obj_new_exception_msg(&mp_type_ValueError,
98+
"Cannot read without MISO pin."));
99+
}
76100
uint32_t delay_half = self->delay_half;
77101

78102
// only MSB transfer is implemented
@@ -95,7 +119,9 @@ bool shared_module_bitbangio_spi_transfer(bitbangio_spi_obj_t *self,
95119
}
96120

97121
// Clock out zeroes while we read.
98-
common_hal_nativeio_digitalinout_set_value(&self->mosi, false);
122+
if (self->has_mosi) {
123+
common_hal_nativeio_digitalinout_set_value(&self->mosi, false);
124+
}
99125
for (size_t i = 0; i < read_buffer_len; ++i) {
100126
uint8_t data_in = 0;
101127
for (int j = 0; j < 8; ++j, data_out <<= 1) {
@@ -135,7 +161,9 @@ bool shared_module_bitbangio_spi_transfer(bitbangio_spi_obj_t *self,
135161
MICROPY_EVENT_POLL_HOOK;
136162
#endif
137163
}
138-
common_hal_nativeio_digitalinout_set_value(&self->mosi, false);
164+
if (self->has_mosi) {
165+
common_hal_nativeio_digitalinout_set_value(&self->mosi, false);
166+
}
139167
for (size_t i = 0; i < read_buffer_len; ++i) {
140168
uint8_t data_in = 0;
141169
for (int j = 0; j < 8; ++j) {

‎shared-module/bitbangio/types.h‎

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -41,7 +41,9 @@ typedef struct {
4141
typedef struct {
4242
mp_obj_base_t base;
4343
nativeio_digitalinout_obj_t clock;
44+
bool has_mosi;
4445
nativeio_digitalinout_obj_t mosi;
46+
bool has_miso;
4547
nativeio_digitalinout_obj_t miso;
4648
uint32_t delay_half;
4749
uint8_t polarity;

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