@@ -230,33 +230,33 @@ STATIC int get_label_dest(asm_thumb_t *as, uint label) {
230230 return as -> label_offsets [label ];
231231}
232232
233- #define OP_MOVS_RLO_I8 ( rlo_dest , i8_src ) (0x2000 | ((rlo_dest ) << 8 ) | (i8_src ))
233+ #define OP_FORMAT_2 ( op , rlo_dest , rlo_src , src_b ) ((op) | ((src_b ) << 6 ) | ((rlo_src) << 3) | (rlo_dest ))
234234
235- // the i8_src value will be zero extended into the r32 register!
236- void asm_thumb_movs_rlo_i8 (asm_thumb_t * as , uint rlo_dest , int i8_src ) {
235+ void asm_thumb_format_2 (asm_thumb_t * as , uint op , uint rlo_dest , uint rlo_src , int src_b ) {
237236 assert (rlo_dest < REG_R8 );
238- // movs rlo_dest, #i8_src
239- asm_thumb_write_op16 (as , OP_MOVS_RLO_I8 ( rlo_dest , i8_src ));
237+ assert ( rlo_src < REG_R8 );
238+ asm_thumb_write_op16 (as , OP_FORMAT_2 ( op , rlo_dest , rlo_src , src_b ));
240239}
241240
242- #define OP_MOVW (0xf240)
243- #define OP_MOVT (0xf2c0)
241+ #define OP_FORMAT_3 (op , rlo , i8 ) ((op) | ((rlo) << 8) | (i8))
244242
245- // if loading lo half with movw, the i16 value will be zero extended into the r32 register!
246- STATIC void asm_thumb_mov_reg_i16 (asm_thumb_t * as , uint mov_op , uint reg_dest , int i16_src ) {
247- assert (reg_dest < REG_R15 );
248- // mov[wt] reg_dest, #i16_src
249- asm_thumb_write_op32 (as , mov_op | ((i16_src >> 1 ) & 0x0400 ) | ((i16_src >> 12 ) & 0xf ), ((i16_src << 4 ) & 0x7000 ) | (reg_dest << 8 ) | (i16_src & 0xff ));
243+ void asm_thumb_format_3 (asm_thumb_t * as , uint op , uint rlo , int i8 ) {
244+ assert (rlo < REG_R8 );
245+ asm_thumb_write_op16 (as , OP_FORMAT_3 (op , rlo , i8 ));
250246}
251247
252- // the i16_src value will be zero extended into the r32 register!
253- void asm_thumb_movw_reg_i16 (asm_thumb_t * as , uint reg_dest , int i16_src ) {
254- asm_thumb_mov_reg_i16 (as , OP_MOVW , reg_dest , i16_src );
248+ #define OP_FORMAT_4 (op , rlo_dest , rlo_src ) ((op) | ((rlo_src) << 3) | (rlo_dest))
249+
250+ void asm_thumb_format_4 (asm_thumb_t * as , uint op , uint rlo_dest , uint rlo_src ) {
251+ assert (rlo_dest < REG_R8 );
252+ assert (rlo_src < REG_R8 );
253+ asm_thumb_write_op16 (as , OP_FORMAT_4 (op , rlo_dest , rlo_src ));
255254}
256255
257- // the i16_src value will be zero extended into the r32 register!
258- void asm_thumb_movt_reg_i16 (asm_thumb_t * as , uint reg_dest , int i16_src ) {
259- asm_thumb_mov_reg_i16 (as , OP_MOVT , reg_dest , i16_src );
256+ #define OP_FORMAT_9_10 (op , rlo_dest , rlo_base , offset ) ((op) | (((offset) << 6) & 0x07c0) | ((rlo_base) << 3) | (rlo_dest))
257+
258+ void asm_thumb_format_9_10 (asm_thumb_t * as , uint op , uint rlo_dest , uint rlo_base , uint offset ) {
259+ asm_thumb_write_op16 (as , OP_FORMAT_9_10 (op , rlo_dest , rlo_base , offset ));
260260}
261261
262262void asm_thumb_mov_reg_reg (asm_thumb_t * as , uint reg_dest , uint reg_src ) {
@@ -275,42 +275,24 @@ void asm_thumb_mov_reg_reg(asm_thumb_t *as, uint reg_dest, uint reg_src) {
275275 asm_thumb_write_op16 (as , 0x4600 | op_lo );
276276}
277277
278- #define OP_ADD_RLO_RLO_RLO (rlo_dest , rlo_src_a , rlo_src_b ) (0x1800 | ((rlo_src_b) << 6) | ((rlo_src_a) << 3) | (rlo_dest))
279-
280- void asm_thumb_add_rlo_rlo_rlo (asm_thumb_t * as , uint rlo_dest , uint rlo_src_a , uint rlo_src_b ) {
281- asm_thumb_write_op16 (as , OP_ADD_RLO_RLO_RLO (rlo_dest , rlo_src_a , rlo_src_b ));
282- }
283-
284- #define OP_SUBS_RLO_RLO_I3 (rlo_dest , rlo_src , i3_src ) (0x1e00 | ((i3_src) << 6) | ((rlo_src) << 3) | (rlo_dest))
285-
286- void asm_thumb_subs_rlo_rlo_i3 (asm_thumb_t * as , uint rlo_dest , uint rlo_src , int i3_src ) {
287- assert (rlo_dest < REG_R8 );
288- assert (rlo_src < REG_R8 );
289- asm_thumb_write_op16 (as , OP_SUBS_RLO_RLO_I3 (rlo_dest , rlo_src , i3_src ));
290- }
291-
292- #define OP_CMP_REG_REG (rlo_a , rlo_b ) (0x4280 | ((rlo_b) << 3) | (rlo_a))
293-
294- void asm_thumb_cmp_reg_reg (asm_thumb_t * as , uint rlo_a , uint rlo_b ) {
295- asm_thumb_write_op16 (as , OP_CMP_REG_REG (rlo_a , rlo_b ));
296- }
297-
298- #define OP_CMP_RLO_I8 (rlo , i8 ) (0x2800 | ((rlo) << 8) | (i8))
278+ #define OP_MOVW (0xf240)
279+ #define OP_MOVT (0xf2c0)
299280
300- void asm_thumb_cmp_rlo_i8 (asm_thumb_t * as , uint rlo , int i8 ) {
301- assert (rlo < REG_R8 );
302- asm_thumb_write_op16 (as , OP_CMP_RLO_I8 (rlo , i8 ));
281+ // if loading lo half with movw, the i16 value will be zero extended into the r32 register!
282+ STATIC void asm_thumb_mov_reg_i16 (asm_thumb_t * as , uint mov_op , uint reg_dest , int i16_src ) {
283+ assert (reg_dest < REG_R15 );
284+ // mov[wt] reg_dest, #i16_src
285+ asm_thumb_write_op32 (as , mov_op | ((i16_src >> 1 ) & 0x0400 ) | ((i16_src >> 12 ) & 0xf ), ((i16_src << 4 ) & 0x7000 ) | (reg_dest << 8 ) | (i16_src & 0xff ));
303286}
304287
305- #define OP_LDR_RLO_RLO_I5 (rlo_dest , rlo_base , word_offset ) (0x6800 | (((word_offset) << 6) & 0x07c0) | ((rlo_base) << 3) | (rlo_dest))
306- #define OP_STR_RLO_RLO_I5 (rlo_dest , rlo_base , word_offset ) (0x6000 | (((word_offset) << 6) & 0x07c0) | ((rlo_base) << 3) | (rlo_dest))
307-
308- void asm_thumb_ldr_rlo_rlo_i5 (asm_thumb_t * as , uint rlo_dest , uint rlo_base , uint word_offset ) {
309- asm_thumb_write_op16 (as , OP_LDR_RLO_RLO_I5 (rlo_dest , rlo_base , word_offset ));
288+ // the i16_src value will be zero extended into the r32 register!
289+ void asm_thumb_movw_reg_i16 (asm_thumb_t * as , uint reg_dest , int i16_src ) {
290+ asm_thumb_mov_reg_i16 (as , OP_MOVW , reg_dest , i16_src );
310291}
311292
312- void asm_thumb_str_rlo_rlo_i5 (asm_thumb_t * as , uint rlo_src , uint rlo_base , uint word_offset ) {
313- asm_thumb_write_op16 (as , OP_STR_RLO_RLO_I5 (rlo_src , rlo_base , word_offset ));
293+ // the i16_src value will be zero extended into the r32 register!
294+ void asm_thumb_movt_reg_i16 (asm_thumb_t * as , uint reg_dest , int i16_src ) {
295+ asm_thumb_mov_reg_i16 (as , OP_MOVT , reg_dest , i16_src );
314296}
315297
316298void asm_thumb_ite_ge (asm_thumb_t * as ) {
@@ -353,7 +335,7 @@ void asm_thumb_mov_reg_i32(asm_thumb_t *as, uint reg_dest, machine_uint_t i32) {
353335
354336void asm_thumb_mov_reg_i32_optimised (asm_thumb_t * as , uint reg_dest , int i32 ) {
355337 if (reg_dest < 8 && UNSIGNED_FIT8 (i32 )) {
356- asm_thumb_movs_rlo_i8 (as , reg_dest , i32 );
338+ asm_thumb_mov_rlo_i8 (as , reg_dest , i32 );
357339 } else if (UNSIGNED_FIT16 (i32 )) {
358340 asm_thumb_mov_reg_i16 (as , OP_MOVW , reg_dest , i32 );
359341 } else {
@@ -452,7 +434,7 @@ void asm_thumb_bl_ind(asm_thumb_t *as, void *fun_ptr, uint fun_id, uint reg_temp
452434 asm_thumb_mov_reg_i32 (as , reg_temp , (machine_uint_t )fun_ptr );
453435 asm_thumb_write_op16 (as , OP_BLX (reg_temp ));
454436 } else if (1 ) {
455- asm_thumb_write_op16 (as , OP_LDR_RLO_RLO_I5 ( reg_temp , REG_R7 , fun_id ));
437+ asm_thumb_write_op16 (as , OP_FORMAT_9_10 ( ASM_THUMB_FORMAT_9_LDR | ASM_THUMB_FORMAT_9_WORD_TRANSFER , reg_temp , REG_R7 , fun_id ));
456438 asm_thumb_write_op16 (as , OP_BLX (reg_temp ));
457439 } else {
458440 // use SVC
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