@@ -86,22 +86,22 @@ volatile dma_idle_count_t dma_idle;
8686
8787#define DMA_CHANNEL_AS_UINT8 (dma_channel ) (((dma_channel) & DMA_SxCR_CHSEL) >> 24)
8888
89- void DMA1_Stream0_IRQHandler (void ) { if (dma_handle [0 ] != NULL ) { HAL_DMA_IRQHandler (dma_handle [0 ]); } }
90- void DMA1_Stream1_IRQHandler (void ) { if (dma_handle [1 ] != NULL ) { HAL_DMA_IRQHandler (dma_handle [1 ]); } }
91- void DMA1_Stream2_IRQHandler (void ) { if (dma_handle [2 ] != NULL ) { HAL_DMA_IRQHandler (dma_handle [2 ]); } }
92- void DMA1_Stream3_IRQHandler (void ) { if (dma_handle [3 ] != NULL ) { HAL_DMA_IRQHandler (dma_handle [3 ]); } }
93- void DMA1_Stream4_IRQHandler (void ) { if (dma_handle [4 ] != NULL ) { HAL_DMA_IRQHandler (dma_handle [4 ]); } }
94- void DMA1_Stream5_IRQHandler (void ) { if (dma_handle [5 ] != NULL ) { HAL_DMA_IRQHandler (dma_handle [5 ]); } }
95- void DMA1_Stream6_IRQHandler (void ) { if (dma_handle [6 ] != NULL ) { HAL_DMA_IRQHandler (dma_handle [6 ]); } }
96- void DMA1_Stream7_IRQHandler (void ) { if (dma_handle [7 ] != NULL ) { HAL_DMA_IRQHandler (dma_handle [7 ]); } }
97- void DMA2_Stream0_IRQHandler (void ) { if (dma_handle [8 ] != NULL ) { HAL_DMA_IRQHandler (dma_handle [8 ]); } }
98- void DMA2_Stream1_IRQHandler (void ) { if (dma_handle [9 ] != NULL ) { HAL_DMA_IRQHandler (dma_handle [9 ]); } }
99- void DMA2_Stream2_IRQHandler (void ) { if (dma_handle [10 ] != NULL ) { HAL_DMA_IRQHandler (dma_handle [10 ]); } }
100- void DMA2_Stream3_IRQHandler (void ) { if (dma_handle [11 ] != NULL ) { HAL_DMA_IRQHandler (dma_handle [11 ]); } }
101- void DMA2_Stream4_IRQHandler (void ) { if (dma_handle [12 ] != NULL ) { HAL_DMA_IRQHandler (dma_handle [12 ]); } }
102- void DMA2_Stream5_IRQHandler (void ) { if (dma_handle [13 ] != NULL ) { HAL_DMA_IRQHandler (dma_handle [13 ]); } }
103- void DMA2_Stream6_IRQHandler (void ) { if (dma_handle [14 ] != NULL ) { HAL_DMA_IRQHandler (dma_handle [14 ]); } }
104- void DMA2_Stream7_IRQHandler (void ) { if (dma_handle [15 ] != NULL ) { HAL_DMA_IRQHandler (dma_handle [15 ]); } }
89+ void DMA1_Stream0_IRQHandler (void ) { IRQ_ENTER ( DMA1_Stream0_IRQn ); if (dma_handle [0 ] != NULL ) { HAL_DMA_IRQHandler (dma_handle [0 ]); } IRQ_EXIT ( DMA1_Stream0_IRQn ); }
90+ void DMA1_Stream1_IRQHandler (void ) { IRQ_ENTER ( DMA1_Stream1_IRQn ); if (dma_handle [1 ] != NULL ) { HAL_DMA_IRQHandler (dma_handle [1 ]); } IRQ_EXIT ( DMA1_Stream1_IRQn ); }
91+ void DMA1_Stream2_IRQHandler (void ) { IRQ_ENTER ( DMA1_Stream2_IRQn ); if (dma_handle [2 ] != NULL ) { HAL_DMA_IRQHandler (dma_handle [2 ]); } IRQ_EXIT ( DMA1_Stream2_IRQn ); }
92+ void DMA1_Stream3_IRQHandler (void ) { IRQ_ENTER ( DMA1_Stream3_IRQn ); if (dma_handle [3 ] != NULL ) { HAL_DMA_IRQHandler (dma_handle [3 ]); } IRQ_EXIT ( DMA1_Stream3_IRQn ); }
93+ void DMA1_Stream4_IRQHandler (void ) { IRQ_ENTER ( DMA1_Stream4_IRQn ); if (dma_handle [4 ] != NULL ) { HAL_DMA_IRQHandler (dma_handle [4 ]); } IRQ_EXIT ( DMA1_Stream4_IRQn ); }
94+ void DMA1_Stream5_IRQHandler (void ) { IRQ_ENTER ( DMA1_Stream5_IRQn ); if (dma_handle [5 ] != NULL ) { HAL_DMA_IRQHandler (dma_handle [5 ]); } IRQ_EXIT ( DMA1_Stream5_IRQn ); }
95+ void DMA1_Stream6_IRQHandler (void ) { IRQ_ENTER ( DMA1_Stream6_IRQn ); if (dma_handle [6 ] != NULL ) { HAL_DMA_IRQHandler (dma_handle [6 ]); } IRQ_EXIT ( DMA1_Stream6_IRQn ); }
96+ void DMA1_Stream7_IRQHandler (void ) { IRQ_ENTER ( DMA1_Stream7_IRQn ); if (dma_handle [7 ] != NULL ) { HAL_DMA_IRQHandler (dma_handle [7 ]); } IRQ_EXIT ( DMA1_Stream7_IRQn ); }
97+ void DMA2_Stream0_IRQHandler (void ) { IRQ_ENTER ( DMA2_Stream0_IRQn ); if (dma_handle [8 ] != NULL ) { HAL_DMA_IRQHandler (dma_handle [8 ]); } IRQ_EXIT ( DMA2_Stream0_IRQn ); }
98+ void DMA2_Stream1_IRQHandler (void ) { IRQ_ENTER ( DMA2_Stream1_IRQn ); if (dma_handle [9 ] != NULL ) { HAL_DMA_IRQHandler (dma_handle [9 ]); } IRQ_EXIT ( DMA2_Stream1_IRQn ); }
99+ void DMA2_Stream2_IRQHandler (void ) { IRQ_ENTER ( DMA2_Stream2_IRQn ); if (dma_handle [10 ] != NULL ) { HAL_DMA_IRQHandler (dma_handle [10 ]); } IRQ_EXIT ( DMA2_Stream2_IRQn ); }
100+ void DMA2_Stream3_IRQHandler (void ) { IRQ_ENTER ( DMA2_Stream3_IRQn ); if (dma_handle [11 ] != NULL ) { HAL_DMA_IRQHandler (dma_handle [11 ]); } IRQ_EXIT ( DMA2_Stream3_IRQn ); }
101+ void DMA2_Stream4_IRQHandler (void ) { IRQ_ENTER ( DMA2_Stream4_IRQn ); if (dma_handle [12 ] != NULL ) { HAL_DMA_IRQHandler (dma_handle [12 ]); } IRQ_EXIT ( DMA2_Stream4_IRQn ); }
102+ void DMA2_Stream5_IRQHandler (void ) { IRQ_ENTER ( DMA2_Stream5_IRQn ); if (dma_handle [13 ] != NULL ) { HAL_DMA_IRQHandler (dma_handle [13 ]); } IRQ_EXIT ( DMA2_Stream5_IRQn ); }
103+ void DMA2_Stream6_IRQHandler (void ) { IRQ_ENTER ( DMA2_Stream6_IRQn ); if (dma_handle [14 ] != NULL ) { HAL_DMA_IRQHandler (dma_handle [14 ]); } IRQ_EXIT ( DMA2_Stream6_IRQn ); }
104+ void DMA2_Stream7_IRQHandler (void ) { IRQ_ENTER ( DMA2_Stream7_IRQn ); if (dma_handle [15 ] != NULL ) { HAL_DMA_IRQHandler (dma_handle [15 ]); } IRQ_EXIT ( DMA2_Stream7_IRQn ); }
105105
106106#define DMA1_IS_CLK_ENABLED () ((RCC->AHB1ENR & RCC_AHB1ENR_DMA1EN) != 0)
107107#define DMA2_IS_CLK_ENABLED () ((RCC->AHB1ENR & RCC_AHB1ENR_DMA2EN) != 0)
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