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Jagan Teki
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sf: Adopt flash table INFO macro from Linux
INFO macro make flash table entries more adjustable like adding new flash_info attributes, update ID length bytes and so on and more over it will sync to Linux way of defining flash_info attributes. - Add JEDEC_ID - Add JEDEC_EXT macro - Add JEDEC_MFR - spi_flash_params => spi_flash_info - params => info Cc: Simon Glass <sjg@chromium.org> Cc: Bin Meng <bmeng.cn@gmail.com> Cc: York Sun <york.sun@nxp.com> Cc: Vignesh R <vigneshr@ti.com> Cc: Mugunthan V N <mugunthanvnm@ti.com> Cc: Michal Simek <michal.simek@xilinx.com> Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@openedev.com> Signed-off-by: Jagan Teki <jagan@openedev.com>
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-180
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lines changed

‎drivers/mtd/spi/sandbox.c‎

Lines changed: 6 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -88,7 +88,7 @@ struct sandbox_spi_flash {
8888
/* The current flash status (see STAT_XXX defines above) */
8989
u16 status;
9090
/* Data describing the flash we're emulating */
91-
const struct spi_flash_params *data;
91+
const struct spi_flash_info *data;
9292
/* The file on disk to serv up data from */
9393
int fd;
9494
};
@@ -112,7 +112,7 @@ static int sandbox_sf_probe(struct udevice *dev)
112112
struct sandbox_spi_flash *sbsf = dev_get_priv(dev);
113113
const char *file;
114114
size_t len, idname_len;
115-
const struct spi_flash_params *data;
115+
const struct spi_flash_info *data;
116116
struct sandbox_spi_flash_plat_data *pdata = dev_get_platdata(dev);
117117
struct sandbox_state *state = state_get_current();
118118
struct udevice *bus = dev->parent;
@@ -168,7 +168,7 @@ static int sandbox_sf_probe(struct udevice *dev)
168168
}
169169
debug("%s: device='%s'\n", __func__, spec);
170170

171-
for (data = spi_flash_params_table; data->name; data++) {
171+
for (data = spi_flash_ids; data->name; data++) {
172172
len = strlen(data->name);
173173
if (idname_len != len)
174174
continue;
@@ -359,7 +359,9 @@ static int sandbox_sf_xfer(struct udevice *dev, unsigned int bitlen,
359359
debug(" id: off:%u tx:", sbsf->off);
360360
if (sbsf->off < IDCODE_LEN) {
361361
/* Extract correct byte from ID 0x00aabbcc */
362-
id = sbsf->data->jedec >>
362+
id = ((((sbsf->data)->id[0]) << 16) |
363+
(((sbsf->data)->id[1]) << 8 |
364+
((sbsf->data)->id[2]))) >>
363365
(8 * (IDCODE_LEN - 1 - sbsf->off));
364366
} else {
365367
id = 0;

‎drivers/mtd/spi/sf_internal.h‎

Lines changed: 19 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -103,24 +103,36 @@ int sst_write_bp(struct spi_flash *flash, u32 offset, size_t len,
103103
#define CMD_SPANSION_RDAR 0x65 /* Read any device register */
104104
#define CMD_SPANSION_WRAR 0x71 /* Write any device register */
105105
#endif
106+
107+
#define JEDEC_MFR(info) ((info)->id[0])
108+
#define JEDEC_ID(info) (((info)->id[1]) << 8 | ((info)->id[2]))
109+
#define JEDEC_EXT(info) (((info)->id[3]) << 8 | ((info)->id[4]))
110+
106111
/**
107-
* struct spi_flash_params - SPI/QSPI flash device params structure
112+
* struct spi_flash_info - SPI/QSPI flash device params structure
108113
*
109114
* @name: Device name ([MANUFLETTER][DEVTYPE][DENSITY][EXTRAINFO])
110-
* @jedec: Device jedec ID (0x[1byte_manuf_id][2byte_dev_id])
111-
* @ext_jedec: Device ext_jedec ID
112115
* @sector_size: Isn't necessarily a sector size from vendor,
113116
* the size listed here is what works with CMD_ERASE_64K
114117
* @nr_sectors: No.of sectors on this device
115118
* @flags: Important param, for flash specific behaviour
116119
*/
117-
struct spi_flash_params {
120+
struct spi_flash_info {
118121
const char *name;
119-
u32 jedec;
120-
u16 ext_jedec;
122+
123+
/*
124+
* This array stores the ID bytes.
125+
* The first three bytes are the JEDIC ID.
126+
* JEDEC ID zero means "no ID" (mostly older chips).
127+
*/
128+
u8 id[5];
129+
u8 id_len;
130+
121131
u32 sector_size;
122132
u32 nr_sectors;
123133

134+
u16 page_size;
135+
124136
u16 flags;
125137
#define SECT_4K BIT(0)
126138
#define E_FSR BIT(1)
@@ -133,7 +145,7 @@ struct spi_flash_params {
133145
#define RD_FULL (RD_QUAD | RD_DUAL | RD_QUADIO | RD_DUALIO)
134146
};
135147

136-
extern const struct spi_flash_params spi_flash_params_table[];
148+
extern const struct spi_flash_info spi_flash_ids[];
137149

138150
/* Send a single-byte command to the device and read the response */
139151
int spi_flash_cmd(struct spi_slave *spi, u8 cmd, void *response, size_t len);

‎drivers/mtd/spi/sf_params.c‎

Lines changed: 116 additions & 101 deletions
Original file line numberDiff line numberDiff line change
@@ -12,125 +12,140 @@
1212

1313
#include "sf_internal.h"
1414

15+
/* Used when the "_ext_id" is two bytes at most */
16+
#define INFO(_jedec_id, _ext_id, _sector_size, _n_sectors, _flags) \
17+
.id = { \
18+
((_jedec_id) >> 16) & 0xff, \
19+
((_jedec_id) >> 8) & 0xff, \
20+
(_jedec_id) & 0xff, \
21+
((_ext_id) >> 8) & 0xff, \
22+
(_ext_id) & 0xff, \
23+
}, \
24+
.id_len = (!(_jedec_id) ? 0 : (3 + ((_ext_id) ? 2 : 0))), \
25+
.sector_size = (_sector_size), \
26+
.nr_sectors = (_n_sectors), \
27+
.page_size = 256, \
28+
.flags = (_flags),
29+
1530
/* SPI/QSPI flash device params structure */
16-
const struct spi_flash_params spi_flash_params_table[] = {
31+
const struct spi_flash_info spi_flash_ids[] = {
1732
#ifdef CONFIG_SPI_FLASH_ATMEL /* ATMEL */
18-
{"AT45DB011D", 0x1f2200, 0x0, 64 * 1024, 4, SECT_4K},
19-
{"AT45DB021D", 0x1f2300, 0x0, 64 * 1024, 8, SECT_4K},
20-
{"AT45DB041D", 0x1f2400, 0x0, 64 * 1024, 8, SECT_4K},
21-
{"AT45DB081D", 0x1f2500, 0x0, 64 * 1024, 16, SECT_4K},
22-
{"AT45DB161D", 0x1f2600, 0x0, 64 * 1024, 32, SECT_4K},
23-
{"AT45DB321D", 0x1f2700, 0x0, 64 * 1024, 64, SECT_4K},
24-
{"AT45DB641D", 0x1f2800, 0x0, 64 * 1024, 128, SECT_4K},
25-
{"AT25DF321A", 0x1f4701, 0x0, 64 * 1024, 64, SECT_4K},
26-
{"AT25DF321", 0x1f4700, 0x0, 64 * 1024, 64, SECT_4K},
27-
{"AT26DF081A", 0x1f4501, 0x0, 64 * 1024, 16, SECT_4K},
33+
{"AT45DB011D", INFO(0x1f2200, 0x0, 64 * 1024, 4, SECT_4K) },
34+
{"AT45DB021D", INFO(0x1f2300, 0x0, 64 * 1024, 8, SECT_4K) },
35+
{"AT45DB041D", INFO(0x1f2400, 0x0, 64 * 1024, 8, SECT_4K) },
36+
{"AT45DB081D", INFO(0x1f2500, 0x0, 64 * 1024, 16, SECT_4K) },
37+
{"AT45DB161D", INFO(0x1f2600, 0x0, 64 * 1024, 32, SECT_4K) },
38+
{"AT45DB321D", INFO(0x1f2700, 0x0, 64 * 1024, 64, SECT_4K) },
39+
{"AT45DB641D", INFO(0x1f2800, 0x0, 64 * 1024, 128, SECT_4K) },
40+
{"AT25DF321A", INFO(0x1f4701, 0x0, 64 * 1024, 64, SECT_4K) },
41+
{"AT25DF321", INFO(0x1f4700, 0x0, 64 * 1024, 64, SECT_4K) },
42+
{"AT26DF081A", INFO(0x1f4501, 0x0, 64 * 1024, 16, SECT_4K) },
2843
#endif
2944
#ifdef CONFIG_SPI_FLASH_EON /* EON */
30-
{"EN25Q32B", 0x1c3016, 0x0, 64 * 1024, 64, 0},
31-
{"EN25Q64", 0x1c3017, 0x0, 64 * 1024, 128, SECT_4K},
32-
{"EN25Q128B", 0x1c3018, 0x0, 64 * 1024, 256, 0},
33-
{"EN25S64", 0x1c3817, 0x0, 64 * 1024, 128, 0},
45+
{"EN25Q32B", INFO(0x1c3016, 0x0, 64 * 1024, 64, 0) },
46+
{"EN25Q64", INFO(0x1c3017, 0x0, 64 * 1024, 128, SECT_4K) },
47+
{"EN25Q128B", INFO(0x1c3018, 0x0, 64 * 1024, 256, 0) },
48+
{"EN25S64", INFO(0x1c3817, 0x0, 64 * 1024, 128, 0) },
3449
#endif
3550
#ifdef CONFIG_SPI_FLASH_GIGADEVICE /* GIGADEVICE */
36-
{"GD25Q64B", 0xc84017, 0x0, 64 * 1024, 128, SECT_4K},
37-
{"GD25LQ32", 0xc86016, 0x0, 64 * 1024, 64, SECT_4K},
51+
{"GD25Q64B", INFO(0xc84017, 0x0, 64 * 1024, 128, SECT_4K) },
52+
{"GD25LQ32", INFO(0xc86016, 0x0, 64 * 1024, 64, SECT_4K) },
3853
#endif
3954
#ifdef CONFIG_SPI_FLASH_ISSI /* ISSI */
40-
{"IS25LP032", 0x9d6016, 0x0, 64 * 1024, 64, 0},
41-
{"IS25LP064", 0x9d6017, 0x0, 64 * 1024, 128, 0},
42-
{"IS25LP128", 0x9d6018, 0x0, 64 * 1024, 256, 0},
55+
{"IS25LP032", INFO(0x9d6016, 0x0, 64 * 1024, 64, 0) },
56+
{"IS25LP064", INFO(0x9d6017, 0x0, 64 * 1024, 128, 0) },
57+
{"IS25LP128", INFO(0x9d6018, 0x0, 64 * 1024, 256, 0) },
4358
#endif
4459
#ifdef CONFIG_SPI_FLASH_MACRONIX /* MACRONIX */
45-
{"MX25L2006E", 0xc22012, 0x0, 64 * 1024, 4, 0},
46-
{"MX25L4005", 0xc22013, 0x0, 64 * 1024, 8, 0},
47-
{"MX25L8005", 0xc22014, 0x0, 64 * 1024, 16, 0},
48-
{"MX25L1605D", 0xc22015, 0x0, 64 * 1024, 32, 0},
49-
{"MX25L3205D", 0xc22016, 0x0, 64 * 1024, 64, 0},
50-
{"MX25L6405D", 0xc22017, 0x0, 64 * 1024, 128, 0},
51-
{"MX25L12805", 0xc22018, 0x0, 64 * 1024, 256, RD_FULL | WR_QPP},
52-
{"MX25L25635F", 0xc22019, 0x0, 64 * 1024, 512, RD_FULL | WR_QPP},
53-
{"MX25L51235F", 0xc2201a, 0x0, 64 * 1024, 1024, RD_FULL | WR_QPP},
54-
{"MX25L12855E", 0xc22618, 0x0, 64 * 1024, 256, RD_FULL | WR_QPP},
60+
{"MX25L2006E", INFO(0xc22012, 0x0, 64 * 1024, 4, 0) },
61+
{"MX25L4005", INFO(0xc22013, 0x0, 64 * 1024, 8, 0) },
62+
{"MX25L8005", INFO(0xc22014, 0x0, 64 * 1024, 16, 0) },
63+
{"MX25L1605D", INFO(0xc22015, 0x0, 64 * 1024, 32, 0) },
64+
{"MX25L3205D", INFO(0xc22016, 0x0, 64 * 1024, 64, 0) },
65+
{"MX25L6405D", INFO(0xc22017, 0x0, 64 * 1024, 128, 0) },
66+
{"MX25L12805", INFO(0xc22018, 0x0, 64 * 1024, 256, RD_FULL | WR_QPP) },
67+
{"MX25L25635F", INFO(0xc22019, 0x0, 64 * 1024, 512, RD_FULL | WR_QPP) },
68+
{"MX25L51235F", INFO(0xc2201a, 0x0, 64 * 1024, 1024, RD_FULL | WR_QPP) },
69+
{"MX25L12855E", INFO(0xc22618, 0x0, 64 * 1024, 256, RD_FULL | WR_QPP) },
5570
#endif
5671
#ifdef CONFIG_SPI_FLASH_SPANSION /* SPANSION */
57-
{"S25FL008A", 0x010213, 0x0, 64 * 1024, 16, 0},
58-
{"S25FL016A", 0x010214, 0x0, 64 * 1024, 32, 0},
59-
{"S25FL032A", 0x010215, 0x0, 64 * 1024, 64, 0},
60-
{"S25FL064A", 0x010216, 0x0, 64 * 1024, 128, 0},
61-
{"S25FL116K", 0x014015, 0x0, 64 * 1024, 128, 0},
62-
{"S25FL164K", 0x014017, 0x0140, 64 * 1024, 128, 0},
63-
{"S25FL128P_256K", 0x012018, 0x0300, 256 * 1024, 64, RD_FULL | WR_QPP},
64-
{"S25FL128P_64K", 0x012018, 0x0301, 64 * 1024, 256, RD_FULL | WR_QPP},
65-
{"S25FL032P", 0x010215, 0x4d00, 64 * 1024, 64, RD_FULL | WR_QPP},
66-
{"S25FL064P", 0x010216, 0x4d00, 64 * 1024, 128, RD_FULL | WR_QPP},
67-
{"S25FL128S_256K", 0x012018, 0x4d00, 256 * 1024, 64, RD_FULL | WR_QPP},
68-
{"S25FL128S_64K", 0x012018, 0x4d01, 64 * 1024, 256, RD_FULL | WR_QPP},
69-
{"S25FL256S_256K", 0x010219, 0x4d00, 256 * 1024, 128, RD_FULL | WR_QPP},
70-
{"S25FL256S_64K", 0x010219, 0x4d01, 64 * 1024, 512, RD_FULL | WR_QPP},
71-
{"S25FS512S", 0x010220, 0x4D00, 128 * 1024, 512, RD_FULL | WR_QPP},
72-
{"S25FL512S_256K", 0x010220, 0x4d00, 256 * 1024, 256, RD_FULL | WR_QPP},
73-
{"S25FL512S_64K", 0x010220, 0x4d01, 64 * 1024, 1024, RD_FULL | WR_QPP},
74-
{"S25FL512S_512K", 0x010220, 0x4f00, 256 * 1024, 256, RD_FULL | WR_QPP},
72+
{"S25FL008A", INFO(0x010213, 0x0, 64 * 1024, 16, 0) },
73+
{"S25FL016A", INFO(0x010214, 0x0, 64 * 1024, 32, 0) },
74+
{"S25FL032A", INFO(0x010215, 0x0, 64 * 1024, 64, 0) },
75+
{"S25FL064A", INFO(0x010216, 0x0, 64 * 1024, 128, 0) },
76+
{"S25FL116K", INFO(0x014015, 0x0, 64 * 1024, 128, 0) },
77+
{"S25FL164K", INFO(0x014017, 0x0140, 64 * 1024, 128, 0) },
78+
{"S25FL128P_256K", INFO(0x012018, 0x0300, 256 * 1024, 64, RD_FULL | WR_QPP) },
79+
{"S25FL128P_64K", INFO(0x012018, 0x0301, 64 * 1024, 256, RD_FULL | WR_QPP) },
80+
{"S25FL032P", INFO(0x010215, 0x4d00, 64 * 1024, 64, RD_FULL | WR_QPP) },
81+
{"S25FL064P", INFO(0x010216, 0x4d00, 64 * 1024, 128, RD_FULL | WR_QPP) },
82+
{"S25FL128S_256K", INFO(0x012018, 0x4d00, 256 * 1024, 64, RD_FULL | WR_QPP) },
83+
{"S25FL128S_64K", INFO(0x012018, 0x4d01, 64 * 1024, 256, RD_FULL | WR_QPP) },
84+
{"S25FL256S_256K", INFO(0x010219, 0x4d00, 256 * 1024, 128, RD_FULL | WR_QPP) },
85+
{"S25FL256S_64K", INFO(0x010219, 0x4d01, 64 * 1024, 512, RD_FULL | WR_QPP) },
86+
{"S25FS512S", INFO(0x010220, 0x4D00, 128 * 1024, 512, RD_FULL | WR_QPP) },
87+
{"S25FL512S_256K", INFO(0x010220, 0x4d00, 256 * 1024, 256, RD_FULL | WR_QPP) },
88+
{"S25FL512S_64K", INFO(0x010220, 0x4d01, 64 * 1024, 1024, RD_FULL | WR_QPP) },
89+
{"S25FL512S_512K", INFO(0x010220, 0x4f00, 256 * 1024, 256, RD_FULL | WR_QPP) },
7590
#endif
7691
#ifdef CONFIG_SPI_FLASH_STMICRO /* STMICRO */
77-
{"M25P10", 0x202011, 0x0, 32 * 1024, 4, 0},
78-
{"M25P20", 0x202012, 0x0, 64 * 1024, 4, 0},
79-
{"M25P40", 0x202013, 0x0, 64 * 1024, 8, 0},
80-
{"M25P80", 0x202014, 0x0, 64 * 1024, 16, 0},
81-
{"M25P16", 0x202015, 0x0, 64 * 1024, 32, 0},
82-
{"M25PE16", 0x208015, 0x1000, 64 * 1024, 32, 0},
83-
{"M25PX16", 0x207115, 0x1000, 64 * 1024, 32, RD_QUAD | RD_DUAL},
84-
{"M25P32", 0x202016, 0x0, 64 * 1024, 64, 0},
85-
{"M25P64", 0x202017, 0x0, 64 * 1024, 128, 0},
86-
{"M25P128", 0x202018, 0x0, 256 * 1024, 64, 0},
87-
{"M25PX64", 0x207117, 0x0, 64 * 1024, 128, SECT_4K},
88-
{"N25Q016A", 0x20bb15, 0x0, 64 * 1024, 32, SECT_4K},
89-
{"N25Q32", 0x20ba16, 0x0, 64 * 1024, 64, RD_FULL | WR_QPP | SECT_4K},
90-
{"N25Q32A", 0x20bb16, 0x0, 64 * 1024, 64, RD_FULL | WR_QPP | SECT_4K},
91-
{"N25Q64", 0x20ba17, 0x0, 64 * 1024, 128, RD_FULL | WR_QPP | SECT_4K},
92-
{"N25Q64A", 0x20bb17, 0x0, 64 * 1024, 128, RD_FULL | WR_QPP | SECT_4K},
93-
{"N25Q128", 0x20ba18, 0x0, 64 * 1024, 256, RD_FULL | WR_QPP},
94-
{"N25Q128A", 0x20bb18, 0x0, 64 * 1024, 256, RD_FULL | WR_QPP},
95-
{"N25Q256", 0x20ba19, 0x0, 64 * 1024, 512, RD_FULL | WR_QPP | SECT_4K},
96-
{"N25Q256A", 0x20bb19, 0x0, 64 * 1024, 512, RD_FULL | WR_QPP | SECT_4K},
97-
{"N25Q512", 0x20ba20, 0x0, 64 * 1024, 1024, RD_FULL | WR_QPP | E_FSR | SECT_4K},
98-
{"N25Q512A", 0x20bb20, 0x0, 64 * 1024, 1024, RD_FULL | WR_QPP | E_FSR | SECT_4K},
99-
{"N25Q1024", 0x20ba21, 0x0, 64 * 1024, 2048, RD_FULL | WR_QPP | E_FSR | SECT_4K},
100-
{"N25Q1024A", 0x20bb21, 0x0, 64 * 1024, 2048, RD_FULL | WR_QPP | E_FSR | SECT_4K},
92+
{"M25P10", INFO(0x202011, 0x0, 32 * 1024, 4, 0) },
93+
{"M25P20", INFO(0x202012, 0x0, 64 * 1024, 4, 0) },
94+
{"M25P40", INFO(0x202013, 0x0, 64 * 1024, 8, 0) },
95+
{"M25P80", INFO(0x202014, 0x0, 64 * 1024, 16, 0) },
96+
{"M25P16", INFO(0x202015, 0x0, 64 * 1024, 32, 0) },
97+
{"M25PE16", INFO(0x208015, 0x1000, 64 * 1024, 32, 0) },
98+
{"M25PX16", INFO(0x207115, 0x1000, 64 * 1024, 32, RD_QUAD | RD_DUAL) },
99+
{"M25P32", INFO(0x202016, 0x0, 64 * 1024, 64, 0) },
100+
{"M25P64", INFO(0x202017, 0x0, 64 * 1024, 128, 0) },
101+
{"M25P128", INFO(0x202018, 0x0, 256 * 1024, 64, 0) },
102+
{"M25PX64", INFO(0x207117, 0x0, 64 * 1024, 128, SECT_4K) },
103+
{"N25Q016A", INFO(0x20bb15, 0x0, 64 * 1024, 32, SECT_4K) },
104+
{"N25Q32", INFO(0x20ba16, 0x0, 64 * 1024, 64, RD_FULL | WR_QPP | SECT_4K) },
105+
{"N25Q32A", INFO(0x20bb16, 0x0, 64 * 1024, 64, RD_FULL | WR_QPP | SECT_4K) },
106+
{"N25Q64", INFO(0x20ba17, 0x0, 64 * 1024, 128, RD_FULL | WR_QPP | SECT_4K) },
107+
{"N25Q64A", INFO(0x20bb17, 0x0, 64 * 1024, 128, RD_FULL | WR_QPP | SECT_4K) },
108+
{"N25Q128", INFO(0x20ba18, 0x0, 64 * 1024, 256, RD_FULL | WR_QPP) },
109+
{"N25Q128A", INFO(0x20bb18, 0x0, 64 * 1024, 256, RD_FULL | WR_QPP) },
110+
{"N25Q256", INFO(0x20ba19, 0x0, 64 * 1024, 512, RD_FULL | WR_QPP | SECT_4K) },
111+
{"N25Q256A", INFO(0x20bb19, 0x0, 64 * 1024, 512, RD_FULL | WR_QPP | SECT_4K) },
112+
{"N25Q512", INFO(0x20ba20, 0x0, 64 * 1024, 1024, RD_FULL | WR_QPP | E_FSR | SECT_4K) },
113+
{"N25Q512A", INFO(0x20bb20, 0x0, 64 * 1024, 1024, RD_FULL | WR_QPP | E_FSR | SECT_4K) },
114+
{"N25Q1024", INFO(0x20ba21, 0x0, 64 * 1024, 2048, RD_FULL | WR_QPP | E_FSR | SECT_4K) },
115+
{"N25Q1024A", INFO(0x20bb21, 0x0, 64 * 1024, 2048, RD_FULL | WR_QPP | E_FSR | SECT_4K) },
101116
#endif
102117
#ifdef CONFIG_SPI_FLASH_SST /* SST */
103-
{"SST25VF040B", 0xbf258d, 0x0, 64 * 1024, 8, SECT_4K | SST_WR},
104-
{"SST25VF080B", 0xbf258e, 0x0, 64 * 1024, 16, SECT_4K | SST_WR},
105-
{"SST25VF016B", 0xbf2541, 0x0, 64 * 1024, 32, SECT_4K | SST_WR},
106-
{"SST25VF032B", 0xbf254a, 0x0, 64 * 1024, 64, SECT_4K | SST_WR},
107-
{"SST25VF064C", 0xbf254b, 0x0, 64 * 1024, 128, SECT_4K},
108-
{"SST25WF512", 0xbf2501, 0x0, 64 * 1024, 1, SECT_4K | SST_WR},
109-
{"SST25WF010", 0xbf2502, 0x0, 64 * 1024, 2, SECT_4K | SST_WR},
110-
{"SST25WF020", 0xbf2503, 0x0, 64 * 1024, 4, SECT_4K | SST_WR},
111-
{"SST25WF040", 0xbf2504, 0x0, 64 * 1024, 8, SECT_4K | SST_WR},
112-
{"SST25WF040B", 0x621613, 0x0, 64 * 1024, 8, SECT_4K},
113-
{"SST25WF080", 0xbf2505, 0x0, 64 * 1024, 16, SECT_4K | SST_WR},
118+
{"SST25VF040B", INFO(0xbf258d, 0x0, 64 * 1024, 8, SECT_4K | SST_WR) },
119+
{"SST25VF080B", INFO(0xbf258e, 0x0, 64 * 1024, 16, SECT_4K | SST_WR) },
120+
{"SST25VF016B", INFO(0xbf2541, 0x0, 64 * 1024, 32, SECT_4K | SST_WR) },
121+
{"SST25VF032B", INFO(0xbf254a, 0x0, 64 * 1024, 64, SECT_4K | SST_WR) },
122+
{"SST25VF064C", INFO(0xbf254b, 0x0, 64 * 1024, 128, SECT_4K) },
123+
{"SST25WF512", INFO(0xbf2501, 0x0, 64 * 1024, 1, SECT_4K | SST_WR) },
124+
{"SST25WF010", INFO(0xbf2502, 0x0, 64 * 1024, 2, SECT_4K | SST_WR) },
125+
{"SST25WF020", INFO(0xbf2503, 0x0, 64 * 1024, 4, SECT_4K | SST_WR) },
126+
{"SST25WF040", INFO(0xbf2504, 0x0, 64 * 1024, 8, SECT_4K | SST_WR) },
127+
{"SST25WF040B", INFO(0x621613, 0x0, 64 * 1024, 8, SECT_4K) },
128+
{"SST25WF080", INFO(0xbf2505, 0x0, 64 * 1024, 16, SECT_4K | SST_WR) },
114129
#endif
115130
#ifdef CONFIG_SPI_FLASH_WINBOND /* WINBOND */
116-
{"W25P80", 0xef2014, 0x0, 64 * 1024, 16, 0},
117-
{"W25P16", 0xef2015, 0x0, 64 * 1024, 32, 0},
118-
{"W25P32", 0xef2016, 0x0, 64 * 1024, 64, 0},
119-
{"W25X40", 0xef3013, 0x0, 64 * 1024, 8, SECT_4K},
120-
{"W25X16", 0xef3015, 0x0, 64 * 1024, 32, SECT_4K},
121-
{"W25X32", 0xef3016, 0x0, 64 * 1024, 64, SECT_4K},
122-
{"W25X64", 0xef3017, 0x0, 64 * 1024, 128, SECT_4K},
123-
{"W25Q80BL", 0xef4014, 0x0, 64 * 1024, 16, RD_FULL | WR_QPP | SECT_4K},
124-
{"W25Q16CL", 0xef4015, 0x0, 64 * 1024, 32, RD_FULL | WR_QPP | SECT_4K},
125-
{"W25Q32BV", 0xef4016, 0x0, 64 * 1024, 64, RD_FULL | WR_QPP | SECT_4K},
126-
{"W25Q64CV", 0xef4017, 0x0, 64 * 1024, 128, RD_FULL | WR_QPP | SECT_4K},
127-
{"W25Q128BV", 0xef4018, 0x0, 64 * 1024, 256, RD_FULL | WR_QPP | SECT_4K},
128-
{"W25Q256", 0xef4019, 0x0, 64 * 1024, 512, RD_FULL | WR_QPP | SECT_4K},
129-
{"W25Q80BW", 0xef5014, 0x0, 64 * 1024, 16, RD_FULL | WR_QPP | SECT_4K},
130-
{"W25Q16DW", 0xef6015, 0x0, 64 * 1024, 32, RD_FULL | WR_QPP | SECT_4K},
131-
{"W25Q32DW", 0xef6016, 0x0, 64 * 1024, 64, RD_FULL | WR_QPP | SECT_4K},
132-
{"W25Q64DW", 0xef6017, 0x0, 64 * 1024, 128, RD_FULL | WR_QPP | SECT_4K},
133-
{"W25Q128FW", 0xef6018, 0x0, 64 * 1024, 256, RD_FULL | WR_QPP | SECT_4K},
131+
{"W25P80", INFO(0xef2014, 0x0, 64 * 1024, 16, 0) },
132+
{"W25P16", INFO(0xef2015, 0x0, 64 * 1024, 32, 0) },
133+
{"W25P32", INFO(0xef2016, 0x0, 64 * 1024, 64, 0) },
134+
{"W25X40", INFO(0xef3013, 0x0, 64 * 1024, 8, SECT_4K) },
135+
{"W25X16", INFO(0xef3015, 0x0, 64 * 1024, 32, SECT_4K) },
136+
{"W25X32", INFO(0xef3016, 0x0, 64 * 1024, 64, SECT_4K) },
137+
{"W25X64", INFO(0xef3017, 0x0, 64 * 1024, 128, SECT_4K) },
138+
{"W25Q80BL", INFO(0xef4014, 0x0, 64 * 1024, 16, RD_FULL | WR_QPP | SECT_4K) },
139+
{"W25Q16CL", INFO(0xef4015, 0x0, 64 * 1024, 32, RD_FULL | WR_QPP | SECT_4K) },
140+
{"W25Q32BV", INFO(0xef4016, 0x0, 64 * 1024, 64, RD_FULL | WR_QPP | SECT_4K) },
141+
{"W25Q64CV", INFO(0xef4017, 0x0, 64 * 1024, 128, RD_FULL | WR_QPP | SECT_4K) },
142+
{"W25Q128BV", INFO(0xef4018, 0x0, 64 * 1024, 256, RD_FULL | WR_QPP | SECT_4K) },
143+
{"W25Q256", INFO(0xef4019, 0x0, 64 * 1024, 512, RD_FULL | WR_QPP | SECT_4K) },
144+
{"W25Q80BW", INFO(0xef5014, 0x0, 64 * 1024, 16, RD_FULL | WR_QPP | SECT_4K) },
145+
{"W25Q16DW", INFO(0xef6015, 0x0, 64 * 1024, 32, RD_FULL | WR_QPP | SECT_4K) },
146+
{"W25Q32DW", INFO(0xef6016, 0x0, 64 * 1024, 64, RD_FULL | WR_QPP | SECT_4K) },
147+
{"W25Q64DW", INFO(0xef6017, 0x0, 64 * 1024, 128, RD_FULL | WR_QPP | SECT_4K) },
148+
{"W25Q128FW", INFO(0xef6018, 0x0, 64 * 1024, 256, RD_FULL | WR_QPP | SECT_4K) },
134149
#endif
135150
{}, /* Empty entry to terminate the list */
136151
/*

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