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Commit 3f0f867

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Linus Walleij
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gpiolib: let gpiochip_add_pin_range() specify offset
Like with commit 3c739ad it is not always enough to specify all the pins of a gpio_chip from offset zero to be added to a pin map range, since the mapping from GPIO to pin controller may not be linear at all, but need to be broken into a few consecutive sub-ranges or 1-pin entries for complicated cases. The ranges may also be sparse. This alters the signature of the function to accept offsets into both the GPIO-chip local pinspace and the pin controller local pinspace. Reviewed-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Viresh Kumar <viresh.kumar@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
1 parent 5212d09 commit 3f0f867

4 files changed

Lines changed: 47 additions & 6 deletions

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drivers/gpio/gpiolib-of.c

Lines changed: 12 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -238,8 +238,20 @@ static void of_gpiochip_add_pin_range(struct gpio_chip *chip)
238238
if (!pctldev)
239239
break;
240240

241+
/*
242+
* This assumes that the n GPIO pins are consecutive in the
243+
* GPIO number space, and that the pins are also consecutive
244+
* in their local number space. Currently it is not possible
245+
* to add different ranges for one and the same GPIO chip,
246+
* as the code assumes that we have one consecutive range
247+
* on both, mapping 1-to-1.
248+
*
249+
* TODO: make the OF bindings handle multiple sparse ranges
250+
* on the same GPIO chip.
251+
*/
241252
ret = gpiochip_add_pin_range(chip,
242253
pinctrl_dev_get_name(pctldev),
254+
0, /* offset in gpiochip */
243255
pinspec.args[0],
244256
pinspec.args[1]);
245257

drivers/gpio/gpiolib.c

Lines changed: 29 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -1187,31 +1187,56 @@ EXPORT_SYMBOL_GPL(gpiochip_find);
11871187

11881188
#ifdef CONFIG_PINCTRL
11891189

1190+
/**
1191+
* gpiochip_add_pin_range() - add a range for GPIO <-> pin mapping
1192+
* @chip: the gpiochip to add the range for
1193+
* @pinctrl_name: the dev_name() of the pin controller to map to
1194+
* @offset: the start offset in the current gpio_chip number space
1195+
* @pin_base: the start offset in the pin controller number space
1196+
* @npins: the number of pins from the offset of each pin space (GPIO and
1197+
* pin controller) to accumulate in this range
1198+
*/
11901199
int gpiochip_add_pin_range(struct gpio_chip *chip, const char *pinctl_name,
1191-
unsigned int pin_base, unsigned int npins)
1200+
unsigned int offset, unsigned int pin_base,
1201+
unsigned int npins)
11921202
{
11931203
struct gpio_pin_range *pin_range;
11941204

1195-
pin_range = devm_kzalloc(chip->dev, sizeof(*pin_range), GFP_KERNEL);
1205+
pin_range = kzalloc(sizeof(*pin_range), GFP_KERNEL);
11961206
if (!pin_range) {
11971207
pr_err("%s: GPIO chip: failed to allocate pin ranges\n",
11981208
chip->label);
11991209
return -ENOMEM;
12001210
}
12011211

1212+
/* Use local offset as range ID */
1213+
pin_range->range.id = offset;
1214+
pin_range->range.gc = chip;
12021215
pin_range->range.name = chip->label;
1203-
pin_range->range.base = chip->base;
1216+
pin_range->range.base = chip->base + offset;
12041217
pin_range->range.pin_base = pin_base;
12051218
pin_range->range.npins = npins;
12061219
pin_range->pctldev = find_pinctrl_and_add_gpio_range(pinctl_name,
12071220
&pin_range->range);
1221+
if (!pin_range->pctldev) {
1222+
pr_err("%s: GPIO chip: could not create pin range\n",
1223+
chip->label);
1224+
kfree(pin_range);
1225+
}
1226+
pr_debug("%s: GPIO chip: created GPIO range %d->%d ==> PIN %d->%d\n",
1227+
chip->label, offset, offset + npins - 1,
1228+
pin_base, pin_base + npins - 1);
12081229

12091230
list_add_tail(&pin_range->node, &chip->pin_ranges);
12101231

12111232
return 0;
12121233
}
12131234
EXPORT_SYMBOL_GPL(gpiochip_add_pin_range);
12141235

1236+
/**
1237+
* gpiochip_remove_pin_ranges() - remove all the GPIO <-> pin mappings
1238+
* @chip: the chip to remove all the mappings for
1239+
*/
12151240
void gpiochip_remove_pin_ranges(struct gpio_chip *chip)
12161241
{
12171242
struct gpio_pin_range *pin_range, *tmp;
@@ -1220,6 +1245,7 @@ void gpiochip_remove_pin_ranges(struct gpio_chip *chip)
12201245
list_del(&pin_range->node);
12211246
pinctrl_remove_gpio_range(pin_range->pctldev,
12221247
&pin_range->range);
1248+
kfree(pin_range);
12231249
}
12241250
}
12251251
EXPORT_SYMBOL_GPL(gpiochip_remove_pin_ranges);

include/asm-generic/gpio.h

Lines changed: 4 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -283,14 +283,16 @@ struct gpio_pin_range {
283283
};
284284

285285
int gpiochip_add_pin_range(struct gpio_chip *chip, const char *pinctl_name,
286-
unsigned int pin_base, unsigned int npins);
286+
unsigned int offset, unsigned int pin_base,
287+
unsigned int npins);
287288
void gpiochip_remove_pin_ranges(struct gpio_chip *chip);
288289

289290
#else
290291

291292
static inline int
292293
gpiochip_add_pin_range(struct gpio_chip *chip, const char *pinctl_name,
293-
unsigned int pin_base, unsigned int npins)
294+
unsigned int offset, unsigned int pin_base,
295+
unsigned int npins)
294296
{
295297
return 0;
296298
}

include/linux/gpio.h

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -233,7 +233,8 @@ static inline int irq_to_gpio(unsigned irq)
233233

234234
static inline int
235235
gpiochip_add_pin_range(struct gpio_chip *chip, const char *pinctl_name,
236-
unsigned int pin_base, unsigned int npins)
236+
unsigned int offset, unsigned int pin_base,
237+
unsigned int npins)
237238
{
238239
WARN_ON(1);
239240
return -EINVAL;

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