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stmhal: Add support for STM32F411 MCU.
1 parent 3e59253 commit b42a505

4 files changed

Lines changed: 216 additions & 2 deletions

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‎stmhal/adc.c‎

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -58,7 +58,8 @@
5858

5959
#if defined(STM32F405xx) || defined(STM32F415xx) || \
6060
defined(STM32F407xx) || defined(STM32F417xx) || \
61-
defined(STM32F401xC) || defined(STM32F401xE)
61+
defined(STM32F401xC) || defined(STM32F401xE) || \
62+
defined(STM32F411xE)
6263
#define VBAT_DIV (2)
6364
#elif defined(STM32F427xx) || defined(STM32F429xx) || \
6465
defined(STM32F437xx) || defined(STM32F439xx)

‎stmhal/boards/stm32f411.ld‎

Lines changed: 129 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,129 @@
1+
/*
2+
GNU linker script for STM32F411
3+
*/
4+
5+
/* Specify the memory areas */
6+
MEMORY
7+
{
8+
FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 0x080000 /* entire flash, 512 KiB */
9+
FLASH_ISR (rx) : ORIGIN = 0x08000000, LENGTH = 0x004000 /* sector 0, 16 KiB */
10+
FLASH_TEXT (rx) : ORIGIN = 0x08020000, LENGTH = 0x060000 /* sectors 5,6,7 4*128KiB = 384 KiB */
11+
RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 0x020000 /* 128 KiB */
12+
}
13+
14+
/* produce a link error if there is not this amount of RAM for these sections */
15+
_minimum_stack_size = 2K;
16+
_minimum_heap_size = 16K;
17+
18+
/* top end of the stack */
19+
20+
/*_stack_end = ORIGIN(RAM) + LENGTH(RAM);*/
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_estack = ORIGIN(RAM) + LENGTH(RAM) - 1;
22+
23+
/* RAM extents for the garbage collector */
24+
_ram_end = ORIGIN(RAM) + LENGTH(RAM);
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_heap_end = 0x2001c000; /* tunable */
26+
27+
/* define output sections */
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SECTIONS
29+
{
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/* The startup code goes first into FLASH */
31+
.isr_vector :
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{
33+
. = ALIGN(4);
34+
KEEP(*(.isr_vector)) /* Startup code */
35+
36+
. = ALIGN(4);
37+
} >FLASH_ISR
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/* The program code and other data goes into FLASH */
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.text :
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{
42+
. = ALIGN(4);
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*(.text) /* .text sections (code) */
44+
*(.text*) /* .text* sections (code) */
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*(.rodata) /* .rodata sections (constants, strings, etc.) */
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*(.rodata*) /* .rodata* sections (constants, strings, etc.) */
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/* *(.glue_7) */ /* glue arm to thumb code */
48+
/* *(.glue_7t) */ /* glue thumb to arm code */
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. = ALIGN(4);
51+
_etext = .; /* define a global symbol at end of code */
52+
} >FLASH_TEXT
53+
54+
/*
55+
.ARM.extab :
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{
57+
*(.ARM.extab* .gnu.linkonce.armextab.*)
58+
} >FLASH
59+
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.ARM :
61+
{
62+
__exidx_start = .;
63+
*(.ARM.exidx*)
64+
__exidx_end = .;
65+
} >FLASH
66+
*/
67+
68+
/* used by the startup to initialize data */
69+
_sidata = LOADADDR(.data);
70+
71+
/* This is the initialized data section
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The program executes knowing that the data is in the RAM
73+
but the loader puts the initial values in the FLASH (inidata).
74+
It is one task of the startup to copy the initial values from FLASH to RAM. */
75+
.data :
76+
{
77+
. = ALIGN(4);
78+
_sdata = .; /* create a global symbol at data start; used by startup code in order to initialise the .data section in RAM */
79+
_ram_start = .; /* create a global symbol at ram start for garbage collector */
80+
*(.data) /* .data sections */
81+
*(.data*) /* .data* sections */
82+
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. = ALIGN(4);
84+
_edata = .; /* define a global symbol at data end; used by startup code in order to initialise the .data section in RAM */
85+
} >RAM AT> FLASH_TEXT
86+
87+
/* Uninitialized data section */
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.bss :
89+
{
90+
. = ALIGN(4);
91+
_sbss = .; /* define a global symbol at bss start; used by startup code */
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*(.bss)
93+
*(.bss*)
94+
*(COMMON)
95+
96+
. = ALIGN(4);
97+
_ebss = .; /* define a global symbol at bss end; used by startup code and GC */
98+
} >RAM
99+
100+
/* this is to define the start of the heap, and make sure we have a minimum size */
101+
.heap :
102+
{
103+
. = ALIGN(4);
104+
PROVIDE ( end = . );
105+
PROVIDE ( _end = . );
106+
_heap_start = .; /* define a global symbol at heap start */
107+
. = . + _minimum_heap_size;
108+
} >RAM
109+
110+
/* this just checks there is enough RAM for the stack */
111+
.stack :
112+
{
113+
. = ALIGN(4);
114+
. = . + _minimum_stack_size;
115+
. = ALIGN(4);
116+
} >RAM
117+
118+
/* Remove information from the standard libraries */
119+
/*
120+
/DISCARD/ :
121+
{
122+
libc.a ( * )
123+
libm.a ( * )
124+
libgcc.a ( * )
125+
}
126+
*/
127+
128+
.ARM.attributes 0 : { *(.ARM.attributes) }
129+
}

‎stmhal/boards/stm32f411_af.csv‎

Lines changed: 84 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,84 @@
1+
Port,,AF0,AF1,AF2,AF3,AF4,AF5,AF6,AF7,AF8,AF9,AF10,AF11,AF12,AF13,AF14,AF15,
2+
,,SYS_AF,TIM1/TIM2,TIM3/TIM4/TIM5,TIM9/TIM10/TIM11,I2C1/I2C2/I2C3,SPI1/I2S1/SPI2/I2S2/SPI3/I2S3,SPI2/I2S2/SPI3/I2S3/SPI4/I2S4/SPI5/I2S5,SPI3/I2S3/USART1/USART2,USART6,I2C2/I2C3,,,SDIO,,,,,
3+
PortA,PA0,,TIM2_CH1/TIM2_ETR,TIM5_CH1,,,,,USART2_CTS,,,,,,,,EVENTOUT,
4+
PartA,PA1,,TIM2_CH2,TIM5_CH2,,,SPI4_MOSI/I2S4_SD,,USART2_RTS,,,,,,,,EVENTOUT,
5+
PortA,PA2,,TIM2_CH3,TIM5_CH3,TIM9_CH1,,I2S2_CKIN,,USART2_TX,,,,,,,,EVENTOUT,
6+
PortA,PA3,,TIM2_CH4,TIM5_CH4,TIM9_CH2,,I2S2_MCK,,USART2_RX,,,,,,,,EVENTOUT,
7+
PortA,PA4,,,,,,SPI1_NSS/I2S1_WS,SPI3_NSS/I2S3_WS,USART2_CK,,,,,,,,EVENTOUT,
8+
PortA,PA5,,TIM2_CH1/TIM2_ETR,,,,SPI1_SCK/I2S1_CK,,,,,,,,,,EVENTOUT,
9+
PortA,PA6,,TIM1_BKIN,TIM3_CH1,,,SPI1_MISO,I2S2_MCK,,,,,,SDIO_CMD,,,EVENTOUT,
10+
PortA,PA7,,TIM1_CH1N,TIM3_CH2,,,SPI1_MOSI/I2S1_SD,,,,,,,,,,EVENTOUT,
11+
PortA,PA8,MCO_1,TIM1_CH1,,,I2C3_SCL,,,USART1_CK,,,USB_FS_SOF,,SDIO_D1,,,EVENTOUT,
12+
PortA,PA9,,TIM1_CH2,,,I2C3_SMBA,,,USART1_TX,,,USB_FS_VBUS,,SDIO_D2,,,EVENTOUT,
13+
PortA,PA10,,TIM1_CH3,,,,,SPI5_MOSI/I2S5_SD,USART1_RX,,,USB_FS_ID,,,,,EVENTOUT,
14+
PortA,PA11,,TIM1_CH4,,,,,SPI4_MISO,USART1_CTS,USART6_TX,,USB_FS_DM,,,,,EVENTOUT,
15+
PortA,PA12,,TIM1_ETR,,,,,SPI5_MISO,USART1_RTS,USART6_RX,,USB_FS_DP,,,,,EVENTOUT,
16+
PortA,PA13,JTMS-SWDIO,,,,,,,,,,,,,,,EVENTOUT,
17+
PortA,PA14,JTCK-SWCLK,,,,,,,,,,,,,,,EVENTOUT,
18+
PortA,PA15,JTDI,TIM2_CH1/TIM2_ETR,,,,SPI1_NSS/I2S1_WS,SPI3_NSS/I2S3_WS,USART1_TX,,,,,,,,EVENTOUT,
19+
PortB,PB0,,TIM1_CH2N,TIM3_CH3,,,,SPI5_SCK/I2S5_CK,,,,,,,,,EVENTOUT,
20+
PortB,PB1,,TIM1_CH3N,TIM3_CH4,,,,SPI5_NSS/I2S5_WS,,,,,,,,,EVENTOUT,
21+
PortB,PB2,,,,,,,,,,,,,,,,EVENTOUT,
22+
PortB,PB3,JTDO-SWO,TIM2_CH2,,,,SPI1_SCK/I2S1_CK,SPI3_SCK/I2S3_CK,USART1_RX,,I2C2_SDA,,,,,,EVENTOUT,
23+
PortB,PB4,JTRST,,TIM3_CH1,,,SPI1_MISO,SPI3_MISO,I2S3ext_SD,,I2C3_SDA,,,SDIO_D0,,,EVENTOUT,
24+
PortB,PB5,,,TIM3_CH2,,I2C1_SMBA,SPI1_MOSI/I2S1_SD,SPI3_MOSI/I2S3_SD,,,,,,SDIO_D3,,,EVENTOUT,
25+
PortB,PB6,,,TIM4_CH1,,I2C1_SCL,,,USART1_TX,,,,,,,,EVENTOUT,
26+
PortB,PB7,,,TIM4_CH2,,I2C1_SDA,,,USART1_RX,,,,,SDIO_D0,,,EVENTOUT,
27+
PortB,PB8,,,TIM4_CH3,TIM10_CH1,I2C1_SCL,,SPI5_MOSI/I2S5_SD,,,I2C3_SDA,,,SDIO_D4,,,EVENTOUT,
28+
PortB,PB9,,,TIM4_CH4,TIM11_CH1,I2C1_SDA,SPI2_NSS/I2S2_WS,,,,I2C2_SDA,,,SDIO_D5,,,EVENTOUT,
29+
PortB,PB10,,TIM2_CH3,,,I2C2_SCL,SPI2_SCK/I2S2_CK,I2S3_MCK,,,,,,SDIO_D7,,,EVENTOUT,
30+
PortB,PB11,,TIM2_CH4,,,I2C2_SDA,I2S2_CKIN,,,,,,,,,,EVENTOUT,
31+
PortB,PB12,,TIM1_BKIN,,,I2C2_SMBA,SPI2_NSS/I2S2_WS,SPI4_NSS/I2S4_WS,SPI3_SCK/I2S3_CK,,,,,,,,EVENTOUT,
32+
PortB,PB13,,TIM1_CH1N,,,,SPI2_SCK/I2S2_CK,SPI4_SCK/I2S4_CK,,,,,,,,,EVENTOUT,
33+
PortB,PB14,,TIM1_CH2N,,,,SPI2_MISO,I2S2ext_SD,,,,,,SDIO_D6,,,EVENTOUT,
34+
PortB,PB15,RTC_50Hz,TIM1_CH3N,,,,SPI2_MOSI/I2S2_SD,,,,,,,SDIO_CK,,,EVENTOUT,
35+
PortC,PC0,,,,,,,,,,,,,,,,EVENTOUT,
36+
PortC,PC1,,,,,,,,,,,,,,,,EVENTOUT,
37+
PortC,PC2,,,,,,SPI2_MISO,I2S2ext_SD,,,,,,,,,EVENTOUT,
38+
PortC,PC3,,,,,,SPI2_MOSI/I2S2_SD,,,,,,,,,,EVENTOUT,
39+
PortC,PC4,,,,,,,,,,,,,,,,EVENTOUT,
40+
PortC,PC5,,,,,,,,,,,,,,,,EVENTOUT,
41+
PortC,PC6,,,TIM3_CH1,,,I2S2_MCK,,,USART6_TX,,,,SDIO_D6,,,EVENTOUT,
42+
PortC,PC7,,,TIM3_CH2,,,SPI2_SCK/I2S2_CK,I2S3_MCK,,USART6_RX,,,,SDIO_D7,,,EVENTOUT,
43+
PortC,PC8,,,TIM3_CH3,,,,,,USART6_CK,,,,SDIO_D0,,,EVENTOUT,
44+
PortC,PC9,MCO_2,,TIM3_CH4,,I2C3_SDA,I2S2_CKIN,,,,,,,SDIO_D1,,,EVENTOUT,
45+
PortC,PC10,,,,,,,SPI3_SCK/I2S3_CK,,,,,,SDIO_D2,,,EVENTOUT,
46+
PortC,PC11,,,,,,I2S3ext_SD,SPI3_MISO,,,,,,SDIO_D3,,,EVENTOUT,
47+
PortC,PC12,,,,,,,SPI3_MOSI/I2S3_SD,,,,,,SDIO_CK,,,EVENTOUT,
48+
PortC,PC13,,,,,,,,,,,,,,,,EVENTOUT,
49+
PortC,PC14,,,,,,,,,,,,,,,,EVENTOUT,
50+
PortD,PC15,,,,,,,,,,,,,,,,EVENTOUT,
51+
PortD,PD0,,,,,,,,,,,,,,,,EVENTOUT,
52+
PortD,PD1,,,,,,,,,,,,,,,,EVENTOUT,
53+
PortD,PD2,,,TIM3_ETR,,,,,,,,,,SDIO_CMD,,,EVENTOUT,
54+
PortD,PD3,,,,,,SPI2_SCK/I2S2_CK,,USART2_CTS,,,,,,,,EVENTOUT,
55+
PortD,PD4,,,,,,,,USART2_RTS,,,,,,,,EVENTOUT,
56+
PortD,PD5,,,,,,,,USART2_TX,,,,,,,,EVENTOUT,
57+
PortD,PD6,,,,,,SPI3_MOSI/I2S3_SD,,USART2_RX,,,,,,,,EVENTOUT,
58+
PortD,PD7,,,,,,,,USART2_CK,,,,,,,,EVENTOUT,
59+
PortD,PD8,,,,,,,,,,,,,,,,EVENTOUT,
60+
PortD,PD9,,,,,,,,,,,,,,,,EVENTOUT,
61+
PortD,PD10,,,,,,,,,,,,,,,,EVENTOUT,
62+
PortD,PD11,,,,,,,,,,,,,,,,EVENTOUT,
63+
PortD,PD12,,,TIM4_CH1,,,,,,,,,,,,,EVENTOUT,
64+
PortD,PD13,,,TIM4_CH2,,,,,,,,,,,,,EVENTOUT,
65+
PortD,PD14,,,TIM4_CH3,,,,,,,,,,,,,EVENTOUT,
66+
PortD,PD15,,,TIM4_CH4,,,,,,,,,,,,,EVENTOUT,
67+
PortE,PE0,,,TIM4_ETR,,,,,,,,,,,,,EVENTOUT,
68+
PortE,PE1,,,,,,,,,,,,,,,,EVENTOUT,
69+
PortE,PE2,TRACECLK,,,,,SPI4_SCK/I2S4_CK,SPI5_SCK/I2S5_CK,,,,,,,,,EVENTOUT,
70+
PortE,PE3,TRACED0,,,,,,,,,,,,,,,EVENTOUT,
71+
PortE,PE4,TRACED1,,,,,SPI4_NSS/I2S4_WS,SPI5_NSS/I2S5_WS,,,,,,,,,EVENTOUT,
72+
PortE,PE5,TRACED2,,,TIM9_CH1,,SPI4_MISO,SPI5_MISO,,,,,,,,,EVENTOUT,
73+
PortE,PE6,TRACED3,,,TIM9_CH2,,SPI4_MOSI/I2S4_SD,SPI5_MOSI/I2S5_SD,,,,,,,,,EVENTOUT,
74+
PortE,PE7,,TIM1_ETR,,,,,,,,,,,,,,EVENTOUT,
75+
PortE,PE8,,TIM1_CH1N,,,,,,,,,,,,,,EVENTOUT,
76+
PortE,PE9,,TIM1_CH1,,,,,,,,,,,,,,EVENTOUT,
77+
PortE,PE10,,TIM1_CH2N,,,,,,,,,,,,,,EVENTOUT,
78+
PortE,PE11,,TIM1_CH2,,,,SPI4_NSS/I2S4_WS,SPI5_NSS/I2S5_WS,,,,,,,,,EVENTOUT,
79+
PortE,PE12,,TIM1_CH3N,,,,SPI4_SCK/I2S4_CK,SPI5_SCK/I2S5_CK,,,,,,,,,EVENTOUT,
80+
PortE,PE13,,TIM1_CH3,,,,SPI4_MISO,SPI5_MISO,,,,,,,,,EVENTOUT,
81+
PortE,PE14,,TIM1_CH4,,,,SPI4_MOSI/I2S4_SD,SPI5_MOSI/I2S5_SD,,,,,,,,,EVENTOUT,
82+
PortE,PE15,,TIM1_BKIN,,,,,,,,,,,,,,EVENTOUT,
83+
PortH,PH0,,,,,,,,,,,,,,,,EVENTOUT,,
84+
PortH,PH1,,,,,,,,,,,,,,,,EVENTOUT,

‎stmhal/storage.c‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -42,7 +42,7 @@
4242
#define FLASH_MEM_START_ADDR (0x08004000) // sector 1, 16k
4343
#define FLASH_SECTOR_SIZE_MAX (0x10000) // 64k max, size of CCM
4444

45-
#elif defined(STM32F401xE)
45+
#elif defined(STM32F401xE) || defined(STM32F411xE)
4646

4747
STATIC byte flash_cache_mem[0x4000] __attribute__((aligned(4))); // 16k
4848
#define CACHE_MEM_START_ADDR (&flash_cache_mem[0])

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