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| 1 | +#include <stdint.h> |
| 2 | +#include <string.h> |
| 3 | +#include <stm32f4xx_hal.h> |
| 4 | + |
| 5 | +#include "misc.h" |
| 6 | +#include "systick.h" |
| 7 | +#include "mpconfig.h" |
| 8 | +#include "qstr.h" |
| 9 | +#include "obj.h" |
| 10 | +#include "led.h" |
| 11 | +#include "flash.h" |
| 12 | +#include "storage.h" |
| 13 | + |
| 14 | +#define CACHE_MEM_START_ADDR (0x10000000) // CCM data RAM, 64k |
| 15 | +#define FLASH_PART1_START_BLOCK (0x100) |
| 16 | +#define FLASH_PART1_NUM_BLOCKS (224) // 16k+16k+16k+64k=112k |
| 17 | +#define FLASH_MEM_START_ADDR (0x08004000) // sector 1, 16k |
| 18 | + |
| 19 | +static bool flash_is_initialised = false; |
| 20 | +static bool flash_cache_dirty; |
| 21 | +static uint32_t flash_cache_sector_id; |
| 22 | +static uint32_t flash_cache_sector_start; |
| 23 | +static uint32_t flash_cache_sector_size; |
| 24 | +static uint32_t flash_tick_counter_last_write; |
| 25 | + |
| 26 | +static void flash_cache_flush(void) { |
| 27 | + if (flash_cache_dirty) { |
| 28 | + // sync the cache RAM buffer by writing it to the flash page |
| 29 | + flash_write(flash_cache_sector_start, (const uint32_t*)CACHE_MEM_START_ADDR, flash_cache_sector_size / 4); |
| 30 | + flash_cache_dirty = false; |
| 31 | + // indicate a clean cache with LED off |
| 32 | + led_state(PYB_LED_R1, 0); |
| 33 | + } |
| 34 | +} |
| 35 | + |
| 36 | +static uint8_t *flash_cache_get_addr_for_write(uint32_t flash_addr) { |
| 37 | + uint32_t flash_sector_start; |
| 38 | + uint32_t flash_sector_size; |
| 39 | + uint32_t flash_sector_id = flash_get_sector_info(flash_addr, &flash_sector_start, &flash_sector_size); |
| 40 | + if (flash_cache_sector_id != flash_sector_id) { |
| 41 | + flash_cache_flush(); |
| 42 | + memcpy((void*)CACHE_MEM_START_ADDR, (const void*)flash_sector_start, flash_sector_size); |
| 43 | + flash_cache_sector_id = flash_sector_id; |
| 44 | + flash_cache_sector_start = flash_sector_start; |
| 45 | + flash_cache_sector_size = flash_sector_size; |
| 46 | + } |
| 47 | + flash_cache_dirty = true; |
| 48 | + // indicate a dirty cache with LED on |
| 49 | + led_state(PYB_LED_R1, 1); |
| 50 | + return (uint8_t*)CACHE_MEM_START_ADDR + flash_addr - flash_sector_start; |
| 51 | +} |
| 52 | + |
| 53 | +static uint8_t *flash_cache_get_addr_for_read(uint32_t flash_addr) { |
| 54 | + uint32_t flash_sector_start; |
| 55 | + uint32_t flash_sector_size; |
| 56 | + uint32_t flash_sector_id = flash_get_sector_info(flash_addr, &flash_sector_start, &flash_sector_size); |
| 57 | + if (flash_cache_sector_id == flash_sector_id) { |
| 58 | + // in cache, copy from there |
| 59 | + return (uint8_t*)CACHE_MEM_START_ADDR + flash_addr - flash_sector_start; |
| 60 | + } |
| 61 | + // not in cache, copy straight from flash |
| 62 | + return (uint8_t*)flash_addr; |
| 63 | +} |
| 64 | + |
| 65 | +void storage_init(void) { |
| 66 | + if (!flash_is_initialised) { |
| 67 | + flash_cache_dirty = false; |
| 68 | + flash_cache_sector_id = 0; |
| 69 | + flash_is_initialised = true; |
| 70 | + flash_tick_counter_last_write = 0; |
| 71 | + } |
| 72 | +} |
| 73 | + |
| 74 | +uint32_t storage_get_block_size(void) { |
| 75 | + return FLASH_BLOCK_SIZE; |
| 76 | +} |
| 77 | + |
| 78 | +uint32_t storage_get_block_count(void) { |
| 79 | + return FLASH_PART1_START_BLOCK + FLASH_PART1_NUM_BLOCKS; |
| 80 | +} |
| 81 | + |
| 82 | +bool storage_needs_flush(void) { |
| 83 | + // wait 2 seconds after last write to flush |
| 84 | + return flash_cache_dirty && sys_tick_has_passed(flash_tick_counter_last_write, 2000); |
| 85 | +} |
| 86 | + |
| 87 | +void storage_flush(void) { |
| 88 | + flash_cache_flush(); |
| 89 | +} |
| 90 | + |
| 91 | +static void build_partition(uint8_t *buf, int boot, int type, uint32_t start_block, uint32_t num_blocks) { |
| 92 | + buf[0] = boot; |
| 93 | + |
| 94 | + if (num_blocks == 0) { |
| 95 | + buf[1] = 0; |
| 96 | + buf[2] = 0; |
| 97 | + buf[3] = 0; |
| 98 | + } else { |
| 99 | + buf[1] = 0xff; |
| 100 | + buf[2] = 0xff; |
| 101 | + buf[3] = 0xff; |
| 102 | + } |
| 103 | + |
| 104 | + buf[4] = type; |
| 105 | + |
| 106 | + if (num_blocks == 0) { |
| 107 | + buf[5] = 0; |
| 108 | + buf[6] = 0; |
| 109 | + buf[7] = 0; |
| 110 | + } else { |
| 111 | + buf[5] = 0xff; |
| 112 | + buf[6] = 0xff; |
| 113 | + buf[7] = 0xff; |
| 114 | + } |
| 115 | + |
| 116 | + buf[8] = start_block; |
| 117 | + buf[9] = start_block >> 8; |
| 118 | + buf[10] = start_block >> 16; |
| 119 | + buf[11] = start_block >> 24; |
| 120 | + |
| 121 | + buf[12] = num_blocks; |
| 122 | + buf[13] = num_blocks >> 8; |
| 123 | + buf[14] = num_blocks >> 16; |
| 124 | + buf[15] = num_blocks >> 24; |
| 125 | +} |
| 126 | + |
| 127 | +bool storage_read_block(uint8_t *dest, uint32_t block) { |
| 128 | + //printf("RD %u\n", block); |
| 129 | + if (block == 0) { |
| 130 | + // fake the MBR so we can decide on our own partition table |
| 131 | + |
| 132 | + for (int i = 0; i < 446; i++) { |
| 133 | + dest[i] = 0; |
| 134 | + } |
| 135 | + |
| 136 | + build_partition(dest + 446, 0, 0x01 /* FAT12 */, FLASH_PART1_START_BLOCK, FLASH_PART1_NUM_BLOCKS); |
| 137 | + build_partition(dest + 462, 0, 0, 0, 0); |
| 138 | + build_partition(dest + 478, 0, 0, 0, 0); |
| 139 | + build_partition(dest + 494, 0, 0, 0, 0); |
| 140 | + |
| 141 | + dest[510] = 0x55; |
| 142 | + dest[511] = 0xaa; |
| 143 | + |
| 144 | + return true; |
| 145 | + |
| 146 | + } else if (FLASH_PART1_START_BLOCK <= block && block < FLASH_PART1_START_BLOCK + FLASH_PART1_NUM_BLOCKS) { |
| 147 | + // non-MBR block, get data from flash memory, possibly via cache |
| 148 | + uint32_t flash_addr = FLASH_MEM_START_ADDR + (block - FLASH_PART1_START_BLOCK) * FLASH_BLOCK_SIZE; |
| 149 | + uint8_t *src = flash_cache_get_addr_for_read(flash_addr); |
| 150 | + memcpy(dest, src, FLASH_BLOCK_SIZE); |
| 151 | + return true; |
| 152 | + |
| 153 | + } else { |
| 154 | + // bad block number |
| 155 | + return false; |
| 156 | + } |
| 157 | +} |
| 158 | + |
| 159 | +bool storage_write_block(const uint8_t *src, uint32_t block) { |
| 160 | + //printf("WR %u\n", block); |
| 161 | + if (block == 0) { |
| 162 | + // can't write MBR, but pretend we did |
| 163 | + return true; |
| 164 | + |
| 165 | + } else if (FLASH_PART1_START_BLOCK <= block && block < FLASH_PART1_START_BLOCK + FLASH_PART1_NUM_BLOCKS) { |
| 166 | + // non-MBR block, copy to cache |
| 167 | + uint32_t flash_addr = FLASH_MEM_START_ADDR + (block - FLASH_PART1_START_BLOCK) * FLASH_BLOCK_SIZE; |
| 168 | + uint8_t *dest = flash_cache_get_addr_for_write(flash_addr); |
| 169 | + memcpy(dest, src, FLASH_BLOCK_SIZE); |
| 170 | + flash_tick_counter_last_write = HAL_GetTick(); |
| 171 | + return true; |
| 172 | + |
| 173 | + } else { |
| 174 | + // bad block number |
| 175 | + return false; |
| 176 | + } |
| 177 | +} |
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