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stmhal: Add config option for storage to use second flash segment.
When enabled this allows the internal storage to be split over 2 contiguous regions of flash (two segments), and so the storage can be increased. This option is disabled by default, giving original behaviour.
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+45
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stmhal/storage.c

Lines changed: 45 additions & 18 deletions
Original file line numberDiff line numberDiff line change
@@ -37,24 +37,36 @@
3737
#if defined(STM32F405xx) || defined(STM32F407xx)
3838

3939
#define CACHE_MEM_START_ADDR (0x10000000) // CCM data RAM, 64k
40-
#define FLASH_PART1_START_BLOCK (0x100)
41-
#define FLASH_PART1_NUM_BLOCKS (224) // 16k+16k+16k+64k=112k
42-
#define FLASH_MEM_START_ADDR (0x08004000) // sector 1, 16k
4340
#define FLASH_SECTOR_SIZE_MAX (0x10000) // 64k max, size of CCM
41+
#define FLASH_MEM_SEG1_START_ADDR (0x08004000) // sector 1
42+
#define FLASH_MEM_SEG1_NUM_BLOCKS (224) // sectors 1,2,3,4: 16k+16k+16k+64k=112k
43+
44+
// enable this to get an extra 64k of storage (uses the last sector of the flash)
45+
#if 0
46+
#define FLASH_MEM_SEG2_START_ADDR (0x080e0000) // sector 11
47+
#define FLASH_MEM_SEG2_NUM_BLOCKS (128) // sector 11: 128k
48+
#endif
4449

4550
#elif defined(STM32F401xE) || defined(STM32F411xE)
4651

4752
STATIC byte flash_cache_mem[0x4000] __attribute__((aligned(4))); // 16k
4853
#define CACHE_MEM_START_ADDR (&flash_cache_mem[0])
49-
#define FLASH_PART1_START_BLOCK (0x100)
50-
#define FLASH_PART1_NUM_BLOCKS (128) // 16k+16k+16k+16k(of64k)=64k
51-
#define FLASH_MEM_START_ADDR (0x08004000) // sector 1, 16k
5254
#define FLASH_SECTOR_SIZE_MAX (0x4000) // 16k max due to size of cache buffer
55+
#define FLASH_MEM_SEG1_START_ADDR (0x08004000) // sector 1
56+
#define FLASH_MEM_SEG1_NUM_BLOCKS (128) // sectors 1,2,3,4: 16k+16k+16k+16k(of 64k)=64k
5357

5458
#else
5559
#error "no storage support for this MCU"
5660
#endif
5761

62+
#if !defined(FLASH_MEM_SEG2_START_ADDR)
63+
#define FLASH_MEM_SEG2_START_ADDR (0) // no second segment
64+
#define FLASH_MEM_SEG2_NUM_BLOCKS (0) // no second segment
65+
#endif
66+
67+
#define FLASH_PART1_START_BLOCK (0x100)
68+
#define FLASH_PART1_NUM_BLOCKS (FLASH_MEM_SEG1_NUM_BLOCKS + FLASH_MEM_SEG2_NUM_BLOCKS)
69+
5870
#define FLASH_FLAG_DIRTY (1)
5971
#define FLASH_FLAG_FORCE_WRITE (2)
6072
#define FLASH_FLAG_ERASED (4)
@@ -212,6 +224,21 @@ static void build_partition(uint8_t *buf, int boot, int type, uint32_t start_blo
212224
buf[15] = num_blocks >> 24;
213225
}
214226

227+
static uint32_t convert_block_to_flash_addr(uint32_t block) {
228+
if (FLASH_PART1_START_BLOCK <= block && block < FLASH_PART1_START_BLOCK + FLASH_PART1_NUM_BLOCKS) {
229+
// a block in partition 1
230+
block -= FLASH_PART1_START_BLOCK;
231+
if (block < FLASH_MEM_SEG1_NUM_BLOCKS) {
232+
return FLASH_MEM_SEG1_START_ADDR + block * FLASH_BLOCK_SIZE;
233+
} else if (block < FLASH_MEM_SEG1_NUM_BLOCKS + FLASH_MEM_SEG2_NUM_BLOCKS) {
234+
return FLASH_MEM_SEG2_START_ADDR + (block - FLASH_MEM_SEG1_NUM_BLOCKS) * FLASH_BLOCK_SIZE;
235+
}
236+
// can add more flash segments here if needed, following above pattern
237+
}
238+
// bad block
239+
return -1;
240+
}
241+
215242
bool storage_read_block(uint8_t *dest, uint32_t block) {
216243
//printf("RD %u\n", block);
217244
if (block == 0) {
@@ -231,16 +258,16 @@ bool storage_read_block(uint8_t *dest, uint32_t block) {
231258

232259
return true;
233260

234-
} else if (FLASH_PART1_START_BLOCK <= block && block < FLASH_PART1_START_BLOCK + FLASH_PART1_NUM_BLOCKS) {
261+
} else {
235262
// non-MBR block, get data from flash memory, possibly via cache
236-
uint32_t flash_addr = FLASH_MEM_START_ADDR + (block - FLASH_PART1_START_BLOCK) * FLASH_BLOCK_SIZE;
263+
uint32_t flash_addr = convert_block_to_flash_addr(block);
264+
if (flash_addr == -1) {
265+
// bad block number
266+
return false;
267+
}
237268
uint8_t *src = flash_cache_get_addr_for_read(flash_addr);
238269
memcpy(dest, src, FLASH_BLOCK_SIZE);
239270
return true;
240-
241-
} else {
242-
// bad block number
243-
return false;
244271
}
245272
}
246273

@@ -250,15 +277,15 @@ bool storage_write_block(const uint8_t *src, uint32_t block) {
250277
// can't write MBR, but pretend we did
251278
return true;
252279

253-
} else if (FLASH_PART1_START_BLOCK <= block && block < FLASH_PART1_START_BLOCK + FLASH_PART1_NUM_BLOCKS) {
280+
} else {
254281
// non-MBR block, copy to cache
255-
uint32_t flash_addr = FLASH_MEM_START_ADDR + (block - FLASH_PART1_START_BLOCK) * FLASH_BLOCK_SIZE;
282+
uint32_t flash_addr = convert_block_to_flash_addr(block);
283+
if (flash_addr == -1) {
284+
// bad block number
285+
return false;
286+
}
256287
uint8_t *dest = flash_cache_get_addr_for_write(flash_addr);
257288
memcpy(dest, src, FLASH_BLOCK_SIZE);
258289
return true;
259-
260-
} else {
261-
// bad block number
262-
return false;
263290
}
264291
}

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