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Merge tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC platform updates from Arnd Bergmann: "SoC platform changes (arch/arm/mach-*). This merge window, the bulk is for a few platforms: - Andres Färber adds initial support for the Actions Semi S500 (aka 'owl') platform, a close relative of the S900 platform he adds for arm64. - in mach-omap2, we remove more legacy code - Rockchips gains support for the RV1108 SoC designed for camera applications. - For Atmel, we gain support for MMU-less SoCs (SAME70/V71/S70/V70) - Minor updates for other platforms, including davinci, s3c64xx, prima2, stm32, broadcom nsp, amlogic, pxa, imx and renesas" * tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (74 commits) ARM: owl: smp: Drop bogus holding pen ARM: owl: Drop custom machine ARM: owl: smp: Implement SPS power-gating for CPU2 and CPU3 soc: actions: owl-sps: Factor out owl_sps_set_pg() for power-gating soc: actions: Add Owl SPS dt-bindings: power: Add Owl SPS power domains MAINTAINERS: Update Actions Semi section with SPS ARM: owl: Implement CPU enable-method for S500 MAINTAINERS: Add Actions Semi Owl section ARM: Prepare Actions Semi S500 ARM: socfpga: Increase max number of GPIOs ARM: stm32: Introduce MACH_STM32F469 flag ARM: prima2: remove redundant select CPU_V7 ARM: davinci: fix const warnings ARM: shmobile: pm-rmobile: Use GENPD_FLAG_ALWAYS_ON ARM: OMAP4: hwmod_data: add SHAM crypto accelerator ARM: OMAP4: hwmod data: add des ARM: OMAP4: hwmod data: add aes2 ARM: OMAP4: hwmod data: add aes1 ARM: pxa: Delete an error message for a failed memory allocation in pxa3xx_u2d_probe() ...
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‎Documentation/arm/Atmel/README‎

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@@ -16,7 +16,7 @@ git branches/tags and email subject always contain this "at91" sub-string.
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AT91 SoCs
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---------
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Documentation and detailled datasheet for each product are available on
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Documentation and detailed datasheet for each product are available on
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the Atmel website: http://www.atmel.com.
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Flavors:
@@ -101,6 +101,42 @@ the Atmel website: http://www.atmel.com.
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+ Datasheet
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http://www.atmel.com/Images/Atmel-11267-32-bit-Cortex-A5-Microcontroller-SAMA5D2_Datasheet.pdf
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* ARM Cortex-M7 MCUs
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- sams70 family
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- sams70j19
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- sams70j20
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- sams70j21
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- sams70n19
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- sams70n20
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- sams70n21
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- sams70q19
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- sams70q20
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- sams70q21
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+ Datasheet
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http://www.atmel.com/Images/Atmel-11242-32-bit-Cortex-M7-Microcontroller-SAM-S70Q-SAM-S70N-SAM-S70J_Datasheet.pdf
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- samv70 family
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- samv70j19
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- samv70j20
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- samv70n19
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- samv70n20
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- samv70q19
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- samv70q20
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+ Datasheet
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http://www.atmel.com/Images/Atmel-11297-32-bit-Cortex-M7-Microcontroller-SAM-V70Q-SAM-V70N-SAM-V70J_Datasheet.pdf
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- samv71 family
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- samv71j19
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- samv71j20
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- samv71j21
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- samv71n19
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- samv71n20
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- samv71n21
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- samv71q19
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- samv71q20
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- samv71q21
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+ Datasheet
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http://www.atmel.com/Images/Atmel-44003-32-bit-Cortex-M7-Microcontroller-SAM-V71Q-SAM-V71N-SAM-V71J_Datasheet.pdf
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Linux kernel information
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------------------------

‎Documentation/devicetree/bindings/arm/atmel-at91.txt‎

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@@ -41,6 +41,36 @@ compatible: must be one of:
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- "atmel,sama5d43"
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- "atmel,sama5d44"
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* "atmel,samv7" for MCUs using a Cortex-M7, shall be extended with the specific
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SoC family:
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o "atmel,sams70" shall be extended with the specific MCU compatible:
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- "atmel,sams70j19"
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- "atmel,sams70j20"
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- "atmel,sams70j21"
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- "atmel,sams70n19"
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- "atmel,sams70n20"
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- "atmel,sams70n21"
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- "atmel,sams70q19"
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- "atmel,sams70q20"
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- "atmel,sams70q21"
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o "atmel,samv70" shall be extended with the specific MCU compatible:
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- "atmel,samv70j19"
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- "atmel,samv70j20"
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- "atmel,samv70n19"
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- "atmel,samv70n20"
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- "atmel,samv70q19"
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- "atmel,samv70q20"
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o "atmel,samv71" shall be extended with the specific MCU compatible:
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- "atmel,samv71j19"
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- "atmel,samv71j20"
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- "atmel,samv71j21"
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- "atmel,samv71n19"
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- "atmel,samv71n20"
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- "atmel,samv71n21"
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- "atmel,samv71q19"
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- "atmel,samv71q20"
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- "atmel,samv71q21"
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Chipid required properties:
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- compatible: Should be "atmel,sama5d2-chipid"
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- reg : Should contain registers location and length

‎Documentation/devicetree/bindings/power/actions,owl-sps.txt‎

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Actions Semi Owl Smart Power System (SPS)
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Required properties:
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- compatible : "actions,s500-sps" for S500
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- reg : Offset and length of the register set for the device.
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- #power-domain-cells : Must be 1.
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See macros in:
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include/dt-bindings/power/owl-s500-powergate.h for S500
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Example:
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sps: power-controller@b01b0100 {
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compatible = "actions,s500-sps";
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reg = <0xb01b0100 0x100>;
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#power-domain-cells = <1>;
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};

‎MAINTAINERS‎

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F: drivers/amba/
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F: include/linux/amba/bus.h
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ARM/ACTIONS SEMI ARCHITECTURE
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M: Andreas Färber <afaerber@suse.de>
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L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
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S: Maintained
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N: owl
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F: arch/arm/mach-actions/
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F: arch/arm/boot/dts/owl-*
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F: arch/arm64/boot/dts/actions/
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F: drivers/clocksource/owl-*
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F: drivers/soc/actions/
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F: include/dt-bindings/power/owl-*
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F: include/linux/soc/actions/
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F: Documentation/devicetree/bindings/arm/actions.txt
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F: Documentation/devicetree/bindings/power/actions,owl-sps.txt
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F: Documentation/devicetree/bindings/timer/actions,owl-timer.txt
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ARM/ADS SPHERE MACHINE SUPPORT
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M: Lennert Buytenhek <kernel@wantstofly.org>
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L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)

‎arch/arm/Kconfig‎

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@@ -712,6 +712,8 @@ config ARCH_VIRT
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#
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source "arch/arm/mach-mvebu/Kconfig"
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source "arch/arm/mach-actions/Kconfig"
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source "arch/arm/mach-alpine/Kconfig"
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source "arch/arm/mach-artpec/Kconfig"
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# selected platforms.
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config ARCH_NR_GPIO
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int
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default 2048 if ARCH_SOCFPGA
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default 1024 if ARCH_BRCMSTB || ARCH_SHMOBILE || ARCH_TEGRA || \
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ARCH_ZYNQ
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default 512 if ARCH_EXYNOS || ARCH_KEYSTONE || SOC_OMAP5 || \

‎arch/arm/Kconfig.debug‎

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Say Y here if you want kernel low-level debugging support
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on the USART3 port of sama5d4.
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config DEBUG_AT91_SAMV7_USART1
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bool "Kernel low-level debugging via SAMV7 USART1"
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select DEBUG_AT91_UART
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depends on SOC_SAMV7
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help
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Say Y here if you want the debug print routines to direct
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their output to the USART1 port on SAMV7 based
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machines.
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config DEBUG_BCM2835
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bool "Kernel low-level debugging on BCM2835 PL011 UART"
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depends on ARCH_BCM2835 && ARCH_MULTI_V6
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ARCH DEBUG_UART_PHYS DEBUG_UART_VIRT
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APQ8064 0x16640000 0xf0040000
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APQ8084 0xf995e000 0xfa75e000
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IPQ4019 0x078af000 0xf78af000
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MSM8X60 0x19c40000 0xf0040000
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MSM8960 0x16440000 0xf0040000
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MSM8974 0xf991e000 0xfa71e000
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their output to the standard serial port on the RealView
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PB1176 platform.
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config DEBUG_RV1108_UART0
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bool "Kernel low-level debugging messages via Rockchip RV1108 UART0"
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depends on ARCH_ROCKCHIP
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select DEBUG_UART_8250
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help
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Say Y here if you want kernel low-level debugging support
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on Rockchip RV1108 based platforms.
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config DEBUG_RV1108_UART1
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bool "Kernel low-level debugging messages via Rockchip RV1108 UART1"
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depends on ARCH_ROCKCHIP
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select DEBUG_UART_8250
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help
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Say Y here if you want kernel low-level debugging support
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on Rockchip RV1108 based platforms.
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config DEBUG_RV1108_UART2
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bool "Kernel low-level debugging messages via Rockchip RV1108 UART2"
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depends on ARCH_ROCKCHIP
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select DEBUG_UART_8250
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help
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Say Y here if you want kernel low-level debugging support
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on Rockchip RV1108 based platforms.
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config DEBUG_RK29_UART0
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bool "Kernel low-level debugging messages via Rockchip RK29 UART0"
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depends on ARCH_ROCKCHIP
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default 0x10126000 if DEBUG_RK3X_UART1
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default 0x101f1000 if DEBUG_VERSATILE
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default 0x101fb000 if DEBUG_NOMADIK_UART
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default 0x10210000 if DEBUG_RV1108_UART2
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default 0x10220000 if DEBUG_RV1108_UART1
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default 0x10230000 if DEBUG_RV1108_UART0
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default 0x11002000 if DEBUG_MT8127_UART0
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default 0x11006000 if DEBUG_MT6589_UART0
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default 0x11009000 if DEBUG_MT8135_UART3
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default 0x3f201000 if DEBUG_BCM2836
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default 0x3e000000 if DEBUG_BCM_KONA_UART
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default 0x4000e400 if DEBUG_LL_UART_EFM32
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default 0x40028000 if DEBUG_AT91_SAMV7_USART1
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default 0x40081000 if DEBUG_LPC18XX_UART0
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default 0x40090000 if DEBUG_LPC32XX
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default 0x40100000 if DEBUG_PXA_UART1
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15641602
config DEBUG_UART_VIRT
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hex "Virtual base address of debug UART"
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default 0xc881f000 if DEBUG_RV1108_UART2
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default 0xc8821000 if DEBUG_RV1108_UART1
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default 0xc8912000 if DEBUG_RV1108_UART0
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default 0xe0000a00 if DEBUG_NETX_UART
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default 0xe0010fe0 if ARCH_RPC
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default 0xf0000be0 if ARCH_EBSA110

‎arch/arm/Makefile‎

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@@ -151,6 +151,7 @@ textofs-$(CONFIG_ARCH_AXXIA) := 0x00308000
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# Machine directory name. This list is sorted alphanumerically
153153
# by CONFIG_* macro name.
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machine-$(CONFIG_ARCH_ACTIONS) += actions
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machine-$(CONFIG_ARCH_ALPINE) += alpine
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machine-$(CONFIG_ARCH_ARTPEC) += artpec
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machine-$(CONFIG_ARCH_AT91) += at91

‎arch/arm/mach-actions/Kconfig‎

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menuconfig ARCH_ACTIONS
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bool "Actions Semi SoCs"
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depends on ARCH_MULTI_V7
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select ARM_AMBA
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select ARM_GIC
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select ARM_GLOBAL_TIMER
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select CACHE_L2X0
8+
select CLKSRC_ARM_GLOBAL_TIMER_SCHED_CLOCK
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select COMMON_CLK
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select GENERIC_IRQ_CHIP
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select HAVE_ARM_SCU if SMP
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select HAVE_ARM_TWD if SMP
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select OWL_PM_DOMAINS_HELPER
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select OWL_TIMER
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help
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This enables support for the Actions Semiconductor S500 SoC family.

‎arch/arm/mach-actions/Makefile‎

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obj-${CONFIG_SMP} += platsmp.o headsmp.o
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AFLAGS_headsmp.o := -Wa,-march=armv7-a

‎arch/arm/mach-actions/headsmp.S‎

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/*
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* Copyright 2012 Actions Semi Inc.
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* Author: Actions Semi, Inc.
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*
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* Copyright (c) 2017 Andreas Färber
6+
*
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* This program is free software; you can redistribute it and/or modify it
8+
* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
10+
* option) any later version.
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*/
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#include <linux/linkage.h>
14+
#include <linux/init.h>
15+
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ENTRY(owl_v7_invalidate_l1)
17+
mov r0, #0
18+
mcr p15, 0, r0, c7, c5, 0 @ invalidate I cache
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mcr p15, 2, r0, c0, c0, 0
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mrc p15, 1, r0, c0, c0, 0
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ldr r1, =0x7fff
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and r2, r1, r0, lsr #13
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ldr r1, =0x3ff
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and r3, r1, r0, lsr #3 @ NumWays - 1
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add r2, r2, #1 @ NumSets
29+
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and r0, r0, #0x7
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add r0, r0, #4 @ SetShift
32+
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clz r1, r3 @ WayShift
34+
add r4, r3, #1 @ NumWays
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1: sub r2, r2, #1 @ NumSets--
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mov r3, r4 @ Temp = NumWays
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2: subs r3, r3, #1 @ Temp--
38+
mov r5, r3, lsl r1
39+
mov r6, r2, lsl r0
40+
orr r5, r5, r6 @ Reg = (Temp<<WayShift)|(NumSets<<SetShift)
41+
mcr p15, 0, r5, c7, c6, 2
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bgt 2b
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cmp r2, #0
44+
bgt 1b
45+
dsb
46+
isb
47+
mov pc, lr
48+
ENDPROC(owl_v7_invalidate_l1)
49+
50+
ENTRY(owl_secondary_startup)
51+
bl owl_v7_invalidate_l1
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b secondary_startup

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