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Version: Vitis 2025.2
Vitis High-Level Synthesis (HLS) enables you to compile C/C++ code into RTL code for implementation in the programmable logic (PL) region of AMD devices. It is the tool that performs high-level synthesis of the C/C++ code and exports it as either a Vivado IP (.zip) for use in the Vivado Design Suite and the Embedded Software development flow, or as a Vitis kernel (.xo) for use in the Vitis acceleration flow and heterogeneous system designs. Although the Vitis kernel and Vivado IP flows are similar, there are some fundamental differences as explained in Introduction to Vitis HLS Components. This tutorial demonstrates the Vitis unified IDE flow for the bottom-up development of HLS designs.
The labs in this tutorial use:
- BASH Linux shell commands.
- Vitis core development kit release.
IMPORTANT:
- Before running any of the examples, make sure you have installed the Vitis Software Platform as described in Vitis release notes Installing the Vitis.
To configure the environment to run Vitis, run the following scripts which set up the environment to run in a specific command shell.
source <Vitis_install_path>/settings64.sh
source /opt/xilinx/xrt/setup.shNote:
.cshscripts are also provided, but this tutorial assumes a bash shell is used.
To specify the location of any platforms you have installed, set the following environment variable:
export PLATFORM_REPO_PATHS=<path to platforms>-
To access the reference files, type the following into a terminal:
git clone https://github.com/Xilinx/Vitis-Tutorials. -
Navigate to the
Getting_Started/Vitis_HLSdirectory, and then access thereference-filesdirectory. -
You may open the HLS project by the following command if you've already sourced the settings script to setup Vitis (Click Update if a Update Workspace window pops up after executing the command). But we strongly recommend that you read each step in Next Steps carefully to clearly understand how to create a project from scratch and perform simulation, synthesis and optimization.
vitis -w workspace -
The Makefile is provided as a reference if you'd like to explore the CLI flow.
This tutorial describes how to create an HLS component using the Vitis Unified IDE:
- Creating the Vitis HLS Project - Create the project to deine the HLS component.
- Running High-Level Synthesis and Analyzing Results - Simulate and synthesize the design, and analyze the results.
- Using Optimization Techniques - Try different optimization techniques to achieve the initiation interval (II)=1.
- Reviewing the Dataflow Optimization - Add the Dataflow optimization to achieve even better results.
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