@@ -260,21 +260,6 @@ void asm_thumb_op32(asm_thumb_t *as, uint op1, uint op2) {
260260 c [3 ] = op2 >> 8 ;
261261}
262262
263- #define OP_FORMAT_2 (op , rlo_dest , rlo_src , src_b ) ((op) | ((src_b) << 6) | ((rlo_src) << 3) | (rlo_dest))
264-
265- void asm_thumb_format_2 (asm_thumb_t * as , uint op , uint rlo_dest , uint rlo_src , int src_b ) {
266- assert (rlo_dest < ASM_THUMB_REG_R8 );
267- assert (rlo_src < ASM_THUMB_REG_R8 );
268- asm_thumb_op16 (as , OP_FORMAT_2 (op , rlo_dest , rlo_src , src_b ));
269- }
270-
271- #define OP_FORMAT_3 (op , rlo , i8 ) ((op) | ((rlo) << 8) | (i8))
272-
273- void asm_thumb_format_3 (asm_thumb_t * as , uint op , uint rlo , int i8 ) {
274- assert (rlo < ASM_THUMB_REG_R8 );
275- asm_thumb_op16 (as , OP_FORMAT_3 (op , rlo , i8 ));
276- }
277-
278263#define OP_FORMAT_4 (op , rlo_dest , rlo_src ) ((op) | ((rlo_src) << 3) | (rlo_dest))
279264
280265void asm_thumb_format_4 (asm_thumb_t * as , uint op , uint rlo_dest , uint rlo_src ) {
@@ -283,12 +268,6 @@ void asm_thumb_format_4(asm_thumb_t *as, uint op, uint rlo_dest, uint rlo_src) {
283268 asm_thumb_op16 (as , OP_FORMAT_4 (op , rlo_dest , rlo_src ));
284269}
285270
286- #define OP_FORMAT_9_10 (op , rlo_dest , rlo_base , offset ) ((op) | (((offset) << 6) & 0x07c0) | ((rlo_base) << 3) | (rlo_dest))
287-
288- void asm_thumb_format_9_10 (asm_thumb_t * as , uint op , uint rlo_dest , uint rlo_base , uint offset ) {
289- asm_thumb_op16 (as , OP_FORMAT_9_10 (op , rlo_dest , rlo_base , offset ));
290- }
291-
292271void asm_thumb_mov_reg_reg (asm_thumb_t * as , uint reg_dest , uint reg_src ) {
293272 uint op_lo ;
294273 if (reg_src < 8 ) {
@@ -305,26 +284,13 @@ void asm_thumb_mov_reg_reg(asm_thumb_t *as, uint reg_dest, uint reg_src) {
305284 asm_thumb_op16 (as , 0x4600 | op_lo );
306285}
307286
308- #define OP_MOVW (0xf240)
309- #define OP_MOVT (0xf2c0)
310-
311287// if loading lo half with movw, the i16 value will be zero extended into the r32 register!
312- STATIC void asm_thumb_mov_reg_i16 (asm_thumb_t * as , uint mov_op , uint reg_dest , int i16_src ) {
288+ void asm_thumb_mov_reg_i16 (asm_thumb_t * as , uint mov_op , uint reg_dest , int i16_src ) {
313289 assert (reg_dest < ASM_THUMB_REG_R15 );
314290 // mov[wt] reg_dest, #i16_src
315291 asm_thumb_op32 (as , mov_op | ((i16_src >> 1 ) & 0x0400 ) | ((i16_src >> 12 ) & 0xf ), ((i16_src << 4 ) & 0x7000 ) | (reg_dest << 8 ) | (i16_src & 0xff ));
316292}
317293
318- // the i16_src value will be zero extended into the r32 register!
319- void asm_thumb_movw_reg_i16 (asm_thumb_t * as , uint reg_dest , int i16_src ) {
320- asm_thumb_mov_reg_i16 (as , OP_MOVW , reg_dest , i16_src );
321- }
322-
323- // the i16_src value will be zero extended into the r32 register!
324- void asm_thumb_movt_reg_i16 (asm_thumb_t * as , uint reg_dest , int i16_src ) {
325- asm_thumb_mov_reg_i16 (as , OP_MOVT , reg_dest , i16_src );
326- }
327-
328294#define OP_B_N (byte_offset ) (0xe000 | (((byte_offset) >> 1) & 0x07ff))
329295
330296void asm_thumb_b_n (asm_thumb_t * as , uint label ) {
@@ -355,15 +321,15 @@ void asm_thumb_mov_reg_i32(asm_thumb_t *as, uint reg_dest, mp_uint_t i32) {
355321 // movw, movt does it in 8 bytes
356322 // ldr [pc, #], dw does it in 6 bytes, but we might not reach to end of code for dw
357323
358- asm_thumb_mov_reg_i16 (as , OP_MOVW , reg_dest , i32 );
359- asm_thumb_mov_reg_i16 (as , OP_MOVT , reg_dest , i32 >> 16 );
324+ asm_thumb_mov_reg_i16 (as , ASM_THUMB_OP_MOVW , reg_dest , i32 );
325+ asm_thumb_mov_reg_i16 (as , ASM_THUMB_OP_MOVT , reg_dest , i32 >> 16 );
360326}
361327
362328void asm_thumb_mov_reg_i32_optimised (asm_thumb_t * as , uint reg_dest , int i32 ) {
363329 if (reg_dest < 8 && UNSIGNED_FIT8 (i32 )) {
364330 asm_thumb_mov_rlo_i8 (as , reg_dest , i32 );
365331 } else if (UNSIGNED_FIT16 (i32 )) {
366- asm_thumb_mov_reg_i16 (as , OP_MOVW , reg_dest , i32 );
332+ asm_thumb_mov_reg_i16 (as , ASM_THUMB_OP_MOVW , reg_dest , i32 );
367333 } else {
368334 asm_thumb_mov_reg_i32 (as , reg_dest , i32 );
369335 }
@@ -485,7 +451,7 @@ void asm_thumb_bl_ind(asm_thumb_t *as, void *fun_ptr, uint fun_id, uint reg_temp
485451
486452 if (fun_id < 32 ) {
487453 // load ptr to function from table, indexed by fun_id (must be in range 0-31); 4 bytes
488- asm_thumb_op16 (as , OP_FORMAT_9_10 (ASM_THUMB_FORMAT_9_LDR | ASM_THUMB_FORMAT_9_WORD_TRANSFER , reg_temp , ASM_THUMB_REG_R7 , fun_id ));
454+ asm_thumb_op16 (as , ASM_THUMB_FORMAT_9_10_ENCODE (ASM_THUMB_FORMAT_9_LDR | ASM_THUMB_FORMAT_9_WORD_TRANSFER , reg_temp , ASM_THUMB_REG_R7 , fun_id ));
489455 asm_thumb_op16 (as , OP_BLX (reg_temp ));
490456 } else {
491457 // load ptr to function into register using immediate; 6 bytes
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