Fix QSPI on Feather nRF52840

tannewt · tannewt · commit d446d328d83f · 2018-11-27T00:13:24.000-08:00
We were writing with quad page program including the address (0x38)
which is unsupported by the GD25Q16C but it is supported by the
flash on the DK. So, we use the single address, quad data command
(0x32).
diff --git a/ports/nrf/boards/feather_nrf52840_express/mpconfigboard.mk b/ports/nrf/boards/feather_nrf52840_express/mpconfigboard.mk
@@ -20,6 +20,6 @@ endif
 
 NRF_DEFINES += -DNRF52840_XXAA -DNRF52840
 
-SPI_FLASH_FILESYSTEM = 1
+QSPI_FLASH_FILESYSTEM = 1
 EXTERNAL_FLASH_DEVICE_COUNT = 1
 EXTERNAL_FLASH_DEVICES = "GD25Q16C"
diff --git a/ports/nrf/supervisor/qspi_flash.c b/ports/nrf/supervisor/qspi_flash.c
@@ -115,7 +115,7 @@ void spi_flash_init(void) {
             .dpmconfig = false
         },
         .phy_if = {
-            .sck_freq = NRF_QSPI_FREQ_32MDIV16,
+            .sck_freq = NRF_QSPI_FREQ_32MDIV16, // Start at a slow 2mhz and speed up once we know what we're talking to.
             .sck_delay = 10,    // min time CS must stay high before going low again. in unit of 62.5 ns
             .spi_mode = NRF_QSPI_MODE_0,
             .dpmen = false
@@ -132,7 +132,7 @@ void spi_flash_init(void) {
     qspi_cfg.pins.io2_pin = MICROPY_QSPI_DATA2;
     qspi_cfg.pins.io3_pin = MICROPY_QSPI_DATA3;
     qspi_cfg.prot_if.readoc = NRF_QSPI_READOC_READ4IO;
-    qspi_cfg.prot_if.writeoc = NRF_QSPI_WRITEOC_PP4IO;
+    qspi_cfg.prot_if.writeoc = NRF_QSPI_WRITEOC_PP4O;
 #endif
 
     // No callback for blocking API
@@ -142,5 +142,17 @@ void spi_flash_init(void) {
 void spi_flash_init_device(const external_flash_device* device) {
     check_quad_enable(device);
 
-    // TODO(tannewt): Adjust the speed for the found device.
+    // Switch to single output line if the device doesn't support quad programs.
+    if (!device->supports_qspi_writes) {
+        NRF_QSPI->IFCONFIG0 &= ~QSPI_IFCONFIG0_WRITEOC_Msk;
+        NRF_QSPI->IFCONFIG0 |= QSPI_IFCONFIG0_WRITEOC_PP;
+    }
+
+    // Speed up as much as we can.
+    uint8_t sckfreq = 0;
+    while (32000000 / (sckfreq + 1) > device->max_clock_speed_mhz * 1000000 && sckfreq < 16) {
+        sckfreq += 1;
+    }
+    NRF_QSPI->IFCONFIG1 &= ~QSPI_IFCONFIG1_SCKFREQ_Msk;
+    NRF_QSPI->IFCONFIG1 |=  sckfreq << QSPI_IFCONFIG1_SCKDELAY_Pos;
 }
diff --git a/supervisor/shared/external_flash/devices.h b/supervisor/shared/external_flash/devices.h
@@ -86,7 +86,7 @@ typedef struct {
 }
 
 // Settings for the Gigadevice GD25Q16C 2MiB SPI flash.
-// Datasheet: http://www.gigadevice.com/wp-content/uploads/2017/12/DS-00086-GD25Q16C-Rev2.6.pdf
+// Datasheet: http://www.gigadevice.com/datasheet/gd25q16c/
 #define GD25Q16C {\
     .total_size = (1 << 21), /* 2 MiB */ \
     .start_up_time_us = 5000, \

Original file line number	Diff line number	Diff line change
`@@ -86,7 +86,7 @@ typedef struct {`
`86`	`86`	`}`
`87`	`87`
`88`	`88`	`// Settings for the Gigadevice GD25Q16C 2MiB SPI flash.`
`89`		`-// Datasheet: http://www.gigadevice.com/wp-content/uploads/2017/12/DS-00086-GD25Q16C-Rev2.6.pdf`
	`89`	`+// Datasheet: http://www.gigadevice.com/datasheet/gd25q16c/`
`90`	`90`	`#define GD25Q16C {\`
`91`	`91`	`.total_size = (1 << 21), /* 2 MiB */ \`
`92`	`92`	`.start_up_time_us = 5000, \`