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tannewttannewt
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Fix start on power up by providing Reset_Handler ourselves.
On power up the FlexRAM banks are in an unknown config so we can't rely on the stack until after we configure FlexRAM.
1 parent 9f4ea21 commit 9d5742e

10 files changed

Lines changed: 99 additions & 210 deletions

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‎ports/mimxrt10xx/Makefile‎

Lines changed: 2 additions & 20 deletions
Original file line numberDiff line numberDiff line change
@@ -84,24 +84,10 @@ CFLAGS += -DCFG_TUSB_MCU=OPT_MCU_MIMXRT10XX -DCFG_TUD_MIDI_RX_BUFSIZE=128 -DCFG_
8484
ifeq ($(DEBUG), 1)
8585
CFLAGS += -ggdb
8686
# You may want to disable -flto if it interferes with debugging.
87-
#CFLAGS += -flto -flto-partition=none
87+
# CFLAGS += -flto -flto-partition=none
8888
# You may want to enable these flags to make setting breakpoints easier.
8989
CFLAGS += -fno-inline -fno-ipa-sra
9090
else
91-
# -finline-limit can shrink the image size.
92-
# -finline-limit=80 or so is similar to not having it on.
93-
# There is no simple default value, though.
94-
95-
# Do a default shrink for small builds.
96-
ifndef CFLAGS_INLINE_LIMIT
97-
ifeq ($(CIRCUITPY_SMALL_BUILD),1)
98-
CFLAGS_INLINE_LIMIT = 50
99-
endif
100-
endif
101-
102-
ifdef CFLAGS_INLINE_LIMIT
103-
CFLAGS += -finline-limit=$(CFLAGS_INLINE_LIMIT)
104-
endif
10591
#CFLAGS += -flto -flto-partition=none
10692
endif
10793

@@ -116,12 +102,8 @@ CFLAGS += \
116102
-DCPU_$(CHIP_VARIANT) \
117103
-DDEBUG \
118104
-DIMXRT10XX \
119-
-DXIP_EXTERNAL_FLASH=1 \
120-
-DXIP_BOOT_HEADER_ENABLE=1 \
121-
-D__START=main \
122105
-Os -g3 -Wno-unused-parameter \
123-
-ffunction-sections -fdata-sections -fstack-usage \
124-
-D__STARTUP_CLEAR_BSS
106+
-ffunction-sections -fdata-sections -fstack-usage
125107

126108
LD_FILES = $(wildcard boards/$(BOARD)/*.ld) $(addprefix linking/, flash/$(FLASH).ld chip_family/$(CHIP_FAMILY).ld common.ld)
127109

‎ports/mimxrt10xx/boards/imxrt1010_evk/flash_config.c‎

Lines changed: 2 additions & 16 deletions
Original file line numberDiff line numberDiff line change
@@ -13,12 +13,7 @@
1313
#define FSL_COMPONENT_ID "platform.drivers.xip_device"
1414
#endif
1515

16-
#if defined(XIP_BOOT_HEADER_ENABLE) && (XIP_BOOT_HEADER_ENABLE == 1)
17-
#if defined(__CC_ARM) || defined(__ARMCC_VERSION) || defined(__GNUC__)
18-
__attribute__((section(".boot_hdr.ivt")))
19-
#elif defined(__ICCARM__)
20-
#pragma location=".boot_hdr.ivt"
21-
#endif
16+
__attribute__((section(".boot_hdr.ivt")))
2217
/*************************************
2318
* IVT Data
2419
*************************************/
@@ -33,11 +28,7 @@ const ivt image_vector_table = {
3328
IVT_RSVD /* Reserved = 0 */
3429
};
3530

36-
#if defined(__CC_ARM) || defined(__ARMCC_VERSION) || defined(__GNUC__)
37-
__attribute__((section(".boot_hdr.boot_data")))
38-
#elif defined(__ICCARM__)
39-
#pragma location=".boot_hdr.boot_data"
40-
#endif
31+
__attribute__((section(".boot_hdr.boot_data")))
4132
/*************************************
4233
* Boot Data
4334
*************************************/
@@ -49,12 +40,7 @@ const BOOT_DATA_T boot_data = {
4940
};
5041
#endif
5142

52-
#if defined(__CC_ARM) || defined(__ARMCC_VERSION) || defined(__GNUC__)
5343
__attribute__((section(".boot_hdr.conf")))
54-
#elif defined(__ICCARM__)
55-
#pragma location = ".boot_hdr.conf"
56-
#endif
57-
5844
// Values copied from https://github.com/PaulStoffregen/cores/blob/ddb23fa5d97dac763bc06e11b9b41f026bd51f0a/teensy4/bootdata.c#L39
5945
const flexspi_nor_config_t qspiflash_config = {
6046
.memConfig =

‎ports/mimxrt10xx/boards/imxrt1060_evk/flash_config.c‎

Lines changed: 3 additions & 16 deletions
Original file line numberDiff line numberDiff line change
@@ -13,12 +13,8 @@
1313
#define FSL_COMPONENT_ID "platform.drivers.xip_device"
1414
#endif
1515

16-
#if defined(XIP_BOOT_HEADER_ENABLE) && (XIP_BOOT_HEADER_ENABLE == 1)
17-
#if defined(__CC_ARM) || defined(__ARMCC_VERSION) || defined(__GNUC__)
18-
__attribute__((section(".boot_hdr.ivt")))
19-
#elif defined(__ICCARM__)
20-
#pragma location=".boot_hdr.ivt"
21-
#endif
16+
__attribute__((section(".boot_hdr.ivt")))
17+
2218
/*************************************
2319
* IVT Data
2420
*************************************/
@@ -33,11 +29,7 @@ const ivt image_vector_table = {
3329
IVT_RSVD /* Reserved = 0 */
3430
};
3531

36-
#if defined(__CC_ARM) || defined(__ARMCC_VERSION) || defined(__GNUC__)
37-
__attribute__((section(".boot_hdr.boot_data")))
38-
#elif defined(__ICCARM__)
39-
#pragma location=".boot_hdr.boot_data"
40-
#endif
32+
__attribute__((section(".boot_hdr.boot_data")))
4133
/*************************************
4234
* Boot Data
4335
*************************************/
@@ -49,12 +41,7 @@ const BOOT_DATA_T boot_data = {
4941
};
5042
#endif
5143

52-
#if defined(__CC_ARM) || defined(__ARMCC_VERSION) || defined(__GNUC__)
5344
__attribute__((section(".boot_hdr.conf")))
54-
#elif defined(__ICCARM__)
55-
#pragma location = ".boot_hdr.conf"
56-
#endif
57-
5845
// Values copied from https://github.com/PaulStoffregen/cores/blob/ddb23fa5d97dac763bc06e11b9b41f026bd51f0a/teensy4/bootdata.c#L39
5946
const flexspi_nor_config_t qspiflash_config = {
6047
.memConfig =

‎ports/mimxrt10xx/boards/teensy40/flash_config.c‎

Lines changed: 2 additions & 17 deletions
Original file line numberDiff line numberDiff line change
@@ -13,12 +13,7 @@
1313
#define FSL_COMPONENT_ID "platform.drivers.xip_device"
1414
#endif
1515

16-
#if defined(XIP_BOOT_HEADER_ENABLE) && (XIP_BOOT_HEADER_ENABLE == 1)
17-
#if defined(__CC_ARM) || defined(__ARMCC_VERSION) || defined(__GNUC__)
18-
__attribute__((section(".boot_hdr.ivt")))
19-
#elif defined(__ICCARM__)
20-
#pragma location=".boot_hdr.ivt"
21-
#endif
16+
__attribute__((section(".boot_hdr.ivt")))
2217
/*************************************
2318
* IVT Data
2419
*************************************/
@@ -33,11 +28,7 @@ const ivt image_vector_table = {
3328
IVT_RSVD /* Reserved = 0 */
3429
};
3530

36-
#if defined(__CC_ARM) || defined(__ARMCC_VERSION) || defined(__GNUC__)
37-
__attribute__((section(".boot_hdr.boot_data")))
38-
#elif defined(__ICCARM__)
39-
#pragma location=".boot_hdr.boot_data"
40-
#endif
31+
__attribute__((section(".boot_hdr.boot_data")))
4132
/*************************************
4233
* Boot Data
4334
*************************************/
@@ -47,14 +38,8 @@ const BOOT_DATA_T boot_data = {
4738
PLUGIN_FLAG, /* Plugin flag*/
4839
0xFFFFFFFF /* empty - extra data word */
4940
};
50-
#endif
5141

52-
#if defined(__CC_ARM) || defined(__ARMCC_VERSION) || defined(__GNUC__)
5342
__attribute__((section(".boot_hdr.conf")))
54-
#elif defined(__ICCARM__)
55-
#pragma location = ".boot_hdr.conf"
56-
#endif
57-
5843
// Values copied from https://github.com/PaulStoffregen/cores/blob/ddb23fa5d97dac763bc06e11b9b41f026bd51f0a/teensy4/bootdata.c#L39
5944
const flexspi_nor_config_t qspiflash_config = {
6045
.memConfig =

‎ports/mimxrt10xx/linking/common.ld‎

Lines changed: 10 additions & 14 deletions
Original file line numberDiff line numberDiff line change
@@ -30,7 +30,9 @@ MEMORY
3030
ITCM (x) : ORIGIN = 0x00000000, LENGTH = 32K
3131
}
3232

33-
__RAM_VECTOR_TABLE_SIZE_BYTES = 0;
33+
__data_start__ = 0;
34+
__data_end__ = 0;
35+
_start = 0;
3436

3537
SECTIONS
3638
{
@@ -81,31 +83,28 @@ SECTIONS
8183
.data :
8284
{
8385
. = ALIGN(4);
84-
_sidata = .;
85-
__data_start__ = .; /* create a global symbol at data start */
86-
8786
*(.data*) /* .data* sections */
8887
*flexspi_nor_flash_ops.o(.text*)
8988
*fsl_flexspi.o(.text*)
9089
. = ALIGN(4);
91-
92-
__data_end__ = .; /* define a global symbol at data end */
9390
} > OCRAM AT> FLASH_TEXT
91+
_ld_ocram_data_destination = ADDR(.data);
92+
_ld_ocram_data_flash_copy = LOADADDR(.data);
93+
_ld_ocram_data_size = SIZEOF(.data);
9494

9595
/* Uninitialized data section */
9696
.bss :
9797
{
9898
. = ALIGN(4);
99-
__bss_start__ = .;
10099

101100
*(.bss*)
102101
*(COMMON)
103102

104103
. = ALIGN(4);
105-
__bss_end__ = .;
106-
_ld_heap_start = .;
107-
PROVIDE(end = .);
108104
} > OCRAM
105+
_ld_ocram_bss_start = ADDR(.bss);
106+
_ld_ocram_bss_size = SIZEOF(.bss);
107+
_ld_heap_start = _ld_ocram_bss_start + _ld_ocram_bss_size;
109108
_ld_heap_end = ORIGIN(OCRAM) + LENGTH(OCRAM);
110109

111110
.itcm :
@@ -141,7 +140,7 @@ SECTIONS
141140
. = ALIGN(4);
142141
} > DTCM AT> DTCM
143142
_ld_dtcm_bss_start = ADDR(.dtcm_bss);
144-
_ld_dtcm_bss_end = ADDR(.dtcm_bss) + SIZEOF(.dtcm_bss);
143+
_ld_dtcm_bss_size = SIZEOF(.dtcm_bss);
145144

146145
.stack :
147146
{
@@ -150,9 +149,6 @@ SECTIONS
150149
. += _ld_default_stack_size;
151150
} > DTCM
152151
_ld_stack_top = ORIGIN(DTCM) + LENGTH(DTCM);
153-
_estack = _ld_stack_top;
154152

155153
.ARM.attributes 0 : { *(.ARM.attributes) }
156154
}
157-
158-
ASSERT(__data_end__ <= ORIGIN(FLASH_TEXT) + LENGTH(FLASH_TEXT), "region FLASH_TEXT overflowed with text and data")

‎ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1011/clocks.c‎

Lines changed: 0 additions & 31 deletions
Original file line numberDiff line numberDiff line change
@@ -129,19 +129,6 @@ void clocks_init(void) {
129129
CLOCK_DisableClock(kCLOCK_Pit);
130130
/* Set PERCLK_PODF. */
131131
CLOCK_SetDiv(kCLOCK_PerclkDiv, 1);
132-
/* In SDK projects, external flash (configured by FLEXSPI) will be initialized by dcd.
133-
* With this macro XIP_EXTERNAL_FLASH, usb1 pll (selected to be FLEXSPI clock source in SDK projects) will be left
134-
* unchanged. Note: If another clock source is selected for FLEXSPI, user may want to avoid changing that clock as
135-
* well.*/
136-
#if !(defined(XIP_EXTERNAL_FLASH) && (XIP_EXTERNAL_FLASH == 1))
137-
/* Disable Flexspi clock gate. */
138-
CLOCK_DisableClock(kCLOCK_FlexSpi);
139-
/* Set FLEXSPI_PODF. */
140-
CLOCK_SetDiv(kCLOCK_FlexspiDiv, 3);
141-
/* Set Flexspi clock source. */
142-
CLOCK_SetMux(kCLOCK_FlexspiMux, 0);
143-
CLOCK_SetMux(kCLOCK_FlexspiSrcMux, 0);
144-
#endif
145132
/* Disable ADC_ACLK_EN clock gate. */
146133
CCM->CSCMR2 &= ~CCM_CSCMR2_ADC_ACLK_EN_MASK;
147134
/* Set ADC_ACLK_PODF. */
@@ -219,24 +206,6 @@ void clocks_init(void) {
219206
CLOCK_InitSysPfd(kCLOCK_Pfd2, 18);
220207
/* Init System pfd3. */
221208
CLOCK_InitSysPfd(kCLOCK_Pfd3, 18);
222-
/* In SDK projects, external flash (configured by FLEXSPI) will be initialized by dcd.
223-
* With this macro XIP_EXTERNAL_FLASH, usb1 pll (selected to be FLEXSPI clock source in SDK projects) will be left
224-
* unchanged. Note: If another clock source is selected for FLEXSPI, user may want to avoid changing that clock as
225-
* well.*/
226-
#if !(defined(XIP_EXTERNAL_FLASH) && (XIP_EXTERNAL_FLASH == 1))
227-
/* Init Usb1 PLL. */
228-
CLOCK_InitUsb1Pll(&usb1PllConfig_BOARD_BootClockRUN);
229-
/* Init Usb1 pfd0. */
230-
CLOCK_InitUsb1Pfd(kCLOCK_Pfd0, 22);
231-
/* Init Usb1 pfd1. */
232-
CLOCK_InitUsb1Pfd(kCLOCK_Pfd1, 16);
233-
/* Init Usb1 pfd2. */
234-
CLOCK_InitUsb1Pfd(kCLOCK_Pfd2, 17);
235-
/* Init Usb1 pfd3. */
236-
CLOCK_InitUsb1Pfd(kCLOCK_Pfd3, 18);
237-
/* Disable Usb1 PLL output for USBPHY1. */
238-
CCM_ANALOG->PLL_USB1 &= ~CCM_ANALOG_PLL_USB1_EN_USB_CLKS_MASK;
239-
#endif
240209
/* DeInit Audio PLL. */
241210
CLOCK_DeinitAudioPll();
242211
/* Bypass Audio PLL. */

‎ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1021/clocks.c‎

Lines changed: 0 additions & 30 deletions
Original file line numberDiff line numberDiff line change
@@ -176,18 +176,6 @@ void clocks_init(void) {
176176
CLOCK_SetMux(kCLOCK_SemcAltMux, 0);
177177
/* Set Semc clock source. */
178178
CLOCK_SetMux(kCLOCK_SemcMux, 0);
179-
#endif
180-
/* In SDK projects, external flash (configured by FLEXSPI) will be initialized by dcd.
181-
* With this macro XIP_EXTERNAL_FLASH, usb1 pll (selected to be FLEXSPI clock source in SDK projects) will be left
182-
* unchanged. Note: If another clock source is selected for FLEXSPI, user may want to avoid changing that clock as
183-
* well.*/
184-
#if !(defined(XIP_EXTERNAL_FLASH) && (XIP_EXTERNAL_FLASH == 1))
185-
/* Disable Flexspi clock gate. */
186-
CLOCK_DisableClock(kCLOCK_FlexSpi);
187-
/* Set FLEXSPI_PODF. */
188-
CLOCK_SetDiv(kCLOCK_FlexspiDiv, 3);
189-
/* Set Flexspi clock source. */
190-
CLOCK_SetMux(kCLOCK_FlexspiMux, 2);
191179
#endif
192180
/* Disable LPSPI clock gate. */
193181
CLOCK_DisableClock(kCLOCK_Lpspi1);
@@ -294,24 +282,6 @@ void clocks_init(void) {
294282
CLOCK_InitSysPfd(kCLOCK_Pfd2, 18);
295283
/* Init System pfd3. */
296284
CLOCK_InitSysPfd(kCLOCK_Pfd3, 18);
297-
#endif
298-
/* In SDK projects, external flash (configured by FLEXSPI) will be initialized by dcd.
299-
* With this macro XIP_EXTERNAL_FLASH, usb1 pll (selected to be FLEXSPI clock source in SDK projects) will be left
300-
* unchanged. Note: If another clock source is selected for FLEXSPI, user may want to avoid changing that clock as
301-
* well.*/
302-
#if !(defined(XIP_EXTERNAL_FLASH) && (XIP_EXTERNAL_FLASH == 1))
303-
/* Init Usb1 PLL. */
304-
CLOCK_InitUsb1Pll(&usb1PllConfig_BOARD_BootClockRUN);
305-
/* Init Usb1 pfd0. */
306-
CLOCK_InitUsb1Pfd(kCLOCK_Pfd0, 22);
307-
/* Init Usb1 pfd1. */
308-
CLOCK_InitUsb1Pfd(kCLOCK_Pfd1, 16);
309-
/* Init Usb1 pfd2. */
310-
CLOCK_InitUsb1Pfd(kCLOCK_Pfd2, 17);
311-
/* Init Usb1 pfd3. */
312-
CLOCK_InitUsb1Pfd(kCLOCK_Pfd3, 18);
313-
/* Disable Usb1 PLL output for USBPHY1. */
314-
CCM_ANALOG->PLL_USB1 &= ~CCM_ANALOG_PLL_USB1_EN_USB_CLKS_MASK;
315285
#endif
316286
/* DeInit Audio PLL. */
317287
CLOCK_DeinitAudioPll();

‎ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1062/clocks.c‎

Lines changed: 0 additions & 28 deletions
Original file line numberDiff line numberDiff line change
@@ -129,17 +129,6 @@ void clocks_init(void) {
129129
CLOCK_SetMux(kCLOCK_SemcAltMux, 0);
130130
/* Set Semc clock source. */
131131
CLOCK_SetMux(kCLOCK_SemcMux, 0);
132-
#endif
133-
/* In SDK projects, external flash (configured by FLEXSPI) will be initialized by dcd.
134-
* With this macro XIP_EXTERNAL_FLASH, usb1 pll (selected to be FLEXSPI clock source in SDK projects) will be left unchanged.
135-
* Note: If another clock source is selected for FLEXSPI, user may want to avoid changing that clock as well.*/
136-
#if !(defined(XIP_EXTERNAL_FLASH) && (XIP_EXTERNAL_FLASH == 1))
137-
/* Disable Flexspi clock gate. */
138-
CLOCK_DisableClock(kCLOCK_FlexSpi);
139-
/* Set FLEXSPI_PODF. */
140-
CLOCK_SetDiv(kCLOCK_FlexspiDiv, 1);
141-
/* Set Flexspi clock source. */
142-
CLOCK_SetMux(kCLOCK_FlexspiMux, 3);
143132
#endif
144133
/* Disable LPSPI clock gate. */
145134
CLOCK_DisableClock(kCLOCK_Lpspi1);
@@ -254,23 +243,6 @@ void clocks_init(void) {
254243
CLOCK_InitSysPfd(kCLOCK_Pfd2, 24);
255244
/* Init System pfd3. */
256245
CLOCK_InitSysPfd(kCLOCK_Pfd3, 16);
257-
#endif
258-
/* In SDK projects, external flash (configured by FLEXSPI) will be initialized by dcd.
259-
* With this macro XIP_EXTERNAL_FLASH, usb1 pll (selected to be FLEXSPI clock source in SDK projects) will be left unchanged.
260-
* Note: If another clock source is selected for FLEXSPI, user may want to avoid changing that clock as well.*/
261-
#if !(defined(XIP_EXTERNAL_FLASH) && (XIP_EXTERNAL_FLASH == 1))
262-
/* Init Usb1 PLL. */
263-
CLOCK_InitUsb1Pll(&usb1PllConfig_BOARD_BootClockRUN);
264-
/* Init Usb1 pfd0. */
265-
CLOCK_InitUsb1Pfd(kCLOCK_Pfd0, 33);
266-
/* Init Usb1 pfd1. */
267-
CLOCK_InitUsb1Pfd(kCLOCK_Pfd1, 16);
268-
/* Init Usb1 pfd2. */
269-
CLOCK_InitUsb1Pfd(kCLOCK_Pfd2, 17);
270-
/* Init Usb1 pfd3. */
271-
CLOCK_InitUsb1Pfd(kCLOCK_Pfd3, 19);
272-
/* Disable Usb1 PLL output for USBPHY1. */
273-
CCM_ANALOG->PLL_USB1 &= ~CCM_ANALOG_PLL_USB1_EN_USB_CLKS_MASK;
274246
#endif
275247
/* DeInit Audio PLL. */
276248
CLOCK_DeinitAudioPll();

‎ports/mimxrt10xx/supervisor/flexspi_nor_flash_ops.c‎

Lines changed: 0 additions & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -16,19 +16,10 @@
1616

1717
static inline void flexspi_clock_init(void)
1818
{
19-
#if defined(XIP_EXTERNAL_FLASH) && (XIP_EXTERNAL_FLASH == 1)
2019
/* Switch to PLL2 for XIP to avoid hardfault during re-initialize clock. */
2120
CLOCK_InitSysPfd(kCLOCK_Pfd2, 24); /* Set PLL2 PFD2 clock 396MHZ. */
2221
CLOCK_SetMux(kCLOCK_FlexspiMux, 0x2); /* Choose PLL2 PFD2 clock as flexspi source clock. */
2322
CLOCK_SetDiv(kCLOCK_FlexspiDiv, 2); /* flexspi clock 133M. */
24-
#else
25-
const clock_usb_pll_config_t g_ccmConfigUsbPll = {.loopDivider = 0U};
26-
27-
CLOCK_InitUsb1Pll(&g_ccmConfigUsbPll);
28-
CLOCK_InitUsb1Pfd(kCLOCK_Pfd0, 24); /* Set PLL3 PFD0 clock 360MHZ. */
29-
CLOCK_SetMux(kCLOCK_FlexspiMux, 0x3); /* Choose PLL3 PFD0 clock as flexspi source clock. */
30-
CLOCK_SetDiv(kCLOCK_FlexspiDiv, 2); /* flexspi clock 120M. */
31-
#endif
3223
}
3324

3425
extern flexspi_device_config_t deviceconfig;

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