@@ -44,7 +44,7 @@ digitalinout_result_t common_hal_digitalio_digitalinout_construct(
4444 WRITE_PERI_REG (PAD_XPD_DCDC_CONF , (READ_PERI_REG (PAD_XPD_DCDC_CONF ) & 0xffffffbc ) | 1 ); // mux configuration for XPD_DCDC and rtc_gpio0 connection
4545 WRITE_PERI_REG (RTC_GPIO_CONF , READ_PERI_REG (RTC_GPIO_CONF ) & ~1 ); //mux configuration for out enable
4646 WRITE_PERI_REG (RTC_GPIO_ENABLE , READ_PERI_REG (RTC_GPIO_ENABLE ) & ~1 ); //out disable
47- gpio16_in_use = true ;
47+ claim_pin ( pin ) ;
4848 } else {
4949 PIN_FUNC_SELECT (self -> pin -> peripheral , self -> pin -> gpio_function );
5050 }
@@ -65,10 +65,7 @@ void common_hal_digitalio_digitalinout_deinit(digitalio_digitalinout_obj_t* self
6565 PIN_FUNC_SELECT (self -> pin -> peripheral , 0 );
6666 PIN_PULLUP_DIS (self -> pin -> peripheral );
6767 } else {
68- WRITE_PERI_REG (PAD_XPD_DCDC_CONF , (READ_PERI_REG (PAD_XPD_DCDC_CONF ) & 0xffffffbc ) | 1 ); // mux configuration for XPD_DCDC and rtc_gpio0 connection
69- WRITE_PERI_REG (RTC_GPIO_CONF , READ_PERI_REG (RTC_GPIO_CONF ) & ~1 ); //mux configuration for out enable
70- WRITE_PERI_REG (RTC_GPIO_ENABLE , READ_PERI_REG (RTC_GPIO_ENABLE ) & ~1 ); //out disable
71- gpio16_in_use = false;
68+ reset_pin (self -> pin );
7269 }
7370 self -> pin = mp_const_none ;
7471}
@@ -113,12 +110,12 @@ void common_hal_digitalio_digitalinout_set_value(
113110 digitalio_digitalinout_obj_t * self , bool value ) {
114111 if (self -> pin -> gpio_number == 16 ) {
115112 if (self -> open_drain && value ) {
116- // configure GPIO16 as input with output register holding 0
117- WRITE_PERI_REG (PAD_XPD_DCDC_CONF , (READ_PERI_REG (PAD_XPD_DCDC_CONF ) & 0xffffffbc ) | 1 );
118- WRITE_PERI_REG (RTC_GPIO_CONF , READ_PERI_REG (RTC_GPIO_CONF ) & ~1 );
119- WRITE_PERI_REG (RTC_GPIO_ENABLE , (READ_PERI_REG (RTC_GPIO_ENABLE ) & ~1 )); // input
120- WRITE_PERI_REG (RTC_GPIO_OUT , (READ_PERI_REG (RTC_GPIO_OUT ) & ~ 1 )); // out=0
121- return ;
113+ // configure GPIO16 as input with output register holding 0
114+ WRITE_PERI_REG (PAD_XPD_DCDC_CONF , (READ_PERI_REG (PAD_XPD_DCDC_CONF ) & 0xffffffbc ) | 1 );
115+ WRITE_PERI_REG (RTC_GPIO_CONF , READ_PERI_REG (RTC_GPIO_CONF ) & ~1 );
116+ WRITE_PERI_REG (RTC_GPIO_ENABLE , (READ_PERI_REG (RTC_GPIO_ENABLE ) & ~1 )); // input
117+ WRITE_PERI_REG (RTC_GPIO_OUT , (READ_PERI_REG (RTC_GPIO_OUT ) & 1 )); // out=1
118+ return ;
122119 } else {
123120 int out_en = self -> output ;
124121 WRITE_PERI_REG (PAD_XPD_DCDC_CONF , (READ_PERI_REG (PAD_XPD_DCDC_CONF ) & 0xffffffbc ) | 1 );
@@ -158,7 +155,7 @@ bool common_hal_digitalio_digitalinout_get_value(
158155 return GPIO_INPUT_GET (self -> pin -> gpio_number );
159156 } else {
160157 if (self -> pin -> gpio_number == 16 ) {
161- if (self -> open_drain && ( READ_PERI_REG (RTC_GPIO_OUT ) | READ_PERI_REG ( RTC_GPIO_ENABLE ) ) == 0 ) {
158+ if (self -> open_drain && READ_PERI_REG (RTC_GPIO_ENABLE ) == 0 ) {
162159 return true;
163160 } else {
164161 return READ_PERI_REG (RTC_GPIO_OUT ) & 1 ;
0 commit comments