@@ -51,29 +51,29 @@ void sys_tick_wait_at_least(uint32_t start_tick, uint32_t delay_ms) {
5151//
5252// We assume that HAL_GetTickis returns milliseconds.
5353uint32_t sys_tick_get_microseconds (void ) {
54- mp_int_t enabled = disable_irq ();
54+ mp_uint_t irq_state = disable_irq ();
5555 uint32_t counter = SysTick -> VAL ;
5656 uint32_t milliseconds = HAL_GetTick ();
5757 uint32_t status = SysTick -> CTRL ;
58- enable_irq (enabled );
58+ enable_irq (irq_state );
5959
60- // It's still possible for the countflag bit to get set if the counter was
61- // reloaded between reading VAL and reading CTRL. With interrupts disabled
62- // it definitely takes less than 50 HCLK cycles between reading VAL and
63- // reading CTRL, so the test (counter > 50) is to cover the case where VAL
64- // is +ve and very close to zero, and the COUNTFLAG bit is also set.
65- if ((status & SysTick_CTRL_COUNTFLAG_Msk ) && counter > 50 ) {
66- // This means that the HW reloaded VAL between the time we read VAL and the
67- // time we read CTRL, which implies that there is an interrupt pending
68- // to increment the tick counter.
69- milliseconds ++ ;
70- }
71- uint32_t load = SysTick -> LOAD ;
72- counter = load - counter ; // Convert from decrementing to incrementing
60+ // It's still possible for the countflag bit to get set if the counter was
61+ // reloaded between reading VAL and reading CTRL. With interrupts disabled
62+ // it definitely takes less than 50 HCLK cycles between reading VAL and
63+ // reading CTRL, so the test (counter > 50) is to cover the case where VAL
64+ // is +ve and very close to zero, and the COUNTFLAG bit is also set.
65+ if ((status & SysTick_CTRL_COUNTFLAG_Msk ) && counter > 50 ) {
66+ // This means that the HW reloaded VAL between the time we read VAL and the
67+ // time we read CTRL, which implies that there is an interrupt pending
68+ // to increment the tick counter.
69+ milliseconds ++ ;
70+ }
71+ uint32_t load = SysTick -> LOAD ;
72+ counter = load - counter ; // Convert from decrementing to incrementing
7373
74- // ((load + 1) / 1000) is the number of counts per microsecond.
75- //
76- // counter / ((load + 1) / 1000) scales from the systick clock to microseconds
77- // and is the same thing as (counter * 1000) / (load + 1)
78- return milliseconds * 1000 + (counter * 1000 ) / (load + 1 );
74+ // ((load + 1) / 1000) is the number of counts per microsecond.
75+ //
76+ // counter / ((load + 1) / 1000) scales from the systick clock to microseconds
77+ // and is the same thing as (counter * 1000) / (load + 1)
78+ return milliseconds * 1000 + (counter * 1000 ) / (load + 1 );
7979}
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