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meta-nuvoton: npcm8xx-tip-fw: update to 0.8.5.0.7.4
Update TIP FW from 0.8.3.0.7.2 to 0.8.5.0.7.4 TIP_FW 0.8.5 L0 0.7.4 L1: - Life cycle handling improvements: - Changed life cycle constants from full byte to nibble values (0x33->0x3, 0x55->0x5, 0x77->0x7, 0xFF->0xF) - Added LIFE_CYCLE_NO_TIP (0x6) and LIFE_CYCLE_UNDEFINED (0xFF) states - Life cycle reading now uses OR function between LSB and MSB nibbles - Avoid OTP fusing when life cycle is UNTESTED (0) or NO_TIP (0x6) TIP_FW 0.8.4 L0 0.7.3 L1: - TIP_Dummy_OTP: per validation request, removed initialization of the ram to 0s - HAL improvements: - Update npcm850_fuse_wrapper.h and fuse_drv.c to latest HAL fixes - FUSE_ProgramBit signature is now the same with or without TIP_Dummy_OTP - CLK: added CLK_GetUpTimeMicroseconds - npcm850_regs.h: shorten and fixed the definition of SCRPAD_42_73 - RNG fixes: - Removed pROM_NCL_DRBG_* init function calls with inner context from init_state function, as the ROM code context is used for drbg_generate - Added NCL_Debg_config function option for future reference, using the NCL_DRBG_context_l context as used on ROM - Fix rng writes to registers Signed-off-by: Adi Glick <adi.glick@nuvoton.com> Signed-off-by: Tim Lee <timlee660101@gmail.com> Change-Id: I93358a797d91380c1e7faab8b3ff62c3bbe86fa4
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meta-nuvoton/recipes-bsp/images/npcm8xx-tip-fw_0.8.3.0.7.2.bb renamed to meta-nuvoton/recipes-bsp/images/npcm8xx-tip-fw_0.8.5.0.7.4.bb

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SRCREV = "dc619a0714890d6ccfa22afe4394e7d6a9bd0ccc"
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SRCREV = "78d98c20af250b7ed2345e5486e9bedfe0527cc5"
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OUTPUT_BIN = "output_binaries_${DEVICE_GEN}_${IGPS_MACHINE}"
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