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clocksource/drivers/timer-ti-dm: Simplify register access further
Let's unify register access and use dmtimer_read() and dmtimer_write() also for the timer revision specific registers like we now do for the shread registers. Signed-off-by: Tony Lindgren <tony@atomide.com> Reviewed-by: Janusz Krzysztofik <jmkrzyszt@gmail.com> Link: https://lore.kernel.org/r/20220815131250.34603-5-tony@atomide.com Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
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‎drivers/clocksource/timer-ti-dm.c‎

Lines changed: 14 additions & 14 deletions
Original file line numberDiff line numberDiff line change
@@ -101,16 +101,16 @@ static inline void __omap_dm_timer_init_regs(struct omap_dm_timer *timer)
101101
tidr = readl_relaxed(timer->io_base);
102102
if (!(tidr >> 16)) {
103103
timer->revision = 1;
104-
timer->irq_stat = timer->io_base + OMAP_TIMER_V1_STAT_OFFSET;
105-
timer->irq_ena = timer->io_base + OMAP_TIMER_V1_INT_EN_OFFSET;
106-
timer->irq_dis = timer->io_base + OMAP_TIMER_V1_INT_EN_OFFSET;
104+
timer->irq_stat = OMAP_TIMER_V1_STAT_OFFSET;
105+
timer->irq_ena = OMAP_TIMER_V1_INT_EN_OFFSET;
106+
timer->irq_dis = OMAP_TIMER_V1_INT_EN_OFFSET;
107107
timer->pend = timer->io_base + _OMAP_TIMER_WRITE_PEND_OFFSET;
108108
timer->func_base = timer->io_base;
109109
} else {
110110
timer->revision = 2;
111-
timer->irq_stat = timer->io_base + OMAP_TIMER_V2_IRQSTATUS;
112-
timer->irq_ena = timer->io_base + OMAP_TIMER_V2_IRQENABLE_SET;
113-
timer->irq_dis = timer->io_base + OMAP_TIMER_V2_IRQENABLE_CLR;
111+
timer->irq_stat = OMAP_TIMER_V2_IRQSTATUS - OMAP_TIMER_V2_FUNC_OFFSET;
112+
timer->irq_ena = OMAP_TIMER_V2_IRQENABLE_SET - OMAP_TIMER_V2_FUNC_OFFSET;
113+
timer->irq_dis = OMAP_TIMER_V2_IRQENABLE_CLR - OMAP_TIMER_V2_FUNC_OFFSET;
114114
timer->pend = timer->io_base +
115115
_OMAP_TIMER_WRITE_PEND_OFFSET +
116116
OMAP_TIMER_V2_FUNC_OFFSET;
@@ -165,13 +165,13 @@ static inline void __omap_dm_timer_stop(struct omap_dm_timer *timer,
165165
}
166166

167167
/* Ack possibly pending interrupt */
168-
writel_relaxed(OMAP_TIMER_INT_OVERFLOW, timer->irq_stat);
168+
dmtimer_write(timer, timer->irq_stat, OMAP_TIMER_INT_OVERFLOW);
169169
}
170170

171171
static inline void __omap_dm_timer_int_enable(struct omap_dm_timer *timer,
172172
unsigned int value)
173173
{
174-
writel_relaxed(value, timer->irq_ena);
174+
dmtimer_write(timer, timer->irq_ena, value);
175175
dmtimer_write(timer, OMAP_TIMER_WAKEUP_EN_REG, value);
176176
}
177177

@@ -184,7 +184,7 @@ __omap_dm_timer_read_counter(struct omap_dm_timer *timer)
184184
static inline void __omap_dm_timer_write_status(struct omap_dm_timer *timer,
185185
unsigned int value)
186186
{
187-
writel_relaxed(value, timer->irq_stat);
187+
dmtimer_write(timer, timer->irq_stat, value);
188188
}
189189

190190
static void omap_timer_restore_context(struct omap_dm_timer *timer)
@@ -196,7 +196,7 @@ static void omap_timer_restore_context(struct omap_dm_timer *timer)
196196
dmtimer_write(timer, OMAP_TIMER_LOAD_REG, timer->context.tldr);
197197
dmtimer_write(timer, OMAP_TIMER_MATCH_REG, timer->context.tmar);
198198
dmtimer_write(timer, OMAP_TIMER_IF_CTRL_REG, timer->context.tsicr);
199-
writel_relaxed(timer->context.tier, timer->irq_ena);
199+
dmtimer_write(timer, timer->irq_ena, timer->context.tier);
200200
dmtimer_write(timer, OMAP_TIMER_CTRL_REG, timer->context.tclr);
201201
}
202202

@@ -208,7 +208,7 @@ static void omap_timer_save_context(struct omap_dm_timer *timer)
208208
timer->context.twer = dmtimer_read(timer, OMAP_TIMER_WAKEUP_EN_REG);
209209
timer->context.tldr = dmtimer_read(timer, OMAP_TIMER_LOAD_REG);
210210
timer->context.tmar = dmtimer_read(timer, OMAP_TIMER_MATCH_REG);
211-
timer->context.tier = readl_relaxed(timer->irq_ena);
211+
timer->context.tier = dmtimer_read(timer, timer->irq_ena);
212212
timer->context.tsicr = dmtimer_read(timer, OMAP_TIMER_IF_CTRL_REG);
213213
}
214214

@@ -722,9 +722,9 @@ static int omap_dm_timer_set_int_disable(struct omap_dm_timer *timer, u32 mask)
722722
omap_dm_timer_enable(timer);
723723

724724
if (timer->revision == 1)
725-
l = readl_relaxed(timer->irq_ena) & ~mask;
725+
l = dmtimer_read(timer, timer->irq_ena) & ~mask;
726726

727-
writel_relaxed(l, timer->irq_dis);
727+
dmtimer_write(timer, timer->irq_dis, l);
728728
l = dmtimer_read(timer, OMAP_TIMER_WAKEUP_EN_REG) & ~mask;
729729
dmtimer_write(timer, OMAP_TIMER_WAKEUP_EN_REG, l);
730730

@@ -741,7 +741,7 @@ static unsigned int omap_dm_timer_read_status(struct omap_dm_timer *timer)
741741
return 0;
742742
}
743743

744-
l = readl_relaxed(timer->irq_stat);
744+
l = dmtimer_read(timer, timer->irq_stat);
745745

746746
return l;
747747
}

‎include/clocksource/timer-ti-dm.h‎

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -100,9 +100,9 @@ struct omap_dm_timer {
100100
struct clk *fclk;
101101

102102
void __iomem *io_base;
103-
void __iomem *irq_stat; /* TISR/IRQSTATUS interrupt status */
104-
void __iomem *irq_ena; /* irq enable */
105-
void __iomem *irq_dis; /* irq disable, only on v2 ip */
103+
int irq_stat; /* TISR/IRQSTATUS interrupt status */
104+
int irq_ena; /* irq enable */
105+
int irq_dis; /* irq disable, only on v2 ip */
106106
void __iomem *pend; /* write pending */
107107
void __iomem *func_base; /* function register base */
108108

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