@@ -1578,6 +1578,7 @@ const bool Matcher::match_rule_supported(int opcode) {
15781578 }
15791579 break;
15801580
1581+ case Op_VectorCmpMasked:
15811582 case Op_VectorMaskGen:
15821583 case Op_LoadVectorMasked:
15831584 case Op_StoreVectorMasked:
@@ -1678,6 +1679,7 @@ const bool Matcher::match_rule_supported_vector(int opcode, int vlen, BasicType
16781679 break;
16791680 case Op_ClearArray:
16801681 case Op_VectorMaskGen:
1682+ case Op_VectorCmpMasked:
16811683 case Op_LoadVectorMasked:
16821684 case Op_StoreVectorMasked:
16831685 if (!is_LP64 || !VM_Version::supports_avx512bw()) {
@@ -8084,7 +8086,34 @@ instruct vprorate(vec dst, vec src, vec shift) %{
80848086%}
80858087
80868088#ifdef _LP64
8087- // ---------------------------------- Masked Block Copy ------------------------------------
8089+ // ---------------------------------- Masked Operations ------------------------------------
8090+
8091+ instruct vmask_cmp_node(rRegI dst, vec src1, vec src2, kReg mask, kReg ktmp1, kReg ktmp2, rFlagsReg cr) %{
8092+ match(Set dst (VectorCmpMasked src1 (Binary src2 mask)));
8093+ effect(TEMP_DEF dst, TEMP ktmp1, TEMP ktmp2, KILL cr);
8094+ format %{ "vector_mask_cmp $src1, $src2, $mask \t! vector mask comparison" %}
8095+ ins_encode %{
8096+ assert(vector_length_encoding(this, $src1) == vector_length_encoding(this, $src2), "mismatch");
8097+ assert(vector_element_basic_type(this, $src1) == vector_element_basic_type(this, $src2), "mismatch");
8098+
8099+ Label DONE;
8100+ int vlen_enc = vector_length_encoding(this, $src1);
8101+ BasicType elem_bt = vector_element_basic_type(this, $src1);
8102+
8103+ __ knotql($ktmp2$$KRegister, $mask$$KRegister);
8104+ __ mov64($dst$$Register, -1L);
8105+ __ evpcmp(elem_bt, $ktmp1$$KRegister, $mask$$KRegister, $src1$$XMMRegister, $src2$$XMMRegister, Assembler::eq, vlen_enc);
8106+ __ kortestql($ktmp2$$KRegister, $ktmp1$$KRegister);
8107+ __ jccb(Assembler::carrySet, DONE);
8108+ __ kmovql($dst$$Register, $ktmp1$$KRegister);
8109+ __ notq($dst$$Register);
8110+ __ tzcntq($dst$$Register, $dst$$Register);
8111+ __ bind(DONE);
8112+ %}
8113+ ins_pipe( pipe_slow );
8114+ %}
8115+
8116+
80888117instruct vmasked_load64(vec dst, memory mem, kReg mask) %{
80898118 match(Set dst (LoadVectorMasked mem mask));
80908119 format %{ "vector_masked_load $dst, $mem, $mask \t! vector masked copy" %}
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