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Query regarding inclusivity of Cache levels #638
Description
Hi,
I am working on December Release of Champsim. I wanted to know whether cache hierarchy is inclusive/non-inclusive/exclusive.
Could you please point out which files and which portion of code I need to look into for confirming the inclusivity property. Could you also please suggest what kind of basic checks I can do to confirm the nature of cache hierarchy.
Activity
ngober commentedon Jul 25, 2025
See the discussion in #350.
The model is non-inclusive. There is no enforcement from the lower level to the upper level. The most basic check that you could do to verify this is a workload with small instruction footprint and large data footprint, where an eviction of instructions from the second level does not cause an L1I miss.
seemakurthi-anand commentedon Jul 26, 2025
Hi,
Thanks for your reply. #350 looks like huge discussion to go through. I will need some time to go through it . Between, could you please tell this non-inclusive nature is just for L2 or even for LLC.
ngober commentedon Jul 26, 2025
Yes, inclusivity is high on the wish list, but it's been difficult to get time devoted to it. All cache levels have identical cache models. The relationship between all pairs of cache levels is non-inclusive.
seemakurthi-anand commentedon Jul 29, 2025
Thanks for your response. Also I could see some commits made for ship, drrip replacement policy regarding selecting the sampler sets and chosing the qty of sampler sets based on cache size(l2 or llc etc) #603 . Can I use this code to test DRRIP and SHiP before its visible in the final version on champsim. What are your suggestions regarding this??