Skip to content

Pin-based ChampSim Traces consider x86 partial registers to be independent #575

Open

Description

@joshualmashburn

Describe the bug
ChampSim traces created using the Intel Pin tracer use the values from the REG enum, which assign unique values to (for example) AX/AH/AL/EAX/RAX, and similarly to RSP/ESP/SP and others, like the AVX registers.

To Reproduce
N/A

Expected behavior
Currently, this causes register usage to be quite high, as in my own testing on the SPEC traces, I see upwards of 90 unique register identifiers in use, whereas there should only be around 40-50 or so. While register dependency chains of mixed-size are not very common, this is incorrect behavior.

Proposed fix
In the instruction intake function, at runtime, alias the partial register reference values to that of their respective parent registers. For example, AH, AL, AX, and EAX would all use the same identifier as RAX.

Activity

  1. joshualmashburn commented on Jan 7, 2025

    @joshualmashburn
    ContributorAuthor

    I know there are other traces out there that weren't created using Pin. I can implement this fix, but I need to know more information about the non-Pin traces, so I don't accidentally cause a new problem for those.

  2. ngober commented on Jan 7, 2025

    @ngober
    Collaborator

    I agree, but I think the solution is best solved with a new trace format: #382 (comment)

Sign up for free to join this conversation on GitHub. Already have an account? Sign in to comment

Metadata

Metadata

Assignees

No one assigned

    Labels

    Type

    No type

    Projects

    No projects

      Milestone

      No milestone

      Relationships

      None yet

      Development

      No branches or pull requests

      Issue actions