| 1 | /* SPDX-License-Identifier: GPL-2.0+ */ |
| 2 | /* |
| 3 | * Copyright 2015-2017 Google, Inc |
| 4 | * |
| 5 | * USB Type-C Port Controller Interface. |
| 6 | */ |
| 7 | |
| 8 | #ifndef __LINUX_USB_TCPCI_H |
| 9 | #define __LINUX_USB_TCPCI_H |
| 10 | |
| 11 | #include <linux/usb/typec.h> |
| 12 | #include <linux/usb/tcpm.h> |
| 13 | |
| 14 | #define TCPC_VENDOR_ID 0x0 |
| 15 | #define TCPC_PRODUCT_ID 0x2 |
| 16 | #define TCPC_BCD_DEV 0x4 |
| 17 | #define TCPC_TC_REV 0x6 |
| 18 | #define TCPC_PD_REV 0x8 |
| 19 | #define TCPC_PD_INT_REV 0xa |
| 20 | |
| 21 | #define TCPC_ALERT 0x10 |
| 22 | #define TCPC_ALERT_EXTND BIT(14) |
| 23 | #define TCPC_ALERT_EXTENDED_STATUS BIT(13) |
| 24 | #define TCPC_ALERT_VBUS_DISCNCT BIT(11) |
| 25 | #define TCPC_ALERT_RX_BUF_OVF BIT(10) |
| 26 | #define TCPC_ALERT_FAULT BIT(9) |
| 27 | #define TCPC_ALERT_V_ALARM_LO BIT(8) |
| 28 | #define TCPC_ALERT_V_ALARM_HI BIT(7) |
| 29 | #define TCPC_ALERT_TX_SUCCESS BIT(6) |
| 30 | #define TCPC_ALERT_TX_DISCARDED BIT(5) |
| 31 | #define TCPC_ALERT_TX_FAILED BIT(4) |
| 32 | #define TCPC_ALERT_RX_HARD_RST BIT(3) |
| 33 | #define TCPC_ALERT_RX_STATUS BIT(2) |
| 34 | #define TCPC_ALERT_POWER_STATUS BIT(1) |
| 35 | #define TCPC_ALERT_CC_STATUS BIT(0) |
| 36 | |
| 37 | #define TCPC_ALERT_MASK 0x12 |
| 38 | #define TCPC_POWER_STATUS_MASK 0x14 |
| 39 | |
| 40 | #define TCPC_FAULT_STATUS_MASK 0x15 |
| 41 | #define TCPC_FAULT_STATUS_MASK_VCONN_OC BIT(1) |
| 42 | |
| 43 | #define TCPC_EXTENDED_STATUS_MASK 0x16 |
| 44 | #define TCPC_EXTENDED_STATUS_MASK_VSAFE0V BIT(0) |
| 45 | |
| 46 | #define TCPC_ALERT_EXTENDED_MASK 0x17 |
| 47 | #define TCPC_SINK_FAST_ROLE_SWAP BIT(0) |
| 48 | |
| 49 | #define TCPC_CONFIG_STD_OUTPUT 0x18 |
| 50 | #define TCPC_CONFIG_STD_OUTPUT_ORIENTATION_MASK BIT(0) |
| 51 | #define TCPC_CONFIG_STD_OUTPUT_ORIENTATION_NORMAL 0 |
| 52 | #define TCPC_CONFIG_STD_OUTPUT_ORIENTATION_FLIPPED 1 |
| 53 | |
| 54 | #define TCPC_TCPC_CTRL 0x19 |
| 55 | #define TCPC_TCPC_CTRL_ORIENTATION BIT(0) |
| 56 | #define PLUG_ORNT_CC1 0 |
| 57 | #define PLUG_ORNT_CC2 1 |
| 58 | #define TCPC_TCPC_CTRL_BIST_TM BIT(1) |
| 59 | #define TCPC_TCPC_CTRL_EN_LK4CONN_ALRT BIT(6) |
| 60 | |
| 61 | #define TCPC_EXTENDED_STATUS 0x20 |
| 62 | #define TCPC_EXTENDED_STATUS_VSAFE0V BIT(0) |
| 63 | |
| 64 | #define TCPC_ROLE_CTRL 0x1a |
| 65 | #define TCPC_ROLE_CTRL_DRP BIT(6) |
| 66 | #define TCPC_ROLE_CTRL_RP_VAL GENMASK(5, 4) |
| 67 | #define TCPC_ROLE_CTRL_RP_VAL_DEF 0x0 |
| 68 | #define TCPC_ROLE_CTRL_RP_VAL_1_5 0x1 |
| 69 | #define TCPC_ROLE_CTRL_RP_VAL_3_0 0x2 |
| 70 | #define TCPC_ROLE_CTRL_CC2 GENMASK(3, 2) |
| 71 | #define TCPC_ROLE_CTRL_CC1 GENMASK(1, 0) |
| 72 | #define TCPC_ROLE_CTRL_CC_RA 0x0 |
| 73 | #define TCPC_ROLE_CTRL_CC_RP 0x1 |
| 74 | #define TCPC_ROLE_CTRL_CC_RD 0x2 |
| 75 | #define TCPC_ROLE_CTRL_CC_OPEN 0x3 |
| 76 | |
| 77 | #define TCPC_FAULT_CTRL 0x1b |
| 78 | |
| 79 | #define TCPC_POWER_CTRL 0x1c |
| 80 | #define TCPC_POWER_CTRL_VCONN_ENABLE BIT(0) |
| 81 | #define TCPC_POWER_CTRL_BLEED_DISCHARGE BIT(3) |
| 82 | #define TCPC_POWER_CTRL_AUTO_DISCHARGE BIT(4) |
| 83 | #define TCPC_DIS_VOLT_ALRM BIT(5) |
| 84 | #define TCPC_POWER_CTRL_VBUS_VOLT_MON BIT(6) |
| 85 | #define TCPC_FAST_ROLE_SWAP_EN BIT(7) |
| 86 | |
| 87 | #define TCPC_CC_STATUS 0x1d |
| 88 | #define TCPC_CC_STATUS_TOGGLING BIT(5) |
| 89 | #define TCPC_CC_STATUS_TERM BIT(4) |
| 90 | #define TCPC_CC_STATUS_TERM_RP 0 |
| 91 | #define TCPC_CC_STATUS_TERM_RD 1 |
| 92 | #define TCPC_CC_STATUS_CC2 GENMASK(3, 2) |
| 93 | #define TCPC_CC_STATUS_CC1 GENMASK(1, 0) |
| 94 | #define TCPC_CC_STATE_SRC_OPEN 0 |
| 95 | |
| 96 | #define TCPC_POWER_STATUS 0x1e |
| 97 | #define TCPC_POWER_STATUS_DBG_ACC_CON BIT(7) |
| 98 | #define TCPC_POWER_STATUS_UNINIT BIT(6) |
| 99 | #define TCPC_POWER_STATUS_SOURCING_VBUS BIT(4) |
| 100 | #define TCPC_POWER_STATUS_VBUS_DET BIT(3) |
| 101 | #define TCPC_POWER_STATUS_VBUS_PRES BIT(2) |
| 102 | #define TCPC_POWER_STATUS_VCONN_PRES BIT(1) |
| 103 | #define TCPC_POWER_STATUS_SINKING_VBUS BIT(0) |
| 104 | |
| 105 | #define TCPC_FAULT_STATUS 0x1f |
| 106 | #define TCPC_FAULT_STATUS_ALL_REG_RST_TO_DEFAULT BIT(7) |
| 107 | #define TCPC_FAULT_STATUS_VCONN_OC BIT(1) |
| 108 | |
| 109 | #define TCPC_ALERT_EXTENDED 0x21 |
| 110 | |
| 111 | #define TCPC_COMMAND 0x23 |
| 112 | #define TCPC_CMD_WAKE_I2C 0x11 |
| 113 | #define TCPC_CMD_DISABLE_VBUS_DETECT 0x22 |
| 114 | #define TCPC_CMD_ENABLE_VBUS_DETECT 0x33 |
| 115 | #define TCPC_CMD_DISABLE_SINK_VBUS 0x44 |
| 116 | #define TCPC_CMD_SINK_VBUS 0x55 |
| 117 | #define TCPC_CMD_DISABLE_SRC_VBUS 0x66 |
| 118 | #define TCPC_CMD_SRC_VBUS_DEFAULT 0x77 |
| 119 | #define TCPC_CMD_SRC_VBUS_HIGH 0x88 |
| 120 | #define TCPC_CMD_LOOK4CONNECTION 0x99 |
| 121 | #define TCPC_CMD_RXONEMORE 0xAA |
| 122 | #define TCPC_CMD_I2C_IDLE 0xFF |
| 123 | |
| 124 | #define TCPC_DEV_CAP_1 0x24 |
| 125 | #define TCPC_DEV_CAP_2 0x26 |
| 126 | #define TCPC_STD_INPUT_CAP 0x28 |
| 127 | #define TCPC_STD_OUTPUT_CAP 0x29 |
| 128 | #define TCPC_STD_OUTPUT_CAP_ORIENTATION BIT(0) |
| 129 | |
| 130 | #define TCPC_MSG_HDR_INFO 0x2e |
| 131 | #define TCPC_MSG_HDR_INFO_DATA_ROLE BIT(3) |
| 132 | #define TCPC_MSG_HDR_INFO_REV GENMASK(2, 1) |
| 133 | #define TCPC_MSG_HDR_INFO_PWR_ROLE BIT(0) |
| 134 | |
| 135 | #define TCPC_RX_DETECT 0x2f |
| 136 | #define TCPC_RX_DETECT_HARD_RESET BIT(5) |
| 137 | #define TCPC_RX_DETECT_SOP BIT(0) |
| 138 | #define TCPC_RX_DETECT_SOP1 BIT(1) |
| 139 | #define TCPC_RX_DETECT_SOP2 BIT(2) |
| 140 | #define TCPC_RX_DETECT_DBG1 BIT(3) |
| 141 | #define TCPC_RX_DETECT_DBG2 BIT(4) |
| 142 | |
| 143 | #define TCPC_RX_BYTE_CNT 0x30 |
| 144 | #define TCPC_RX_BUF_FRAME_TYPE 0x31 |
| 145 | #define TCPC_RX_BUF_FRAME_TYPE_SOP 0 |
| 146 | #define TCPC_RX_BUF_FRAME_TYPE_SOP1 1 |
| 147 | #define TCPC_RX_HDR 0x32 |
| 148 | #define TCPC_RX_DATA 0x34 /* through 0x4f */ |
| 149 | |
| 150 | #define TCPC_TRANSMIT 0x50 |
| 151 | #define TCPC_TRANSMIT_RETRY GENMASK(5, 4) |
| 152 | #define TCPC_TRANSMIT_TYPE GENMASK(2, 0) |
| 153 | |
| 154 | #define TCPC_TX_BYTE_CNT 0x51 |
| 155 | #define TCPC_TX_HDR 0x52 |
| 156 | #define TCPC_TX_DATA 0x54 /* through 0x6f */ |
| 157 | |
| 158 | #define TCPC_VBUS_VOLTAGE 0x70 |
| 159 | #define TCPC_VBUS_VOLTAGE_MASK 0x3ff |
| 160 | #define TCPC_VBUS_VOLTAGE_LSB_MV 25 |
| 161 | #define TCPC_VBUS_SINK_DISCONNECT_THRESH 0x72 |
| 162 | #define TCPC_VBUS_SINK_DISCONNECT_THRESH_LSB_MV 25 |
| 163 | #define TCPC_VBUS_SINK_DISCONNECT_THRESH_MAX 0x3ff |
| 164 | #define TCPC_VBUS_STOP_DISCHARGE_THRESH 0x74 |
| 165 | #define TCPC_VBUS_VOLTAGE_ALARM_HI_CFG 0x76 |
| 166 | #define TCPC_VBUS_VOLTAGE_ALARM_LO_CFG 0x78 |
| 167 | |
| 168 | /* I2C_WRITE_BYTE_COUNT + 1 when TX_BUF_BYTE_x is only accessible I2C_WRITE_BYTE_COUNT */ |
| 169 | #define TCPC_TRANSMIT_BUFFER_MAX_LEN 31 |
| 170 | |
| 171 | #define tcpc_presenting_rd(reg, cc) \ |
| 172 | (!(TCPC_ROLE_CTRL_DRP & (reg)) && \ |
| 173 | FIELD_GET(TCPC_ROLE_CTRL_## cc, reg) == TCPC_ROLE_CTRL_CC_RD) |
| 174 | |
| 175 | struct tcpci; |
| 176 | |
| 177 | /* |
| 178 | * @TX_BUF_BYTE_x_hidden: |
| 179 | * optional; Set when TX_BUF_BYTE_x can only be accessed through I2C_WRITE_BYTE_COUNT. |
| 180 | * @frs_sourcing_vbus: |
| 181 | * Optional; Callback to perform chip specific operations when FRS |
| 182 | * is sourcing vbus. |
| 183 | * @auto_discharge_disconnect: |
| 184 | * Optional; Enables TCPC to autonomously discharge vbus on disconnect. |
| 185 | * @vbus_vsafe0v: |
| 186 | * optional; Set when TCPC can detect whether vbus is at VSAFE0V. |
| 187 | * @set_partner_usb_comm_capable: |
| 188 | * Optional; The USB Communications Capable bit indicates if port |
| 189 | * partner is capable of communication over the USB data lines |
| 190 | * (e.g. D+/- or SS Tx/Rx). Called to notify the status of the bit. |
| 191 | * @check_contaminant: |
| 192 | * Optional; The callback is invoked when chiplevel drivers indicated |
| 193 | * that the USB port needs to be checked for contaminant presence. |
| 194 | * Chip level drivers are expected to check for contaminant and call |
| 195 | * tcpm_clean_port when the port is clean to put the port back into |
| 196 | * toggling state. |
| 197 | * @cable_comm_capable |
| 198 | * optional; Set when TCPC can communicate with cable plugs over SOP' |
| 199 | * @attempt_vconn_swap_discovery: |
| 200 | * Optional; The callback is called by the TCPM when the result of |
| 201 | * a Discover Identity request indicates that the port partner is |
| 202 | * a receptacle capable of modal operation. Chip level TCPCI drivers |
| 203 | * can implement their own policy to determine if and when a Vconn |
| 204 | * swap following Discover Identity on SOP' occurs. |
| 205 | * Return true when the TCPM is allowed to request a Vconn swap |
| 206 | * after Discovery Identity on SOP. |
| 207 | * @set_orientation: |
| 208 | * Optional; Enable setting the connector orientation |
| 209 | * CONFIG_STANDARD_OUTPUT (0x18) bit0. |
| 210 | */ |
| 211 | struct tcpci_data { |
| 212 | struct regmap *regmap; |
| 213 | unsigned char TX_BUF_BYTE_x_hidden:1; |
| 214 | unsigned char auto_discharge_disconnect:1; |
| 215 | unsigned char vbus_vsafe0v:1; |
| 216 | unsigned char cable_comm_capable:1; |
| 217 | unsigned char set_orientation:1; |
| 218 | |
| 219 | int (*init)(struct tcpci *tcpci, struct tcpci_data *data); |
| 220 | int (*set_vconn)(struct tcpci *tcpci, struct tcpci_data *data, |
| 221 | bool enable); |
| 222 | int (*start_drp_toggling)(struct tcpci *tcpci, struct tcpci_data *data, |
| 223 | enum typec_cc_status cc); |
| 224 | int (*set_vbus)(struct tcpci *tcpci, struct tcpci_data *data, bool source, bool sink); |
| 225 | void (*frs_sourcing_vbus)(struct tcpci *tcpci, struct tcpci_data *data); |
| 226 | void (*set_partner_usb_comm_capable)(struct tcpci *tcpci, struct tcpci_data *data, |
| 227 | bool capable); |
| 228 | void (*check_contaminant)(struct tcpci *tcpci, struct tcpci_data *data); |
| 229 | bool (*attempt_vconn_swap_discovery)(struct tcpci *tcpci, struct tcpci_data *data); |
| 230 | }; |
| 231 | |
| 232 | struct tcpci *tcpci_register_port(struct device *dev, struct tcpci_data *data); |
| 233 | void tcpci_unregister_port(struct tcpci *tcpci); |
| 234 | irqreturn_t tcpci_irq(struct tcpci *tcpci); |
| 235 | |
| 236 | struct tcpm_port; |
| 237 | struct tcpm_port *tcpci_get_tcpm_port(struct tcpci *tcpci); |
| 238 | |
| 239 | static inline enum typec_cc_status tcpci_to_typec_cc(unsigned int cc, bool sink) |
| 240 | { |
| 241 | switch (cc) { |
| 242 | case 0x1: |
| 243 | return sink ? TYPEC_CC_RP_DEF : TYPEC_CC_RA; |
| 244 | case 0x2: |
| 245 | return sink ? TYPEC_CC_RP_1_5 : TYPEC_CC_RD; |
| 246 | case 0x3: |
| 247 | if (sink) |
| 248 | return TYPEC_CC_RP_3_0; |
| 249 | fallthrough; |
| 250 | case TCPC_CC_STATE_SRC_OPEN: |
| 251 | default: |
| 252 | return TYPEC_CC_OPEN; |
| 253 | } |
| 254 | } |
| 255 | #endif /* __LINUX_USB_TCPCI_H */ |
| 256 | |