| 1 | /* SPDX-License-Identifier: GPL-2.0 */ |
| 2 | /* |
| 3 | * Copyright (c) 2017-2018, The Linux Foundation. All rights reserved. |
| 4 | * |
| 5 | */ |
| 6 | |
| 7 | #include <linux/platform_device.h> |
| 8 | #ifndef __LLCC_QCOM__ |
| 9 | #define __LLCC_QCOM__ |
| 10 | |
| 11 | #define LLCC_CPUSS 1 |
| 12 | #define LLCC_VIDSC0 2 |
| 13 | #define LLCC_VIDSC1 3 |
| 14 | #define LLCC_ROTATOR 4 |
| 15 | #define LLCC_VOICE 5 |
| 16 | #define LLCC_AUDIO 6 |
| 17 | #define LLCC_MDMHPGRW 7 |
| 18 | #define LLCC_MDM 8 |
| 19 | #define LLCC_MODHW 9 |
| 20 | #define LLCC_CMPT 10 |
| 21 | #define LLCC_GPUHTW 11 |
| 22 | #define LLCC_GPU 12 |
| 23 | #define LLCC_MMUHWT 13 |
| 24 | #define LLCC_CMPTDMA 15 |
| 25 | #define LLCC_DISP 16 |
| 26 | #define LLCC_VIDFW 17 |
| 27 | #define LLCC_CAMFW 18 |
| 28 | #define LLCC_MDMHPFX 20 |
| 29 | #define LLCC_MDMPNG 21 |
| 30 | #define LLCC_AUDHW 22 |
| 31 | #define LLCC_NPU 23 |
| 32 | #define LLCC_WLHW 24 |
| 33 | #define LLCC_PIMEM 25 |
| 34 | #define LLCC_ECC 26 |
| 35 | #define LLCC_CVP 28 |
| 36 | #define LLCC_MODPE 29 |
| 37 | #define LLCC_APTCM 30 |
| 38 | #define LLCC_WRCACHE 31 |
| 39 | #define LLCC_CVPFW 32 |
| 40 | #define LLCC_CPUSS1 33 |
| 41 | #define LLCC_CAMEXP0 34 |
| 42 | #define LLCC_CPUMTE 35 |
| 43 | #define LLCC_CPUHWT 36 |
| 44 | #define LLCC_MDMCLAD2 37 |
| 45 | #define LLCC_CAMEXP1 38 |
| 46 | #define LLCC_CMPTHCP 39 |
| 47 | #define LLCC_LCPDARE 40 |
| 48 | #define LLCC_AENPU 45 |
| 49 | #define LLCC_ISLAND1 46 |
| 50 | #define LLCC_ISLAND2 47 |
| 51 | #define LLCC_ISLAND3 48 |
| 52 | #define LLCC_ISLAND4 49 |
| 53 | #define LLCC_CAMEXP2 50 |
| 54 | #define LLCC_CAMEXP3 51 |
| 55 | #define LLCC_CAMEXP4 52 |
| 56 | #define LLCC_DISP_WB 53 |
| 57 | #define LLCC_DISP_1 54 |
| 58 | #define LLCC_VIEYE 57 |
| 59 | #define LLCC_VIDPTH 58 |
| 60 | #define LLCC_GPUMV 59 |
| 61 | #define LLCC_EVA_LEFT 60 |
| 62 | #define LLCC_EVA_RIGHT 61 |
| 63 | #define LLCC_EVAGAIN 62 |
| 64 | #define LLCC_VIPTH 63 |
| 65 | #define LLCC_VIDVSP 64 |
| 66 | #define LLCC_DISP_LEFT 65 |
| 67 | #define LLCC_DISP_RIGHT 66 |
| 68 | #define LLCC_EVCS_LEFT 67 |
| 69 | #define LLCC_EVCS_RIGHT 68 |
| 70 | #define LLCC_SPAD 69 |
| 71 | #define LLCC_VIDDEC 70 |
| 72 | #define LLCC_CAMOFE 71 |
| 73 | #define LLCC_CAMRTIP 72 |
| 74 | #define LLCC_CAMSRTIP 73 |
| 75 | #define LLCC_CAMRTRF 74 |
| 76 | #define LLCC_CAMSRTRF 75 |
| 77 | #define LLCC_VIDEO_APV 83 |
| 78 | #define LLCC_COMPUTE1 87 |
| 79 | #define LLCC_CPUSS_OPP 88 |
| 80 | #define LLCC_CPUSSMPAM 89 |
| 81 | #define LLCC_CAM_IPE_STROV 92 |
| 82 | #define LLCC_CAM_OFE_STROV 93 |
| 83 | #define LLCC_CPUSS_HEU 94 |
| 84 | #define LLCC_MDM_PNG_FIXED 100 |
| 85 | |
| 86 | /** |
| 87 | * struct llcc_slice_desc - Cache slice descriptor |
| 88 | * @slice_id: llcc slice id |
| 89 | * @slice_size: Size allocated for the llcc slice |
| 90 | */ |
| 91 | struct llcc_slice_desc { |
| 92 | u32 slice_id; |
| 93 | size_t slice_size; |
| 94 | }; |
| 95 | |
| 96 | /** |
| 97 | * struct llcc_edac_reg_data - llcc edac registers data for each error type |
| 98 | * @name: Name of the error |
| 99 | * @reg_cnt: Number of registers |
| 100 | * @count_mask: Mask value to get the error count |
| 101 | * @ways_mask: Mask value to get the error ways |
| 102 | * @count_shift: Shift value to get the error count |
| 103 | * @ways_shift: Shift value to get the error ways |
| 104 | */ |
| 105 | struct llcc_edac_reg_data { |
| 106 | char *name; |
| 107 | u32 reg_cnt; |
| 108 | u32 count_mask; |
| 109 | u32 ways_mask; |
| 110 | u8 count_shift; |
| 111 | u8 ways_shift; |
| 112 | }; |
| 113 | |
| 114 | struct llcc_edac_reg_offset { |
| 115 | /* LLCC TRP registers */ |
| 116 | u32 trp_ecc_error_status0; |
| 117 | u32 trp_ecc_error_status1; |
| 118 | u32 trp_ecc_sb_err_syn0; |
| 119 | u32 trp_ecc_db_err_syn0; |
| 120 | u32 trp_ecc_error_cntr_clear; |
| 121 | u32 trp_interrupt_0_status; |
| 122 | u32 trp_interrupt_0_clear; |
| 123 | u32 trp_interrupt_0_enable; |
| 124 | |
| 125 | /* LLCC Common registers */ |
| 126 | u32 cmn_status0; |
| 127 | u32 cmn_interrupt_0_enable; |
| 128 | u32 cmn_interrupt_2_enable; |
| 129 | |
| 130 | /* LLCC DRP registers */ |
| 131 | u32 drp_ecc_error_cfg; |
| 132 | u32 drp_ecc_error_cntr_clear; |
| 133 | u32 drp_interrupt_status; |
| 134 | u32 drp_interrupt_clear; |
| 135 | u32 drp_interrupt_enable; |
| 136 | u32 drp_ecc_error_status0; |
| 137 | u32 drp_ecc_error_status1; |
| 138 | u32 drp_ecc_sb_err_syn0; |
| 139 | u32 drp_ecc_db_err_syn0; |
| 140 | }; |
| 141 | |
| 142 | /** |
| 143 | * struct llcc_drv_data - Data associated with the llcc driver |
| 144 | * @regmaps: regmaps associated with the llcc device |
| 145 | * @bcast_regmap: regmap associated with llcc broadcast OR offset |
| 146 | * @bcast_and_regmap: regmap associated with llcc broadcast AND offset |
| 147 | * @cfg: pointer to the data structure for slice configuration |
| 148 | * @edac_reg_offset: Offset of the LLCC EDAC registers |
| 149 | * @lock: mutex associated with each slice |
| 150 | * @cfg_size: size of the config data table |
| 151 | * @max_slices: max slices as read from device tree |
| 152 | * @num_banks: Number of llcc banks |
| 153 | * @bitmap: Bit map to track the active slice ids |
| 154 | * @ecc_irq: interrupt for llcc cache error detection and reporting |
| 155 | * @ecc_irq_configured: 'True' if firmware has already configured the irq propagation |
| 156 | * @version: Indicates the LLCC version |
| 157 | */ |
| 158 | struct llcc_drv_data { |
| 159 | struct regmap **regmaps; |
| 160 | struct regmap *bcast_regmap; |
| 161 | struct regmap *bcast_and_regmap; |
| 162 | const struct llcc_slice_config *cfg; |
| 163 | const struct llcc_edac_reg_offset *edac_reg_offset; |
| 164 | struct mutex lock; |
| 165 | u32 cfg_size; |
| 166 | u32 max_slices; |
| 167 | u32 num_banks; |
| 168 | unsigned long *bitmap; |
| 169 | int ecc_irq; |
| 170 | bool ecc_irq_configured; |
| 171 | u32 version; |
| 172 | }; |
| 173 | |
| 174 | #if IS_ENABLED(CONFIG_QCOM_LLCC) |
| 175 | /** |
| 176 | * llcc_slice_getd - get llcc slice descriptor |
| 177 | * @uid: usecase_id of the client |
| 178 | */ |
| 179 | struct llcc_slice_desc *llcc_slice_getd(u32 uid); |
| 180 | |
| 181 | /** |
| 182 | * llcc_slice_putd - llcc slice descritpor |
| 183 | * @desc: Pointer to llcc slice descriptor |
| 184 | */ |
| 185 | void llcc_slice_putd(struct llcc_slice_desc *desc); |
| 186 | |
| 187 | /** |
| 188 | * llcc_get_slice_id - get slice id |
| 189 | * @desc: Pointer to llcc slice descriptor |
| 190 | */ |
| 191 | int llcc_get_slice_id(struct llcc_slice_desc *desc); |
| 192 | |
| 193 | /** |
| 194 | * llcc_get_slice_size - llcc slice size |
| 195 | * @desc: Pointer to llcc slice descriptor |
| 196 | */ |
| 197 | size_t llcc_get_slice_size(struct llcc_slice_desc *desc); |
| 198 | |
| 199 | /** |
| 200 | * llcc_slice_activate - Activate the llcc slice |
| 201 | * @desc: Pointer to llcc slice descriptor |
| 202 | */ |
| 203 | int llcc_slice_activate(struct llcc_slice_desc *desc); |
| 204 | |
| 205 | /** |
| 206 | * llcc_slice_deactivate - Deactivate the llcc slice |
| 207 | * @desc: Pointer to llcc slice descriptor |
| 208 | */ |
| 209 | int llcc_slice_deactivate(struct llcc_slice_desc *desc); |
| 210 | |
| 211 | #else |
| 212 | static inline struct llcc_slice_desc *llcc_slice_getd(u32 uid) |
| 213 | { |
| 214 | return NULL; |
| 215 | } |
| 216 | |
| 217 | static inline void llcc_slice_putd(struct llcc_slice_desc *desc) |
| 218 | { |
| 219 | |
| 220 | }; |
| 221 | |
| 222 | static inline int llcc_get_slice_id(struct llcc_slice_desc *desc) |
| 223 | { |
| 224 | return -EINVAL; |
| 225 | } |
| 226 | |
| 227 | static inline size_t llcc_get_slice_size(struct llcc_slice_desc *desc) |
| 228 | { |
| 229 | return 0; |
| 230 | } |
| 231 | static inline int llcc_slice_activate(struct llcc_slice_desc *desc) |
| 232 | { |
| 233 | return -EINVAL; |
| 234 | } |
| 235 | |
| 236 | static inline int llcc_slice_deactivate(struct llcc_slice_desc *desc) |
| 237 | { |
| 238 | return -EINVAL; |
| 239 | } |
| 240 | #endif |
| 241 | |
| 242 | #endif |
| 243 | |