1/* SPDX-License-Identifier: GPL-2.0-only */
2/*
3 * Definitions for TI EMIF device platform data
4 *
5 * Copyright (C) 2012 Texas Instruments, Inc.
6 *
7 * Aneesh V <aneesh@ti.com>
8 */
9#ifndef __EMIF_PLAT_H
10#define __EMIF_PLAT_H
11
12/* Low power modes - EMIF_PWR_MGMT_CTRL */
13#define EMIF_LP_MODE_DISABLE 0
14#define EMIF_LP_MODE_CLOCK_STOP 1
15#define EMIF_LP_MODE_SELF_REFRESH 2
16#define EMIF_LP_MODE_PWR_DN 4
17
18/* Hardware capabilities */
19#define EMIF_HW_CAPS_LL_INTERFACE 0x00000001
20
21/*
22 * EMIF IP Revisions
23 * EMIF4D - Used in OMAP4
24 * EMIF4D5 - Used in OMAP5
25 */
26#define EMIF_4D 1
27#define EMIF_4D5 2
28
29/*
30 * PHY types
31 * ATTILAPHY - Used in OMAP4
32 * INTELLIPHY - Used in OMAP5
33 */
34#define EMIF_PHY_TYPE_ATTILAPHY 1
35#define EMIF_PHY_TYPE_INTELLIPHY 2
36
37/* Custom config requests */
38#define EMIF_CUSTOM_CONFIG_LPMODE 0x00000001
39#define EMIF_CUSTOM_CONFIG_TEMP_ALERT_POLL_INTERVAL 0x00000002
40#define EMIF_CUSTOM_CONFIG_EXTENDED_TEMP_PART 0x00000004
41
42#ifndef __ASSEMBLY__
43/**
44 * struct ddr_device_info - All information about the DDR device except AC
45 * timing parameters
46 * @type: Device type (LPDDR2-S4, LPDDR2-S2 etc)
47 * @density: Device density
48 * @io_width: Bus width
49 * @cs1_used: Whether there is a DDR device attached to the second
50 * chip-select(CS1) of this EMIF instance
51 * @cal_resistors_per_cs: Whether there is one calibration resistor per
52 * chip-select or whether it's a single one for both
53 * @manufacturer: Manufacturer name string
54 */
55struct ddr_device_info {
56 u32 type;
57 u32 density;
58 u32 io_width;
59 u32 cs1_used;
60 u32 cal_resistors_per_cs;
61 char manufacturer[10];
62};
63
64/**
65 * struct emif_custom_configs - Custom configuration parameters/policies
66 * passed from the platform layer
67 * @mask: Mask to indicate which configs are requested
68 * @lpmode: LPMODE to be used in PWR_MGMT_CTRL register
69 * @lpmode_timeout_performance: Timeout before LPMODE entry when higher
70 * performance is desired at the cost of power (typically
71 * at higher OPPs)
72 * @lpmode_timeout_power: Timeout before LPMODE entry when better power
73 * savings is desired and performance is not important
74 * (typically at lower loads indicated by lower OPPs)
75 * @lpmode_freq_threshold: The DDR frequency threshold to identify between
76 * the above two cases:
77 * timeout = (freq >= lpmode_freq_threshold) ?
78 * lpmode_timeout_performance :
79 * lpmode_timeout_power;
80 * @temp_alert_poll_interval_ms: LPDDR2 MR4 polling interval at nominal
81 * temperature(in milliseconds). When temperature is high
82 * polling is done 4 times as frequently.
83 */
84struct emif_custom_configs {
85 u32 mask;
86 u32 lpmode;
87 u32 lpmode_timeout_performance;
88 u32 lpmode_timeout_power;
89 u32 lpmode_freq_threshold;
90 u32 temp_alert_poll_interval_ms;
91};
92
93/**
94 * struct emif_platform_data - Platform data passed on EMIF platform
95 * device creation. Used by the driver.
96 * @hw_caps: Hw capabilities of the EMIF IP in the respective SoC
97 * @device_info: Device info structure containing information such
98 * as type, bus width, density etc
99 * @timings: Timings information from device datasheet passed
100 * as an array of 'struct lpddr2_timings'. Can be NULL
101 * if if default timings are ok
102 * @timings_arr_size: Size of the timings array. Depends on the number
103 * of different frequencies for which timings data
104 * is provided
105 * @min_tck: Minimum value of some timing parameters in terms
106 * of number of cycles. Can be NULL if default values
107 * are ok
108 * @custom_configs: Custom configurations requested by SoC or board
109 * code and the data for them. Can be NULL if default
110 * configurations done by the driver are ok. See
111 * documentation for 'struct emif_custom_configs' for
112 * more details
113 */
114struct emif_platform_data {
115 u32 hw_caps;
116 struct ddr_device_info *device_info;
117 const struct lpddr2_timings *timings;
118 u32 timings_arr_size;
119 const struct lpddr2_min_tck *min_tck;
120 struct emif_custom_configs *custom_configs;
121 u32 ip_rev;
122 u32 phy_type;
123};
124#endif /* __ASSEMBLY__ */
125
126#endif /* __LINUX_EMIF_H */
127

source code of linux/include/linux/platform_data/emif_plat.h