| 1 | /* SPDX-License-Identifier: GPL-2.0-or-later */ |
|---|
| 2 | /* |
|---|
| 3 | * Copyright (C) 2023-2024, Advanced Micro Devices, Inc. |
|---|
| 4 | */ |
|---|
| 5 | |
|---|
| 6 | #ifndef _PLATDATA_AMD_QDMA_H |
|---|
| 7 | #define _PLATDATA_AMD_QDMA_H |
|---|
| 8 | |
|---|
| 9 | #include <linux/dmaengine.h> |
|---|
| 10 | |
|---|
| 11 | /** |
|---|
| 12 | * struct qdma_queue_info - DMA queue information. This information is used to |
|---|
| 13 | * match queue when DMA channel is requested |
|---|
| 14 | * @dir: Channel transfer direction |
|---|
| 15 | */ |
|---|
| 16 | struct qdma_queue_info { |
|---|
| 17 | enum dma_transfer_direction dir; |
|---|
| 18 | }; |
|---|
| 19 | |
|---|
| 20 | #define QDMA_FILTER_PARAM(qinfo) ((void *)(qinfo)) |
|---|
| 21 | |
|---|
| 22 | struct dma_slave_map; |
|---|
| 23 | |
|---|
| 24 | /** |
|---|
| 25 | * struct qdma_platdata - Platform specific data for QDMA engine |
|---|
| 26 | * @max_mm_channels: Maximum number of MM DMA channels in each direction |
|---|
| 27 | * @device_map: DMA slave map |
|---|
| 28 | * @irq_index: The index of first IRQ |
|---|
| 29 | * @dma_dev: The device pointer for dma operations |
|---|
| 30 | */ |
|---|
| 31 | struct qdma_platdata { |
|---|
| 32 | u32 max_mm_channels; |
|---|
| 33 | u32 irq_index; |
|---|
| 34 | struct dma_slave_map *device_map; |
|---|
| 35 | struct device *dma_dev; |
|---|
| 36 | }; |
|---|
| 37 | |
|---|
| 38 | #endif /* _PLATDATA_AMD_QDMA_H */ |
|---|
| 39 | |
|---|
