1/* SPDX-License-Identifier: GPL-2.0 */
2/* Copyright(c) 2023 Advanced Micro Devices, Inc */
3
4#ifndef _PDS_CORE_ADMINQ_H_
5#define _PDS_CORE_ADMINQ_H_
6
7#define PDSC_ADMINQ_MAX_POLL_INTERVAL 256000 /* usecs */
8
9enum pds_core_adminq_flags {
10 PDS_AQ_FLAG_FASTPOLL = BIT(1), /* completion poll at 1ms */
11};
12
13/*
14 * enum pds_core_adminq_opcode - AdminQ command opcodes
15 * These commands are only processed on AdminQ, not available in devcmd
16 */
17enum pds_core_adminq_opcode {
18 PDS_AQ_CMD_NOP = 0,
19
20 /* Client control */
21 PDS_AQ_CMD_CLIENT_REG = 6,
22 PDS_AQ_CMD_CLIENT_UNREG = 7,
23 PDS_AQ_CMD_CLIENT_CMD = 8,
24
25 /* LIF commands */
26 PDS_AQ_CMD_LIF_IDENTIFY = 20,
27 PDS_AQ_CMD_LIF_INIT = 21,
28 PDS_AQ_CMD_LIF_RESET = 22,
29 PDS_AQ_CMD_LIF_GETATTR = 23,
30 PDS_AQ_CMD_LIF_SETATTR = 24,
31 PDS_AQ_CMD_LIF_SETPHC = 25,
32
33 PDS_AQ_CMD_RX_MODE_SET = 30,
34 PDS_AQ_CMD_RX_FILTER_ADD = 31,
35 PDS_AQ_CMD_RX_FILTER_DEL = 32,
36
37 /* Queue commands */
38 PDS_AQ_CMD_Q_IDENTIFY = 39,
39 PDS_AQ_CMD_Q_INIT = 40,
40 PDS_AQ_CMD_Q_CONTROL = 41,
41
42 /* SR/IOV commands */
43 PDS_AQ_CMD_VF_GETATTR = 60,
44 PDS_AQ_CMD_VF_SETATTR = 61,
45};
46
47/*
48 * enum pds_core_notifyq_opcode - NotifyQ event codes
49 */
50enum pds_core_notifyq_opcode {
51 PDS_EVENT_LINK_CHANGE = 1,
52 PDS_EVENT_RESET = 2,
53 PDS_EVENT_XCVR = 5,
54 PDS_EVENT_CLIENT = 6,
55};
56
57#define PDS_COMP_COLOR_MASK 0x80
58
59/**
60 * struct pds_core_notifyq_event - Generic event reporting structure
61 * @eid: event number
62 * @ecode: event code
63 *
64 * This is the generic event report struct from which the other
65 * actual events will be formed.
66 */
67struct pds_core_notifyq_event {
68 __le64 eid;
69 __le16 ecode;
70};
71
72/**
73 * struct pds_core_link_change_event - Link change event notification
74 * @eid: event number
75 * @ecode: event code = PDS_EVENT_LINK_CHANGE
76 * @link_status: link up/down, with error bits
77 * @link_speed: speed of the network link
78 *
79 * Sent when the network link state changes between UP and DOWN
80 */
81struct pds_core_link_change_event {
82 __le64 eid;
83 __le16 ecode;
84 __le16 link_status;
85 __le32 link_speed; /* units of 1Mbps: e.g. 10000 = 10Gbps */
86};
87
88/**
89 * struct pds_core_reset_event - Reset event notification
90 * @eid: event number
91 * @ecode: event code = PDS_EVENT_RESET
92 * @reset_code: reset type
93 * @state: 0=pending, 1=complete, 2=error
94 *
95 * Sent when the NIC or some subsystem is going to be or
96 * has been reset.
97 */
98struct pds_core_reset_event {
99 __le64 eid;
100 __le16 ecode;
101 u8 reset_code;
102 u8 state;
103};
104
105/**
106 * struct pds_core_client_event - Client event notification
107 * @eid: event number
108 * @ecode: event code = PDS_EVENT_CLIENT
109 * @client_id: client to sent event to
110 * @client_event: wrapped event struct for the client
111 *
112 * Sent when an event needs to be passed on to a client
113 */
114struct pds_core_client_event {
115 __le64 eid;
116 __le16 ecode;
117 __le16 client_id;
118 u8 client_event[54];
119};
120
121/**
122 * struct pds_core_notifyq_cmd - Placeholder for building qcq
123 * @data: anonymous field for building the qcq
124 */
125struct pds_core_notifyq_cmd {
126 __le32 data; /* Not used but needed for qcq structure */
127};
128
129/*
130 * union pds_core_notifyq_comp - Overlay of notifyq event structures
131 */
132union pds_core_notifyq_comp {
133 struct {
134 __le64 eid;
135 __le16 ecode;
136 };
137 struct pds_core_notifyq_event event;
138 struct pds_core_link_change_event link_change;
139 struct pds_core_reset_event reset;
140 u8 data[64];
141};
142
143#define PDS_DEVNAME_LEN 32
144/**
145 * struct pds_core_client_reg_cmd - Register a new client with DSC
146 * @opcode: opcode PDS_AQ_CMD_CLIENT_REG
147 * @rsvd: word boundary padding
148 * @devname: text name of client device
149 * @vif_type: what type of device (enum pds_core_vif_types)
150 *
151 * Tell the DSC of the new client, and receive a client_id from DSC.
152 */
153struct pds_core_client_reg_cmd {
154 u8 opcode;
155 u8 rsvd[3];
156 char devname[PDS_DEVNAME_LEN];
157 u8 vif_type;
158};
159
160/**
161 * struct pds_core_client_reg_comp - Client registration completion
162 * @status: Status of the command (enum pdc_core_status_code)
163 * @rsvd: Word boundary padding
164 * @comp_index: Index in the descriptor ring for which this is the completion
165 * @client_id: New id assigned by DSC
166 * @rsvd1: Word boundary padding
167 * @color: Color bit
168 */
169struct pds_core_client_reg_comp {
170 u8 status;
171 u8 rsvd;
172 __le16 comp_index;
173 __le16 client_id;
174 u8 rsvd1[9];
175 u8 color;
176};
177
178/**
179 * struct pds_core_client_unreg_cmd - Unregister a client from DSC
180 * @opcode: opcode PDS_AQ_CMD_CLIENT_UNREG
181 * @rsvd: word boundary padding
182 * @client_id: id of client being removed
183 *
184 * Tell the DSC this client is going away and remove its context
185 * This uses the generic completion.
186 */
187struct pds_core_client_unreg_cmd {
188 u8 opcode;
189 u8 rsvd;
190 __le16 client_id;
191};
192
193/**
194 * struct pds_core_client_request_cmd - Pass along a wrapped client AdminQ cmd
195 * @opcode: opcode PDS_AQ_CMD_CLIENT_CMD
196 * @rsvd: word boundary padding
197 * @client_id: id of client being removed
198 * @client_cmd: the wrapped client command
199 *
200 * Proxy post an adminq command for the client.
201 * This uses the generic completion.
202 */
203struct pds_core_client_request_cmd {
204 u8 opcode;
205 u8 rsvd;
206 __le16 client_id;
207 u8 client_cmd[60];
208};
209
210#define PDS_CORE_MAX_FRAGS 16
211
212#define PDS_CORE_QCQ_F_INITED BIT(0)
213#define PDS_CORE_QCQ_F_SG BIT(1)
214#define PDS_CORE_QCQ_F_INTR BIT(2)
215#define PDS_CORE_QCQ_F_TX_STATS BIT(3)
216#define PDS_CORE_QCQ_F_RX_STATS BIT(4)
217#define PDS_CORE_QCQ_F_NOTIFYQ BIT(5)
218#define PDS_CORE_QCQ_F_CMB_RINGS BIT(6)
219#define PDS_CORE_QCQ_F_CORE BIT(7)
220
221enum pds_core_lif_type {
222 PDS_CORE_LIF_TYPE_DEFAULT = 0,
223};
224
225#define PDS_CORE_IFNAMSIZ 16
226
227/**
228 * enum pds_core_logical_qtype - Logical Queue Types
229 * @PDS_CORE_QTYPE_ADMINQ: Administrative Queue
230 * @PDS_CORE_QTYPE_NOTIFYQ: Notify Queue
231 * @PDS_CORE_QTYPE_RXQ: Receive Queue
232 * @PDS_CORE_QTYPE_TXQ: Transmit Queue
233 * @PDS_CORE_QTYPE_EQ: Event Queue
234 * @PDS_CORE_QTYPE_MAX: Max queue type supported
235 */
236enum pds_core_logical_qtype {
237 PDS_CORE_QTYPE_ADMINQ = 0,
238 PDS_CORE_QTYPE_NOTIFYQ = 1,
239 PDS_CORE_QTYPE_RXQ = 2,
240 PDS_CORE_QTYPE_TXQ = 3,
241 PDS_CORE_QTYPE_EQ = 4,
242
243 PDS_CORE_QTYPE_MAX = 16 /* don't change - used in struct size */
244};
245
246/**
247 * union pds_core_lif_config - LIF configuration
248 * @state: LIF state (enum pds_core_lif_state)
249 * @rsvd: Word boundary padding
250 * @name: LIF name
251 * @rsvd2: Word boundary padding
252 * @features: LIF features active (enum pds_core_hw_features)
253 * @queue_count: Queue counts per queue-type
254 * @words: Full union buffer size
255 */
256union pds_core_lif_config {
257 struct {
258 u8 state;
259 u8 rsvd[3];
260 char name[PDS_CORE_IFNAMSIZ];
261 u8 rsvd2[12];
262 __le64 features;
263 __le32 queue_count[PDS_CORE_QTYPE_MAX];
264 } __packed;
265 __le32 words[64];
266};
267
268/**
269 * struct pds_core_lif_status - LIF status register
270 * @eid: most recent NotifyQ event id
271 * @rsvd: full struct size
272 */
273struct pds_core_lif_status {
274 __le64 eid;
275 u8 rsvd[56];
276};
277
278/**
279 * struct pds_core_lif_info - LIF info structure
280 * @config: LIF configuration structure
281 * @status: LIF status structure
282 */
283struct pds_core_lif_info {
284 union pds_core_lif_config config;
285 struct pds_core_lif_status status;
286};
287
288/**
289 * struct pds_core_lif_identity - LIF identity information (type-specific)
290 * @features: LIF features (see enum pds_core_hw_features)
291 * @version: Identify structure version
292 * @hw_index: LIF hardware index
293 * @rsvd: Word boundary padding
294 * @max_nb_sessions: Maximum number of sessions supported
295 * @rsvd2: buffer padding
296 * @config: LIF config struct with features, q counts
297 */
298struct pds_core_lif_identity {
299 __le64 features;
300 u8 version;
301 u8 hw_index;
302 u8 rsvd[2];
303 __le32 max_nb_sessions;
304 u8 rsvd2[120];
305 union pds_core_lif_config config;
306};
307
308/**
309 * struct pds_core_lif_identify_cmd - Get LIF identity info command
310 * @opcode: Opcode PDS_AQ_CMD_LIF_IDENTIFY
311 * @type: LIF type (enum pds_core_lif_type)
312 * @client_id: Client identifier
313 * @ver: Version of identify returned by device
314 * @rsvd: Word boundary padding
315 * @ident_pa: DMA address to receive identity info
316 *
317 * Firmware will copy LIF identity data (struct pds_core_lif_identity)
318 * into the buffer address given.
319 */
320struct pds_core_lif_identify_cmd {
321 u8 opcode;
322 u8 type;
323 __le16 client_id;
324 u8 ver;
325 u8 rsvd[3];
326 __le64 ident_pa;
327};
328
329/**
330 * struct pds_core_lif_identify_comp - LIF identify command completion
331 * @status: Status of the command (enum pds_core_status_code)
332 * @ver: Version of identify returned by device
333 * @bytes: Bytes copied into the buffer
334 * @rsvd: Word boundary padding
335 * @color: Color bit
336 */
337struct pds_core_lif_identify_comp {
338 u8 status;
339 u8 ver;
340 __le16 bytes;
341 u8 rsvd[11];
342 u8 color;
343};
344
345/**
346 * struct pds_core_lif_init_cmd - LIF init command
347 * @opcode: Opcode PDS_AQ_CMD_LIF_INIT
348 * @type: LIF type (enum pds_core_lif_type)
349 * @client_id: Client identifier
350 * @rsvd: Word boundary padding
351 * @info_pa: Destination address for LIF info (struct pds_core_lif_info)
352 */
353struct pds_core_lif_init_cmd {
354 u8 opcode;
355 u8 type;
356 __le16 client_id;
357 __le32 rsvd;
358 __le64 info_pa;
359};
360
361/**
362 * struct pds_core_lif_init_comp - LIF init command completion
363 * @status: Status of the command (enum pds_core_status_code)
364 * @rsvd: Word boundary padding
365 * @hw_index: Hardware index of the initialized LIF
366 * @rsvd1: Word boundary padding
367 * @color: Color bit
368 */
369struct pds_core_lif_init_comp {
370 u8 status;
371 u8 rsvd;
372 __le16 hw_index;
373 u8 rsvd1[11];
374 u8 color;
375};
376
377/**
378 * struct pds_core_lif_reset_cmd - LIF reset command
379 * Will reset only the specified LIF.
380 * @opcode: Opcode PDS_AQ_CMD_LIF_RESET
381 * @rsvd: Word boundary padding
382 * @client_id: Client identifier
383 */
384struct pds_core_lif_reset_cmd {
385 u8 opcode;
386 u8 rsvd;
387 __le16 client_id;
388};
389
390/**
391 * enum pds_core_lif_attr - List of LIF attributes
392 * @PDS_CORE_LIF_ATTR_STATE: LIF state attribute
393 * @PDS_CORE_LIF_ATTR_NAME: LIF name attribute
394 * @PDS_CORE_LIF_ATTR_FEATURES: LIF features attribute
395 * @PDS_CORE_LIF_ATTR_STATS_CTRL: LIF statistics control attribute
396 */
397enum pds_core_lif_attr {
398 PDS_CORE_LIF_ATTR_STATE = 0,
399 PDS_CORE_LIF_ATTR_NAME = 1,
400 PDS_CORE_LIF_ATTR_FEATURES = 4,
401 PDS_CORE_LIF_ATTR_STATS_CTRL = 6,
402};
403
404/**
405 * struct pds_core_lif_setattr_cmd - Set LIF attributes on the NIC
406 * @opcode: Opcode PDS_AQ_CMD_LIF_SETATTR
407 * @attr: Attribute type (enum pds_core_lif_attr)
408 * @client_id: Client identifier
409 * @state: LIF state (enum pds_core_lif_state)
410 * @name: The name string, 0 terminated
411 * @features: Features (enum pds_core_hw_features)
412 * @stats_ctl: Stats control commands (enum pds_core_stats_ctl_cmd)
413 * @rsvd: Command Buffer padding
414 */
415struct pds_core_lif_setattr_cmd {
416 u8 opcode;
417 u8 attr;
418 __le16 client_id;
419 union {
420 u8 state;
421 char name[PDS_CORE_IFNAMSIZ];
422 __le64 features;
423 u8 stats_ctl;
424 u8 rsvd[60];
425 } __packed;
426};
427
428/**
429 * struct pds_core_lif_setattr_comp - LIF set attr command completion
430 * @status: Status of the command (enum pds_core_status_code)
431 * @rsvd: Word boundary padding
432 * @comp_index: Index in the descriptor ring for which this is the completion
433 * @features: Features (enum pds_core_hw_features)
434 * @rsvd2: Word boundary padding
435 * @color: Color bit
436 */
437struct pds_core_lif_setattr_comp {
438 u8 status;
439 u8 rsvd;
440 __le16 comp_index;
441 union {
442 __le64 features;
443 u8 rsvd2[11];
444 } __packed;
445 u8 color;
446};
447
448/**
449 * struct pds_core_lif_getattr_cmd - Get LIF attributes from the NIC
450 * @opcode: Opcode PDS_AQ_CMD_LIF_GETATTR
451 * @attr: Attribute type (enum pds_core_lif_attr)
452 * @client_id: Client identifier
453 */
454struct pds_core_lif_getattr_cmd {
455 u8 opcode;
456 u8 attr;
457 __le16 client_id;
458};
459
460/**
461 * struct pds_core_lif_getattr_comp - LIF get attr command completion
462 * @status: Status of the command (enum pds_core_status_code)
463 * @rsvd: Word boundary padding
464 * @comp_index: Index in the descriptor ring for which this is the completion
465 * @state: LIF state (enum pds_core_lif_state)
466 * @features: Features (enum pds_core_hw_features)
467 * @rsvd2: Word boundary padding
468 * @color: Color bit
469 */
470struct pds_core_lif_getattr_comp {
471 u8 status;
472 u8 rsvd;
473 __le16 comp_index;
474 union {
475 u8 state;
476 __le64 features;
477 u8 rsvd2[11];
478 } __packed;
479 u8 color;
480};
481
482/**
483 * union pds_core_q_identity - Queue identity information
484 * @version: Queue type version that can be used with FW
485 * @supported: Bitfield of queue versions, first bit = ver 0
486 * @rsvd: Word boundary padding
487 * @features: Queue features
488 * @desc_sz: Descriptor size
489 * @comp_sz: Completion descriptor size
490 * @rsvd2: Word boundary padding
491 */
492struct pds_core_q_identity {
493 u8 version;
494 u8 supported;
495 u8 rsvd[6];
496#define PDS_CORE_QIDENT_F_CQ 0x01 /* queue has completion ring */
497 __le64 features;
498 __le16 desc_sz;
499 __le16 comp_sz;
500 u8 rsvd2[6];
501};
502
503/**
504 * struct pds_core_q_identify_cmd - queue identify command
505 * @opcode: Opcode PDS_AQ_CMD_Q_IDENTIFY
506 * @type: Logical queue type (enum pds_core_logical_qtype)
507 * @client_id: Client identifier
508 * @ver: Highest queue type version that the driver supports
509 * @rsvd: Word boundary padding
510 * @ident_pa: DMA address to receive the data (struct pds_core_q_identity)
511 */
512struct pds_core_q_identify_cmd {
513 u8 opcode;
514 u8 type;
515 __le16 client_id;
516 u8 ver;
517 u8 rsvd[3];
518 __le64 ident_pa;
519};
520
521/**
522 * struct pds_core_q_identify_comp - queue identify command completion
523 * @status: Status of the command (enum pds_core_status_code)
524 * @rsvd: Word boundary padding
525 * @comp_index: Index in the descriptor ring for which this is the completion
526 * @ver: Queue type version that can be used with FW
527 * @rsvd1: Word boundary padding
528 * @color: Color bit
529 */
530struct pds_core_q_identify_comp {
531 u8 status;
532 u8 rsvd;
533 __le16 comp_index;
534 u8 ver;
535 u8 rsvd1[10];
536 u8 color;
537};
538
539/**
540 * struct pds_core_q_init_cmd - Queue init command
541 * @opcode: Opcode PDS_AQ_CMD_Q_INIT
542 * @type: Logical queue type
543 * @client_id: Client identifier
544 * @ver: Queue type version
545 * @rsvd: Word boundary padding
546 * @index: (LIF, qtype) relative admin queue index
547 * @intr_index: Interrupt control register index, or Event queue index
548 * @pid: Process ID
549 * @flags:
550 * IRQ: Interrupt requested on completion
551 * ENA: Enable the queue. If ENA=0 the queue is initialized
552 * but remains disabled, to be later enabled with the
553 * Queue Enable command. If ENA=1, then queue is
554 * initialized and then enabled.
555 * @cos: Class of service for this queue
556 * @ring_size: Queue ring size, encoded as a log2(size), in
557 * number of descriptors. The actual ring size is
558 * (1 << ring_size). For example, to select a ring size
559 * of 64 descriptors write ring_size = 6. The minimum
560 * ring_size value is 2 for a ring of 4 descriptors.
561 * The maximum ring_size value is 12 for a ring of 4k
562 * descriptors. Values of ring_size <2 and >12 are
563 * reserved.
564 * @ring_base: Queue ring base address
565 * @cq_ring_base: Completion queue ring base address
566 */
567struct pds_core_q_init_cmd {
568 u8 opcode;
569 u8 type;
570 __le16 client_id;
571 u8 ver;
572 u8 rsvd[3];
573 __le32 index;
574 __le16 pid;
575 __le16 intr_index;
576 __le16 flags;
577#define PDS_CORE_QINIT_F_IRQ 0x01 /* Request interrupt on completion */
578#define PDS_CORE_QINIT_F_ENA 0x02 /* Enable the queue */
579 u8 cos;
580#define PDS_CORE_QSIZE_MIN_LG2 2
581#define PDS_CORE_QSIZE_MAX_LG2 12
582 u8 ring_size;
583 __le64 ring_base;
584 __le64 cq_ring_base;
585} __packed;
586
587/**
588 * struct pds_core_q_init_comp - Queue init command completion
589 * @status: Status of the command (enum pds_core_status_code)
590 * @rsvd: Word boundary padding
591 * @comp_index: Index in the descriptor ring for which this is the completion
592 * @hw_index: Hardware Queue ID
593 * @hw_type: Hardware Queue type
594 * @rsvd2: Word boundary padding
595 * @color: Color
596 */
597struct pds_core_q_init_comp {
598 u8 status;
599 u8 rsvd;
600 __le16 comp_index;
601 __le32 hw_index;
602 u8 hw_type;
603 u8 rsvd2[6];
604 u8 color;
605};
606
607/*
608 * enum pds_vdpa_cmd_opcode - vDPA Device commands
609 */
610enum pds_vdpa_cmd_opcode {
611 PDS_VDPA_CMD_INIT = 48,
612 PDS_VDPA_CMD_IDENT = 49,
613 PDS_VDPA_CMD_RESET = 51,
614 PDS_VDPA_CMD_VQ_RESET = 52,
615 PDS_VDPA_CMD_VQ_INIT = 53,
616 PDS_VDPA_CMD_STATUS_UPDATE = 54,
617 PDS_VDPA_CMD_SET_FEATURES = 55,
618 PDS_VDPA_CMD_SET_ATTR = 56,
619};
620
621/**
622 * struct pds_vdpa_cmd - generic command
623 * @opcode: Opcode
624 * @vdpa_index: Index for vdpa subdevice
625 * @vf_id: VF id
626 */
627struct pds_vdpa_cmd {
628 u8 opcode;
629 u8 vdpa_index;
630 __le16 vf_id;
631};
632
633/**
634 * struct pds_vdpa_init_cmd - INIT command
635 * @opcode: Opcode PDS_VDPA_CMD_INIT
636 * @vdpa_index: Index for vdpa subdevice
637 * @vf_id: VF id
638 */
639struct pds_vdpa_init_cmd {
640 u8 opcode;
641 u8 vdpa_index;
642 __le16 vf_id;
643};
644
645/**
646 * struct pds_vdpa_ident - vDPA identification data
647 * @hw_features: vDPA features supported by device
648 * @max_vqs: max queues available (2 queues for a single queuepair)
649 * @max_qlen: log(2) of maximum number of descriptors
650 * @min_qlen: log(2) of minimum number of descriptors
651 *
652 * This struct is used in a DMA block that is set up for the PDS_VDPA_CMD_IDENT
653 * transaction. Set up the DMA block and send the address in the IDENT cmd
654 * data, the DSC will write the ident information, then we can remove the DMA
655 * block after reading the answer. If the completion status is 0, then there
656 * is valid information, else there was an error and the data should be invalid.
657 */
658struct pds_vdpa_ident {
659 __le64 hw_features;
660 __le16 max_vqs;
661 __le16 max_qlen;
662 __le16 min_qlen;
663};
664
665/**
666 * struct pds_vdpa_ident_cmd - IDENT command
667 * @opcode: Opcode PDS_VDPA_CMD_IDENT
668 * @rsvd: Word boundary padding
669 * @vf_id: VF id
670 * @len: length of ident info DMA space
671 * @ident_pa: address for DMA of ident info (struct pds_vdpa_ident)
672 * only used for this transaction, then forgotten by DSC
673 */
674struct pds_vdpa_ident_cmd {
675 u8 opcode;
676 u8 rsvd;
677 __le16 vf_id;
678 __le32 len;
679 __le64 ident_pa;
680};
681
682/**
683 * struct pds_vdpa_status_cmd - STATUS_UPDATE command
684 * @opcode: Opcode PDS_VDPA_CMD_STATUS_UPDATE
685 * @vdpa_index: Index for vdpa subdevice
686 * @vf_id: VF id
687 * @status: new status bits
688 */
689struct pds_vdpa_status_cmd {
690 u8 opcode;
691 u8 vdpa_index;
692 __le16 vf_id;
693 u8 status;
694};
695
696/**
697 * enum pds_vdpa_attr - List of VDPA device attributes
698 * @PDS_VDPA_ATTR_MAC: MAC address
699 * @PDS_VDPA_ATTR_MAX_VQ_PAIRS: Max virtqueue pairs
700 */
701enum pds_vdpa_attr {
702 PDS_VDPA_ATTR_MAC = 1,
703 PDS_VDPA_ATTR_MAX_VQ_PAIRS = 2,
704};
705
706/**
707 * struct pds_vdpa_setattr_cmd - SET_ATTR command
708 * @opcode: Opcode PDS_VDPA_CMD_SET_ATTR
709 * @vdpa_index: Index for vdpa subdevice
710 * @vf_id: VF id
711 * @attr: attribute to be changed (enum pds_vdpa_attr)
712 * @pad: Word boundary padding
713 * @mac: new mac address to be assigned as vdpa device address
714 * @max_vq_pairs: new limit of virtqueue pairs
715 */
716struct pds_vdpa_setattr_cmd {
717 u8 opcode;
718 u8 vdpa_index;
719 __le16 vf_id;
720 u8 attr;
721 u8 pad[3];
722 union {
723 u8 mac[6];
724 __le16 max_vq_pairs;
725 } __packed;
726};
727
728/**
729 * struct pds_vdpa_vq_init_cmd - queue init command
730 * @opcode: Opcode PDS_VDPA_CMD_VQ_INIT
731 * @vdpa_index: Index for vdpa subdevice
732 * @vf_id: VF id
733 * @qid: Queue id (bit0 clear = rx, bit0 set = tx, qid=N is ctrlq)
734 * @len: log(2) of max descriptor count
735 * @desc_addr: DMA address of descriptor area
736 * @avail_addr: DMA address of available descriptors (aka driver area)
737 * @used_addr: DMA address of used descriptors (aka device area)
738 * @intr_index: interrupt index
739 * @avail_index: initial device position in available ring
740 * @used_index: initial device position in used ring
741 */
742struct pds_vdpa_vq_init_cmd {
743 u8 opcode;
744 u8 vdpa_index;
745 __le16 vf_id;
746 __le16 qid;
747 __le16 len;
748 __le64 desc_addr;
749 __le64 avail_addr;
750 __le64 used_addr;
751 __le16 intr_index;
752 __le16 avail_index;
753 __le16 used_index;
754};
755
756/**
757 * struct pds_vdpa_vq_init_comp - queue init completion
758 * @status: Status of the command (enum pds_core_status_code)
759 * @hw_qtype: HW queue type, used in doorbell selection
760 * @hw_qindex: HW queue index, used in doorbell selection
761 * @rsvd: Word boundary padding
762 * @color: Color bit
763 */
764struct pds_vdpa_vq_init_comp {
765 u8 status;
766 u8 hw_qtype;
767 __le16 hw_qindex;
768 u8 rsvd[11];
769 u8 color;
770};
771
772/**
773 * struct pds_vdpa_vq_reset_cmd - queue reset command
774 * @opcode: Opcode PDS_VDPA_CMD_VQ_RESET
775 * @vdpa_index: Index for vdpa subdevice
776 * @vf_id: VF id
777 * @qid: Queue id
778 */
779struct pds_vdpa_vq_reset_cmd {
780 u8 opcode;
781 u8 vdpa_index;
782 __le16 vf_id;
783 __le16 qid;
784};
785
786/**
787 * struct pds_vdpa_vq_reset_comp - queue reset completion
788 * @status: Status of the command (enum pds_core_status_code)
789 * @rsvd0: Word boundary padding
790 * @avail_index: current device position in available ring
791 * @used_index: current device position in used ring
792 * @rsvd: Word boundary padding
793 * @color: Color bit
794 */
795struct pds_vdpa_vq_reset_comp {
796 u8 status;
797 u8 rsvd0;
798 __le16 avail_index;
799 __le16 used_index;
800 u8 rsvd[9];
801 u8 color;
802};
803
804/**
805 * struct pds_vdpa_set_features_cmd - set hw features
806 * @opcode: Opcode PDS_VDPA_CMD_SET_FEATURES
807 * @vdpa_index: Index for vdpa subdevice
808 * @vf_id: VF id
809 * @rsvd: Word boundary padding
810 * @features: Feature bit mask
811 */
812struct pds_vdpa_set_features_cmd {
813 u8 opcode;
814 u8 vdpa_index;
815 __le16 vf_id;
816 __le32 rsvd;
817 __le64 features;
818};
819
820#define PDS_LM_DEVICE_STATE_LENGTH 65536
821#define PDS_LM_CHECK_DEVICE_STATE_LENGTH(X) \
822 PDS_CORE_SIZE_CHECK(union, PDS_LM_DEVICE_STATE_LENGTH, X)
823
824/*
825 * enum pds_lm_cmd_opcode - Live Migration Device commands
826 */
827enum pds_lm_cmd_opcode {
828 PDS_LM_CMD_HOST_VF_STATUS = 1,
829
830 /* Device state commands */
831 PDS_LM_CMD_STATE_SIZE = 16,
832 PDS_LM_CMD_SUSPEND = 18,
833 PDS_LM_CMD_SUSPEND_STATUS = 19,
834 PDS_LM_CMD_RESUME = 20,
835 PDS_LM_CMD_SAVE = 21,
836 PDS_LM_CMD_RESTORE = 22,
837
838 /* Dirty page tracking commands */
839 PDS_LM_CMD_DIRTY_STATUS = 32,
840 PDS_LM_CMD_DIRTY_ENABLE = 33,
841 PDS_LM_CMD_DIRTY_DISABLE = 34,
842 PDS_LM_CMD_DIRTY_READ_SEQ = 35,
843 PDS_LM_CMD_DIRTY_WRITE_ACK = 36,
844};
845
846/**
847 * struct pds_lm_cmd - generic command
848 * @opcode: Opcode
849 * @rsvd: Word boundary padding
850 * @vf_id: VF id
851 * @rsvd2: Structure padding to 60 Bytes
852 */
853struct pds_lm_cmd {
854 u8 opcode;
855 u8 rsvd;
856 __le16 vf_id;
857 u8 rsvd2[56];
858};
859
860/**
861 * struct pds_lm_state_size_cmd - STATE_SIZE command
862 * @opcode: Opcode
863 * @rsvd: Word boundary padding
864 * @vf_id: VF id
865 */
866struct pds_lm_state_size_cmd {
867 u8 opcode;
868 u8 rsvd;
869 __le16 vf_id;
870};
871
872/**
873 * struct pds_lm_state_size_comp - STATE_SIZE command completion
874 * @status: Status of the command (enum pds_core_status_code)
875 * @rsvd: Word boundary padding
876 * @comp_index: Index in the desc ring for which this is the completion
877 * @size: Size of the device state
878 * @rsvd2: Word boundary padding
879 * @color: Color bit
880 */
881struct pds_lm_state_size_comp {
882 u8 status;
883 u8 rsvd;
884 __le16 comp_index;
885 union {
886 __le64 size;
887 u8 rsvd2[11];
888 } __packed;
889 u8 color;
890};
891
892enum pds_lm_suspend_resume_type {
893 PDS_LM_SUSPEND_RESUME_TYPE_FULL = 0,
894 PDS_LM_SUSPEND_RESUME_TYPE_P2P = 1,
895};
896
897/**
898 * struct pds_lm_suspend_cmd - SUSPEND command
899 * @opcode: Opcode PDS_LM_CMD_SUSPEND
900 * @rsvd: Word boundary padding
901 * @vf_id: VF id
902 * @type: Type of suspend (enum pds_lm_suspend_resume_type)
903 */
904struct pds_lm_suspend_cmd {
905 u8 opcode;
906 u8 rsvd;
907 __le16 vf_id;
908 u8 type;
909};
910
911/**
912 * struct pds_lm_suspend_status_cmd - SUSPEND status command
913 * @opcode: Opcode PDS_AQ_CMD_LM_SUSPEND_STATUS
914 * @rsvd: Word boundary padding
915 * @vf_id: VF id
916 * @type: Type of suspend (enum pds_lm_suspend_resume_type)
917 */
918struct pds_lm_suspend_status_cmd {
919 u8 opcode;
920 u8 rsvd;
921 __le16 vf_id;
922 u8 type;
923};
924
925/**
926 * struct pds_lm_resume_cmd - RESUME command
927 * @opcode: Opcode PDS_LM_CMD_RESUME
928 * @rsvd: Word boundary padding
929 * @vf_id: VF id
930 * @type: Type of resume (enum pds_lm_suspend_resume_type)
931 */
932struct pds_lm_resume_cmd {
933 u8 opcode;
934 u8 rsvd;
935 __le16 vf_id;
936 u8 type;
937};
938
939/**
940 * struct pds_lm_sg_elem - Transmit scatter-gather (SG) descriptor element
941 * @addr: DMA address of SG element data buffer
942 * @len: Length of SG element data buffer, in bytes
943 * @rsvd: Word boundary padding
944 */
945struct pds_lm_sg_elem {
946 __le64 addr;
947 __le32 len;
948 __le16 rsvd[2];
949};
950
951/**
952 * struct pds_lm_save_cmd - SAVE command
953 * @opcode: Opcode PDS_LM_CMD_SAVE
954 * @rsvd: Word boundary padding
955 * @vf_id: VF id
956 * @rsvd2: Word boundary padding
957 * @sgl_addr: IOVA address of the SGL to dma the device state
958 * @num_sge: Total number of SG elements
959 */
960struct pds_lm_save_cmd {
961 u8 opcode;
962 u8 rsvd;
963 __le16 vf_id;
964 u8 rsvd2[4];
965 __le64 sgl_addr;
966 __le32 num_sge;
967} __packed;
968
969/**
970 * struct pds_lm_restore_cmd - RESTORE command
971 * @opcode: Opcode PDS_LM_CMD_RESTORE
972 * @rsvd: Word boundary padding
973 * @vf_id: VF id
974 * @rsvd2: Word boundary padding
975 * @sgl_addr: IOVA address of the SGL to dma the device state
976 * @num_sge: Total number of SG elements
977 */
978struct pds_lm_restore_cmd {
979 u8 opcode;
980 u8 rsvd;
981 __le16 vf_id;
982 u8 rsvd2[4];
983 __le64 sgl_addr;
984 __le32 num_sge;
985} __packed;
986
987/**
988 * union pds_lm_dev_state - device state information
989 * @words: Device state words
990 */
991union pds_lm_dev_state {
992 __le32 words[PDS_LM_DEVICE_STATE_LENGTH / sizeof(__le32)];
993};
994
995enum pds_lm_host_vf_status {
996 PDS_LM_STA_NONE = 0,
997 PDS_LM_STA_IN_PROGRESS,
998 PDS_LM_STA_MAX,
999};
1000
1001/**
1002 * struct pds_lm_dirty_region_info - Memory region info for STATUS and ENABLE
1003 * @dma_base: Base address of the DMA-contiguous memory region
1004 * @page_count: Number of pages in the memory region
1005 * @page_size_log2: Log2 page size in the memory region
1006 * @rsvd: Word boundary padding
1007 */
1008struct pds_lm_dirty_region_info {
1009 __le64 dma_base;
1010 __le32 page_count;
1011 u8 page_size_log2;
1012 u8 rsvd[3];
1013};
1014
1015/**
1016 * struct pds_lm_dirty_status_cmd - DIRTY_STATUS command
1017 * @opcode: Opcode PDS_LM_CMD_DIRTY_STATUS
1018 * @rsvd: Word boundary padding
1019 * @vf_id: VF id
1020 * @max_regions: Capacity of the region info buffer
1021 * @rsvd2: Word boundary padding
1022 * @regions_dma: DMA address of the region info buffer
1023 *
1024 * The minimum of max_regions (from the command) and num_regions (from the
1025 * completion) of struct pds_lm_dirty_region_info will be written to
1026 * regions_dma.
1027 *
1028 * The max_regions may be zero, in which case regions_dma is ignored. In that
1029 * case, the completion will only report the maximum number of regions
1030 * supported by the device, and the number of regions currently enabled.
1031 */
1032struct pds_lm_dirty_status_cmd {
1033 u8 opcode;
1034 u8 rsvd;
1035 __le16 vf_id;
1036 u8 max_regions;
1037 u8 rsvd2[3];
1038 __le64 regions_dma;
1039} __packed;
1040
1041/**
1042 * enum pds_lm_dirty_bmp_type - Type of dirty page bitmap
1043 * @PDS_LM_DIRTY_BMP_TYPE_NONE: No bitmap / disabled
1044 * @PDS_LM_DIRTY_BMP_TYPE_SEQ_ACK: Seq/Ack bitmap representation
1045 */
1046enum pds_lm_dirty_bmp_type {
1047 PDS_LM_DIRTY_BMP_TYPE_NONE = 0,
1048 PDS_LM_DIRTY_BMP_TYPE_SEQ_ACK = 1,
1049};
1050
1051/**
1052 * struct pds_lm_dirty_status_comp - STATUS command completion
1053 * @status: Status of the command (enum pds_core_status_code)
1054 * @rsvd: Word boundary padding
1055 * @comp_index: Index in the desc ring for which this is the completion
1056 * @max_regions: Maximum number of regions supported by the device
1057 * @num_regions: Number of regions currently enabled
1058 * @bmp_type: Type of dirty bitmap representation
1059 * @rsvd2: Word boundary padding
1060 * @bmp_type_mask: Mask of supported bitmap types, bit index per type
1061 * @rsvd3: Word boundary padding
1062 * @color: Color bit
1063 *
1064 * This completion descriptor is used for STATUS, ENABLE, and DISABLE.
1065 */
1066struct pds_lm_dirty_status_comp {
1067 u8 status;
1068 u8 rsvd;
1069 __le16 comp_index;
1070 u8 max_regions;
1071 u8 num_regions;
1072 u8 bmp_type;
1073 u8 rsvd2;
1074 __le32 bmp_type_mask;
1075 u8 rsvd3[3];
1076 u8 color;
1077};
1078
1079/**
1080 * struct pds_lm_dirty_enable_cmd - DIRTY_ENABLE command
1081 * @opcode: Opcode PDS_LM_CMD_DIRTY_ENABLE
1082 * @rsvd: Word boundary padding
1083 * @vf_id: VF id
1084 * @bmp_type: Type of dirty bitmap representation
1085 * @num_regions: Number of entries in the region info buffer
1086 * @rsvd2: Word boundary padding
1087 * @regions_dma: DMA address of the region info buffer
1088 *
1089 * The num_regions must be nonzero, and less than or equal to the maximum
1090 * number of regions supported by the device.
1091 *
1092 * The memory regions should not overlap.
1093 *
1094 * The information should be initialized by the driver. The device may modify
1095 * the information on successful completion, such as by size-aligning the
1096 * number of pages in a region.
1097 *
1098 * The modified number of pages will be greater than or equal to the page count
1099 * given in the enable command, and at least as coarsly aligned as the given
1100 * value. For example, the count might be aligned to a multiple of 64, but
1101 * if the value is already a multiple of 128 or higher, it will not change.
1102 * If the driver requires its own minimum alignment of the number of pages, the
1103 * driver should account for that already in the region info of this command.
1104 *
1105 * This command uses struct pds_lm_dirty_status_comp for its completion.
1106 */
1107struct pds_lm_dirty_enable_cmd {
1108 u8 opcode;
1109 u8 rsvd;
1110 __le16 vf_id;
1111 u8 bmp_type;
1112 u8 num_regions;
1113 u8 rsvd2[2];
1114 __le64 regions_dma;
1115} __packed;
1116
1117/**
1118 * struct pds_lm_dirty_disable_cmd - DIRTY_DISABLE command
1119 * @opcode: Opcode PDS_LM_CMD_DIRTY_DISABLE
1120 * @rsvd: Word boundary padding
1121 * @vf_id: VF id
1122 *
1123 * Dirty page tracking will be disabled. This may be called in any state, as
1124 * long as dirty page tracking is supported by the device, to ensure that dirty
1125 * page tracking is disabled.
1126 *
1127 * This command uses struct pds_lm_dirty_status_comp for its completion. On
1128 * success, num_regions will be zero.
1129 */
1130struct pds_lm_dirty_disable_cmd {
1131 u8 opcode;
1132 u8 rsvd;
1133 __le16 vf_id;
1134};
1135
1136/**
1137 * struct pds_lm_dirty_seq_ack_cmd - DIRTY_READ_SEQ or _WRITE_ACK command
1138 * @opcode: Opcode PDS_LM_CMD_DIRTY_[READ_SEQ|WRITE_ACK]
1139 * @rsvd: Word boundary padding
1140 * @vf_id: VF id
1141 * @off_bytes: Byte offset in the bitmap
1142 * @len_bytes: Number of bytes to transfer
1143 * @num_sge: Number of DMA scatter gather elements
1144 * @rsvd2: Word boundary padding
1145 * @sgl_addr: DMA address of scatter gather list
1146 *
1147 * Read bytes from the SEQ bitmap, or write bytes into the ACK bitmap.
1148 *
1149 * This command treats the entire bitmap as a byte buffer. It does not
1150 * distinguish between guest memory regions. The driver should refer to the
1151 * number of pages in each region, according to PDS_LM_CMD_DIRTY_STATUS, to
1152 * determine the region boundaries in the bitmap. Each region will be
1153 * represented by exactly the number of bits as the page count for that region,
1154 * immediately following the last bit of the previous region.
1155 */
1156struct pds_lm_dirty_seq_ack_cmd {
1157 u8 opcode;
1158 u8 rsvd;
1159 __le16 vf_id;
1160 __le32 off_bytes;
1161 __le32 len_bytes;
1162 __le16 num_sge;
1163 u8 rsvd2[2];
1164 __le64 sgl_addr;
1165} __packed;
1166
1167/**
1168 * struct pds_lm_host_vf_status_cmd - HOST_VF_STATUS command
1169 * @opcode: Opcode PDS_LM_CMD_HOST_VF_STATUS
1170 * @rsvd: Word boundary padding
1171 * @vf_id: VF id
1172 * @status: Current LM status of host VF driver (enum pds_lm_host_status)
1173 */
1174struct pds_lm_host_vf_status_cmd {
1175 u8 opcode;
1176 u8 rsvd;
1177 __le16 vf_id;
1178 u8 status;
1179};
1180
1181enum pds_fwctl_cmd_opcode {
1182 PDS_FWCTL_CMD_IDENT = 70,
1183 PDS_FWCTL_CMD_RPC = 71,
1184 PDS_FWCTL_CMD_QUERY = 72,
1185};
1186
1187/**
1188 * struct pds_fwctl_cmd - Firmware control command structure
1189 * @opcode: Opcode
1190 * @rsvd: Reserved
1191 * @ep: Endpoint identifier
1192 * @op: Operation identifier
1193 */
1194struct pds_fwctl_cmd {
1195 u8 opcode;
1196 u8 rsvd[3];
1197 __le32 ep;
1198 __le32 op;
1199} __packed;
1200
1201/**
1202 * struct pds_fwctl_comp - Firmware control completion structure
1203 * @status: Status of the firmware control operation
1204 * @rsvd: Reserved
1205 * @comp_index: Completion index in little-endian format
1206 * @rsvd2: Reserved
1207 * @color: Color bit indicating the state of the completion
1208 */
1209struct pds_fwctl_comp {
1210 u8 status;
1211 u8 rsvd;
1212 __le16 comp_index;
1213 u8 rsvd2[11];
1214 u8 color;
1215} __packed;
1216
1217/**
1218 * struct pds_fwctl_ident_cmd - Firmware control identification command structure
1219 * @opcode: Operation code for the command
1220 * @rsvd: Reserved
1221 * @version: Interface version
1222 * @rsvd2: Reserved
1223 * @len: Length of the identification data
1224 * @ident_pa: Physical address of the identification data
1225 */
1226struct pds_fwctl_ident_cmd {
1227 u8 opcode;
1228 u8 rsvd;
1229 u8 version;
1230 u8 rsvd2;
1231 __le32 len;
1232 __le64 ident_pa;
1233} __packed;
1234
1235/* future feature bits here
1236 * enum pds_fwctl_features {
1237 * };
1238 * (compilers don't like empty enums)
1239 */
1240
1241/**
1242 * struct pds_fwctl_ident - Firmware control identification structure
1243 * @features: Supported features (enum pds_fwctl_features)
1244 * @version: Interface version
1245 * @rsvd: Reserved
1246 * @max_req_sz: Maximum request size
1247 * @max_resp_sz: Maximum response size
1248 * @max_req_sg_elems: Maximum number of request SGs
1249 * @max_resp_sg_elems: Maximum number of response SGs
1250 */
1251struct pds_fwctl_ident {
1252 __le64 features;
1253 u8 version;
1254 u8 rsvd[3];
1255 __le32 max_req_sz;
1256 __le32 max_resp_sz;
1257 u8 max_req_sg_elems;
1258 u8 max_resp_sg_elems;
1259} __packed;
1260
1261enum pds_fwctl_query_entity {
1262 PDS_FWCTL_RPC_ROOT = 0,
1263 PDS_FWCTL_RPC_ENDPOINT = 1,
1264 PDS_FWCTL_RPC_OPERATION = 2,
1265};
1266
1267#define PDS_FWCTL_RPC_OPCODE_CMD_SHIFT 0
1268#define PDS_FWCTL_RPC_OPCODE_CMD_MASK GENMASK(15, PDS_FWCTL_RPC_OPCODE_CMD_SHIFT)
1269#define PDS_FWCTL_RPC_OPCODE_VER_SHIFT 16
1270#define PDS_FWCTL_RPC_OPCODE_VER_MASK GENMASK(23, PDS_FWCTL_RPC_OPCODE_VER_SHIFT)
1271
1272#define PDS_FWCTL_RPC_OPCODE_GET_CMD(op) FIELD_GET(PDS_FWCTL_RPC_OPCODE_CMD_MASK, op)
1273#define PDS_FWCTL_RPC_OPCODE_GET_VER(op) FIELD_GET(PDS_FWCTL_RPC_OPCODE_VER_MASK, op)
1274
1275#define PDS_FWCTL_RPC_OPCODE_CMP(op1, op2) \
1276 (PDS_FWCTL_RPC_OPCODE_GET_CMD(op1) == PDS_FWCTL_RPC_OPCODE_GET_CMD(op2) && \
1277 PDS_FWCTL_RPC_OPCODE_GET_VER(op1) <= PDS_FWCTL_RPC_OPCODE_GET_VER(op2))
1278
1279/*
1280 * FW command attributes that map to the FWCTL scope values
1281 */
1282#define PDSFC_FW_CMD_ATTR_READ 0x00
1283#define PDSFC_FW_CMD_ATTR_DEBUG_READ 0x02
1284#define PDSFC_FW_CMD_ATTR_WRITE 0x04
1285#define PDSFC_FW_CMD_ATTR_DEBUG_WRITE 0x08
1286#define PDSFC_FW_CMD_ATTR_SYNC 0x10
1287
1288/**
1289 * struct pds_fwctl_query_cmd - Firmware control query command structure
1290 * @opcode: Operation code for the command
1291 * @entity: Entity type to query (enum pds_fwctl_query_entity)
1292 * @version: Version of the query data structure supported by the driver
1293 * @rsvd: Reserved
1294 * @query_data_buf_len: Length of the query data buffer
1295 * @query_data_buf_pa: Physical address of the query data buffer
1296 * @ep: Endpoint identifier to query (when entity is PDS_FWCTL_RPC_ENDPOINT)
1297 * @op: Operation identifier to query (when entity is PDS_FWCTL_RPC_OPERATION)
1298 *
1299 * This structure is used to send a query command to the firmware control
1300 * interface. The structure is packed to ensure there is no padding between
1301 * the fields.
1302 */
1303struct pds_fwctl_query_cmd {
1304 u8 opcode;
1305 u8 entity;
1306 u8 version;
1307 u8 rsvd;
1308 __le32 query_data_buf_len;
1309 __le64 query_data_buf_pa;
1310 union {
1311 __le32 ep;
1312 __le32 op;
1313 };
1314} __packed;
1315
1316/**
1317 * struct pds_fwctl_query_comp - Firmware control query completion structure
1318 * @status: Status of the query command
1319 * @rsvd: Reserved
1320 * @comp_index: Completion index in little-endian format
1321 * @version: Version of the query data structure returned by firmware. This
1322 * should be less than or equal to the version supported by the driver
1323 * @rsvd2: Reserved
1324 * @color: Color bit indicating the state of the completion
1325 */
1326struct pds_fwctl_query_comp {
1327 u8 status;
1328 u8 rsvd;
1329 __le16 comp_index;
1330 u8 version;
1331 u8 rsvd2[2];
1332 u8 color;
1333} __packed;
1334
1335/**
1336 * struct pds_fwctl_query_data_endpoint - query data for entity PDS_FWCTL_RPC_ROOT
1337 * @id: The identifier for the data endpoint
1338 */
1339struct pds_fwctl_query_data_endpoint {
1340 __le32 id;
1341} __packed;
1342
1343/**
1344 * struct pds_fwctl_query_data_operation - query data for entity PDS_FWCTL_RPC_ENDPOINT
1345 * @id: Operation identifier
1346 * @scope: Scope of the operation (enum fwctl_rpc_scope)
1347 * @rsvd: Reserved
1348 */
1349struct pds_fwctl_query_data_operation {
1350 __le32 id;
1351 u8 scope;
1352 u8 rsvd[3];
1353} __packed;
1354
1355/**
1356 * struct pds_fwctl_query_data - query data structure
1357 * @version: Version of the query data structure
1358 * @rsvd: Reserved
1359 * @num_entries: Number of entries in the union
1360 * @entries: Array of query data entries, depending on the entity type
1361 */
1362struct pds_fwctl_query_data {
1363 u8 version;
1364 u8 rsvd[3];
1365 __le32 num_entries;
1366 u8 entries[] __counted_by_le(num_entries);
1367} __packed;
1368
1369/**
1370 * struct pds_fwctl_rpc_cmd - Firmware control RPC command
1371 * @opcode: opcode PDS_FWCTL_CMD_RPC
1372 * @rsvd: Reserved
1373 * @flags: Indicates indirect request and/or response handling
1374 * @ep: Endpoint identifier
1375 * @op: Operation identifier
1376 * @inline_req0: Buffer for inline request
1377 * @inline_req1: Buffer for inline request
1378 * @req_pa: Physical address of request data
1379 * @req_sz: Size of the request
1380 * @req_sg_elems: Number of request SGs
1381 * @req_rsvd: Reserved
1382 * @inline_req2: Buffer for inline request
1383 * @resp_pa: Physical address of response data
1384 * @resp_sz: Size of the response
1385 * @resp_sg_elems: Number of response SGs
1386 * @resp_rsvd: Reserved
1387 */
1388struct pds_fwctl_rpc_cmd {
1389 u8 opcode;
1390 u8 rsvd;
1391 __le16 flags;
1392#define PDS_FWCTL_RPC_IND_REQ 0x1
1393#define PDS_FWCTL_RPC_IND_RESP 0x2
1394 __le32 ep;
1395 __le32 op;
1396 u8 inline_req0[16];
1397 union {
1398 u8 inline_req1[16];
1399 struct {
1400 __le64 req_pa;
1401 __le32 req_sz;
1402 u8 req_sg_elems;
1403 u8 req_rsvd[3];
1404 };
1405 };
1406 union {
1407 u8 inline_req2[16];
1408 struct {
1409 __le64 resp_pa;
1410 __le32 resp_sz;
1411 u8 resp_sg_elems;
1412 u8 resp_rsvd[3];
1413 };
1414 };
1415} __packed;
1416
1417/**
1418 * struct pds_sg_elem - Transmit scatter-gather (SG) descriptor element
1419 * @addr: DMA address of SG element data buffer
1420 * @len: Length of SG element data buffer, in bytes
1421 * @rsvd: Reserved
1422 */
1423struct pds_sg_elem {
1424 __le64 addr;
1425 __le32 len;
1426 u8 rsvd[4];
1427} __packed;
1428
1429/**
1430 * struct pds_fwctl_rpc_comp - Completion of a firmware control RPC
1431 * @status: Status of the command
1432 * @rsvd: Reserved
1433 * @comp_index: Completion index of the command
1434 * @err: Error code, if any, from the RPC
1435 * @resp_sz: Size of the response
1436 * @rsvd2: Reserved
1437 * @color: Color bit indicating the state of the completion
1438 */
1439struct pds_fwctl_rpc_comp {
1440 u8 status;
1441 u8 rsvd;
1442 __le16 comp_index;
1443 __le32 err;
1444 __le32 resp_sz;
1445 u8 rsvd2[3];
1446 u8 color;
1447} __packed;
1448
1449union pds_core_adminq_cmd {
1450 u8 opcode;
1451 u8 bytes[64];
1452
1453 struct pds_core_client_reg_cmd client_reg;
1454 struct pds_core_client_unreg_cmd client_unreg;
1455 struct pds_core_client_request_cmd client_request;
1456
1457 struct pds_core_lif_identify_cmd lif_ident;
1458 struct pds_core_lif_init_cmd lif_init;
1459 struct pds_core_lif_reset_cmd lif_reset;
1460 struct pds_core_lif_setattr_cmd lif_setattr;
1461 struct pds_core_lif_getattr_cmd lif_getattr;
1462
1463 struct pds_core_q_identify_cmd q_ident;
1464 struct pds_core_q_init_cmd q_init;
1465
1466 struct pds_vdpa_cmd vdpa;
1467 struct pds_vdpa_init_cmd vdpa_init;
1468 struct pds_vdpa_ident_cmd vdpa_ident;
1469 struct pds_vdpa_status_cmd vdpa_status;
1470 struct pds_vdpa_setattr_cmd vdpa_setattr;
1471 struct pds_vdpa_set_features_cmd vdpa_set_features;
1472 struct pds_vdpa_vq_init_cmd vdpa_vq_init;
1473 struct pds_vdpa_vq_reset_cmd vdpa_vq_reset;
1474
1475 struct pds_lm_suspend_cmd lm_suspend;
1476 struct pds_lm_suspend_status_cmd lm_suspend_status;
1477 struct pds_lm_resume_cmd lm_resume;
1478 struct pds_lm_state_size_cmd lm_state_size;
1479 struct pds_lm_save_cmd lm_save;
1480 struct pds_lm_restore_cmd lm_restore;
1481 struct pds_lm_host_vf_status_cmd lm_host_vf_status;
1482 struct pds_lm_dirty_status_cmd lm_dirty_status;
1483 struct pds_lm_dirty_enable_cmd lm_dirty_enable;
1484 struct pds_lm_dirty_disable_cmd lm_dirty_disable;
1485 struct pds_lm_dirty_seq_ack_cmd lm_dirty_seq_ack;
1486
1487 struct pds_fwctl_cmd fwctl;
1488 struct pds_fwctl_ident_cmd fwctl_ident;
1489 struct pds_fwctl_rpc_cmd fwctl_rpc;
1490 struct pds_fwctl_query_cmd fwctl_query;
1491};
1492
1493union pds_core_adminq_comp {
1494 struct {
1495 u8 status;
1496 u8 rsvd;
1497 __le16 comp_index;
1498 u8 rsvd2[11];
1499 u8 color;
1500 };
1501 u32 words[4];
1502
1503 struct pds_core_client_reg_comp client_reg;
1504
1505 struct pds_core_lif_identify_comp lif_ident;
1506 struct pds_core_lif_init_comp lif_init;
1507 struct pds_core_lif_setattr_comp lif_setattr;
1508 struct pds_core_lif_getattr_comp lif_getattr;
1509
1510 struct pds_core_q_identify_comp q_ident;
1511 struct pds_core_q_init_comp q_init;
1512
1513 struct pds_vdpa_vq_init_comp vdpa_vq_init;
1514 struct pds_vdpa_vq_reset_comp vdpa_vq_reset;
1515
1516 struct pds_lm_state_size_comp lm_state_size;
1517 struct pds_lm_dirty_status_comp lm_dirty_status;
1518
1519 struct pds_fwctl_comp fwctl;
1520 struct pds_fwctl_rpc_comp fwctl_rpc;
1521 struct pds_fwctl_query_comp fwctl_query;
1522};
1523
1524#ifndef __CHECKER__
1525static_assert(sizeof(union pds_core_adminq_cmd) == 64);
1526static_assert(sizeof(union pds_core_adminq_comp) == 16);
1527static_assert(sizeof(union pds_core_notifyq_comp) == 64);
1528#endif /* __CHECKER__ */
1529
1530/* The color bit is a 'done' bit for the completion descriptors
1531 * where the meaning alternates between '1' and '0' for alternating
1532 * passes through the completion descriptor ring.
1533 */
1534static inline bool pdsc_color_match(u8 color, bool done_color)
1535{
1536 return (!!(color & PDS_COMP_COLOR_MASK)) == done_color;
1537}
1538
1539struct pdsc;
1540int pdsc_adminq_post(struct pdsc *pdsc,
1541 union pds_core_adminq_cmd *cmd,
1542 union pds_core_adminq_comp *comp,
1543 bool fast_poll);
1544
1545#endif /* _PDS_CORE_ADMINQ_H_ */
1546

source code of linux/include/linux/pds/pds_adminq.h