| 1 | /* SPDX-License-Identifier: GPL-2.0 */ |
| 2 | /* |
| 3 | * Common helpers for drivers (e.g. low-level PCI/TSM drivers) implementing the |
| 4 | * IDE key management protocol (IDE_KM) as defined by: |
| 5 | * PCIe r7.0 section 6.33 Integrity & Data Encryption (IDE) |
| 6 | * |
| 7 | * Copyright(c) 2024-2025 Intel Corporation. All rights reserved. |
| 8 | */ |
| 9 | |
| 10 | #ifndef __PCI_IDE_H__ |
| 11 | #define __PCI_IDE_H__ |
| 12 | |
| 13 | enum pci_ide_partner_select { |
| 14 | PCI_IDE_EP, |
| 15 | PCI_IDE_RP, |
| 16 | PCI_IDE_PARTNER_MAX, |
| 17 | /* |
| 18 | * In addition to the resources in each partner port the |
| 19 | * platform / host-bridge additionally has a Stream ID pool that |
| 20 | * it shares across root ports. Let pci_ide_stream_alloc() use |
| 21 | * the alloc_stream_index() helper as endpoints and root ports. |
| 22 | */ |
| 23 | PCI_IDE_HB = PCI_IDE_PARTNER_MAX, |
| 24 | }; |
| 25 | |
| 26 | /** |
| 27 | * struct pci_ide_partner - Per port pair Selective IDE Stream settings |
| 28 | * @rid_start: Partner Port Requester ID range start |
| 29 | * @rid_end: Partner Port Requester ID range end (inclusive) |
| 30 | * @stream_index: Selective IDE Stream Register Block selection |
| 31 | * @mem_assoc: PCI bus memory address association for targeting peer partner |
| 32 | * @pref_assoc: PCI bus prefetchable memory address association for |
| 33 | * targeting peer partner |
| 34 | * @default_stream: Endpoint uses this stream for all upstream TLPs regardless of |
| 35 | * address and RID association registers |
| 36 | * @setup: flag to track whether to run pci_ide_stream_teardown() for this |
| 37 | * partner slot |
| 38 | * @enable: flag whether to run pci_ide_stream_disable() for this partner slot |
| 39 | * |
| 40 | * By default, pci_ide_stream_alloc() initializes @mem_assoc and @pref_assoc |
| 41 | * with the immediate ancestor downstream port memory ranges (i.e. Type 1 |
| 42 | * Configuration Space Header values). Caller may zero size ({0, -1}) the range |
| 43 | * to drop it from consideration at pci_ide_stream_setup() time. |
| 44 | */ |
| 45 | struct pci_ide_partner { |
| 46 | u16 rid_start; |
| 47 | u16 rid_end; |
| 48 | u8 stream_index; |
| 49 | struct pci_bus_region mem_assoc; |
| 50 | struct pci_bus_region pref_assoc; |
| 51 | unsigned int default_stream:1; |
| 52 | unsigned int setup:1; |
| 53 | unsigned int enable:1; |
| 54 | }; |
| 55 | |
| 56 | /** |
| 57 | * struct pci_ide_regs - Hardware register association settings for Selective |
| 58 | * IDE Streams |
| 59 | * @rid1: IDE RID Association Register 1 |
| 60 | * @rid2: IDE RID Association Register 2 |
| 61 | * @addr: Up to two address association blocks (IDE Address Association Register |
| 62 | * 1 through 3) for MMIO and prefetchable MMIO |
| 63 | * @nr_addr: Number of address association blocks initialized |
| 64 | * |
| 65 | * See pci_ide_stream_to_regs() |
| 66 | */ |
| 67 | struct pci_ide_regs { |
| 68 | u32 rid1; |
| 69 | u32 rid2; |
| 70 | struct { |
| 71 | u32 assoc1; |
| 72 | u32 assoc2; |
| 73 | u32 assoc3; |
| 74 | } addr[2]; |
| 75 | int nr_addr; |
| 76 | }; |
| 77 | |
| 78 | /** |
| 79 | * struct pci_ide - PCIe Selective IDE Stream descriptor |
| 80 | * @pdev: PCIe Endpoint in the pci_ide_partner pair |
| 81 | * @partner: per-partner settings |
| 82 | * @host_bridge_stream: allocated from host bridge @ide_stream_ida pool |
| 83 | * @stream_id: unique Stream ID (within Partner Port pairing) |
| 84 | * @name: name of the established Selective IDE Stream in sysfs |
| 85 | * |
| 86 | * Negative @stream_id values indicate "uninitialized" on the |
| 87 | * expectation that with TSM established IDE the TSM owns the stream_id |
| 88 | * allocation. |
| 89 | */ |
| 90 | struct pci_ide { |
| 91 | struct pci_dev *pdev; |
| 92 | struct pci_ide_partner partner[PCI_IDE_PARTNER_MAX]; |
| 93 | u8 host_bridge_stream; |
| 94 | int stream_id; |
| 95 | const char *name; |
| 96 | }; |
| 97 | |
| 98 | /* |
| 99 | * Some devices need help with aliased stream-ids even for idle streams. Use |
| 100 | * this id as the "never enabled" place holder. |
| 101 | */ |
| 102 | #define PCI_IDE_RESERVED_STREAM_ID 255 |
| 103 | |
| 104 | void pci_ide_set_nr_streams(struct pci_host_bridge *hb, u16 nr); |
| 105 | struct pci_ide_partner *pci_ide_to_settings(struct pci_dev *pdev, |
| 106 | struct pci_ide *ide); |
| 107 | struct pci_ide *pci_ide_stream_alloc(struct pci_dev *pdev); |
| 108 | void pci_ide_stream_free(struct pci_ide *ide); |
| 109 | int pci_ide_stream_register(struct pci_ide *ide); |
| 110 | void pci_ide_stream_unregister(struct pci_ide *ide); |
| 111 | void pci_ide_stream_setup(struct pci_dev *pdev, struct pci_ide *ide); |
| 112 | void pci_ide_stream_teardown(struct pci_dev *pdev, struct pci_ide *ide); |
| 113 | int pci_ide_stream_enable(struct pci_dev *pdev, struct pci_ide *ide); |
| 114 | void pci_ide_stream_disable(struct pci_dev *pdev, struct pci_ide *ide); |
| 115 | void pci_ide_stream_release(struct pci_ide *ide); |
| 116 | DEFINE_FREE(pci_ide_stream_release, struct pci_ide *, if (_T) pci_ide_stream_release(_T)) |
| 117 | #endif /* __PCI_IDE_H__ */ |
| 118 | |