| 1 | /* SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB */ |
| 2 | /* Copyright (c) 2022, NVIDIA CORPORATION & AFFILIATES. */ |
| 3 | |
| 4 | #ifndef MLX5_MACSEC_H |
| 5 | #define MLX5_MACSEC_H |
| 6 | |
| 7 | #ifdef CONFIG_MLX5_MACSEC |
| 8 | struct mlx5_macsec_event_data { |
| 9 | struct mlx5_macsec_fs *macsec_fs; |
| 10 | void *macdev; |
| 11 | u32 fs_id; |
| 12 | bool is_tx; |
| 13 | }; |
| 14 | |
| 15 | int mlx5_macsec_add_roce_rule(void *macdev, const struct sockaddr *addr, u16 gid_idx, |
| 16 | struct list_head *tx_rules_list, struct list_head *rx_rules_list, |
| 17 | struct mlx5_macsec_fs *macsec_fs); |
| 18 | |
| 19 | void mlx5_macsec_del_roce_rule(u16 gid_idx, struct mlx5_macsec_fs *macsec_fs, |
| 20 | struct list_head *tx_rules_list, struct list_head *rx_rules_list); |
| 21 | |
| 22 | void mlx5_macsec_add_roce_sa_rules(u32 fs_id, const struct sockaddr *addr, u16 gid_idx, |
| 23 | struct list_head *tx_rules_list, |
| 24 | struct list_head *rx_rules_list, |
| 25 | struct mlx5_macsec_fs *macsec_fs, bool is_tx); |
| 26 | |
| 27 | void mlx5_macsec_del_roce_sa_rules(u32 fs_id, struct mlx5_macsec_fs *macsec_fs, |
| 28 | struct list_head *tx_rules_list, |
| 29 | struct list_head *rx_rules_list, bool is_tx); |
| 30 | |
| 31 | #endif |
| 32 | #endif /* MLX5_MACSEC_H */ |
| 33 | |