| 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
|---|
| 2 | /* |
|---|
| 3 | * Register definitions for Rockchip's RK808/RK818 PMIC |
|---|
| 4 | * |
|---|
| 5 | * Copyright (c) 2014, Fuzhou Rockchip Electronics Co., Ltd |
|---|
| 6 | * |
|---|
| 7 | * Author: Chris Zhong <zyw@rock-chips.com> |
|---|
| 8 | * Author: Zhang Qing <zhangqing@rock-chips.com> |
|---|
| 9 | * |
|---|
| 10 | * Copyright (C) 2016 PHYTEC Messtechnik GmbH |
|---|
| 11 | * |
|---|
| 12 | * Author: Wadim Egorov <w.egorov@phytec.de> |
|---|
| 13 | */ |
|---|
| 14 | |
|---|
| 15 | #ifndef __LINUX_REGULATOR_RK808_H |
|---|
| 16 | #define __LINUX_REGULATOR_RK808_H |
|---|
| 17 | |
|---|
| 18 | #include <linux/regulator/machine.h> |
|---|
| 19 | #include <linux/regmap.h> |
|---|
| 20 | |
|---|
| 21 | /* |
|---|
| 22 | * rk808 Global Register Map. |
|---|
| 23 | */ |
|---|
| 24 | |
|---|
| 25 | #define RK808_DCDC1 0 /* (0+RK808_START) */ |
|---|
| 26 | #define RK808_LDO1 4 /* (4+RK808_START) */ |
|---|
| 27 | #define RK808_NUM_REGULATORS 14 |
|---|
| 28 | |
|---|
| 29 | enum rk808_reg { |
|---|
| 30 | RK808_ID_DCDC1, |
|---|
| 31 | RK808_ID_DCDC2, |
|---|
| 32 | RK808_ID_DCDC3, |
|---|
| 33 | RK808_ID_DCDC4, |
|---|
| 34 | RK808_ID_LDO1, |
|---|
| 35 | RK808_ID_LDO2, |
|---|
| 36 | RK808_ID_LDO3, |
|---|
| 37 | RK808_ID_LDO4, |
|---|
| 38 | RK808_ID_LDO5, |
|---|
| 39 | RK808_ID_LDO6, |
|---|
| 40 | RK808_ID_LDO7, |
|---|
| 41 | RK808_ID_LDO8, |
|---|
| 42 | RK808_ID_SWITCH1, |
|---|
| 43 | RK808_ID_SWITCH2, |
|---|
| 44 | }; |
|---|
| 45 | |
|---|
| 46 | #define RK808_SECONDS_REG 0x00 |
|---|
| 47 | #define RK808_MINUTES_REG 0x01 |
|---|
| 48 | #define RK808_HOURS_REG 0x02 |
|---|
| 49 | #define RK808_DAYS_REG 0x03 |
|---|
| 50 | #define RK808_MONTHS_REG 0x04 |
|---|
| 51 | #define RK808_YEARS_REG 0x05 |
|---|
| 52 | #define RK808_WEEKS_REG 0x06 |
|---|
| 53 | #define RK808_ALARM_SECONDS_REG 0x08 |
|---|
| 54 | #define RK808_ALARM_MINUTES_REG 0x09 |
|---|
| 55 | #define RK808_ALARM_HOURS_REG 0x0a |
|---|
| 56 | #define RK808_ALARM_DAYS_REG 0x0b |
|---|
| 57 | #define RK808_ALARM_MONTHS_REG 0x0c |
|---|
| 58 | #define RK808_ALARM_YEARS_REG 0x0d |
|---|
| 59 | #define RK808_RTC_CTRL_REG 0x10 |
|---|
| 60 | #define RK808_RTC_STATUS_REG 0x11 |
|---|
| 61 | #define RK808_RTC_INT_REG 0x12 |
|---|
| 62 | #define RK808_RTC_COMP_LSB_REG 0x13 |
|---|
| 63 | #define RK808_RTC_COMP_MSB_REG 0x14 |
|---|
| 64 | #define RK808_ID_MSB 0x17 |
|---|
| 65 | #define RK808_ID_LSB 0x18 |
|---|
| 66 | #define RK808_CLK32OUT_REG 0x20 |
|---|
| 67 | #define RK808_VB_MON_REG 0x21 |
|---|
| 68 | #define RK808_THERMAL_REG 0x22 |
|---|
| 69 | #define RK808_DCDC_EN_REG 0x23 |
|---|
| 70 | #define RK808_LDO_EN_REG 0x24 |
|---|
| 71 | #define RK808_SLEEP_SET_OFF_REG1 0x25 |
|---|
| 72 | #define RK808_SLEEP_SET_OFF_REG2 0x26 |
|---|
| 73 | #define RK808_DCDC_UV_STS_REG 0x27 |
|---|
| 74 | #define RK808_DCDC_UV_ACT_REG 0x28 |
|---|
| 75 | #define RK808_LDO_UV_STS_REG 0x29 |
|---|
| 76 | #define RK808_LDO_UV_ACT_REG 0x2a |
|---|
| 77 | #define RK808_DCDC_PG_REG 0x2b |
|---|
| 78 | #define RK808_LDO_PG_REG 0x2c |
|---|
| 79 | #define RK808_VOUT_MON_TDB_REG 0x2d |
|---|
| 80 | #define RK808_BUCK1_CONFIG_REG 0x2e |
|---|
| 81 | #define RK808_BUCK1_ON_VSEL_REG 0x2f |
|---|
| 82 | #define RK808_BUCK1_SLP_VSEL_REG 0x30 |
|---|
| 83 | #define RK808_BUCK1_DVS_VSEL_REG 0x31 |
|---|
| 84 | #define RK808_BUCK2_CONFIG_REG 0x32 |
|---|
| 85 | #define RK808_BUCK2_ON_VSEL_REG 0x33 |
|---|
| 86 | #define RK808_BUCK2_SLP_VSEL_REG 0x34 |
|---|
| 87 | #define RK808_BUCK2_DVS_VSEL_REG 0x35 |
|---|
| 88 | #define RK808_BUCK3_CONFIG_REG 0x36 |
|---|
| 89 | #define RK808_BUCK4_CONFIG_REG 0x37 |
|---|
| 90 | #define RK808_BUCK4_ON_VSEL_REG 0x38 |
|---|
| 91 | #define RK808_BUCK4_SLP_VSEL_REG 0x39 |
|---|
| 92 | #define RK808_BOOST_CONFIG_REG 0x3a |
|---|
| 93 | #define RK808_LDO1_ON_VSEL_REG 0x3b |
|---|
| 94 | #define RK808_LDO1_SLP_VSEL_REG 0x3c |
|---|
| 95 | #define RK808_LDO2_ON_VSEL_REG 0x3d |
|---|
| 96 | #define RK808_LDO2_SLP_VSEL_REG 0x3e |
|---|
| 97 | #define RK808_LDO3_ON_VSEL_REG 0x3f |
|---|
| 98 | #define RK808_LDO3_SLP_VSEL_REG 0x40 |
|---|
| 99 | #define RK808_LDO4_ON_VSEL_REG 0x41 |
|---|
| 100 | #define RK808_LDO4_SLP_VSEL_REG 0x42 |
|---|
| 101 | #define RK808_LDO5_ON_VSEL_REG 0x43 |
|---|
| 102 | #define RK808_LDO5_SLP_VSEL_REG 0x44 |
|---|
| 103 | #define RK808_LDO6_ON_VSEL_REG 0x45 |
|---|
| 104 | #define RK808_LDO6_SLP_VSEL_REG 0x46 |
|---|
| 105 | #define RK808_LDO7_ON_VSEL_REG 0x47 |
|---|
| 106 | #define RK808_LDO7_SLP_VSEL_REG 0x48 |
|---|
| 107 | #define RK808_LDO8_ON_VSEL_REG 0x49 |
|---|
| 108 | #define RK808_LDO8_SLP_VSEL_REG 0x4a |
|---|
| 109 | #define RK808_DEVCTRL_REG 0x4b |
|---|
| 110 | #define RK808_INT_STS_REG1 0x4c |
|---|
| 111 | #define RK808_INT_STS_MSK_REG1 0x4d |
|---|
| 112 | #define RK808_INT_STS_REG2 0x4e |
|---|
| 113 | #define RK808_INT_STS_MSK_REG2 0x4f |
|---|
| 114 | #define RK808_IO_POL_REG 0x50 |
|---|
| 115 | |
|---|
| 116 | /* RK816 */ |
|---|
| 117 | enum rk816_reg { |
|---|
| 118 | RK816_ID_DCDC1, |
|---|
| 119 | RK816_ID_DCDC2, |
|---|
| 120 | RK816_ID_DCDC3, |
|---|
| 121 | RK816_ID_DCDC4, |
|---|
| 122 | RK816_ID_LDO1, |
|---|
| 123 | RK816_ID_LDO2, |
|---|
| 124 | RK816_ID_LDO3, |
|---|
| 125 | RK816_ID_LDO4, |
|---|
| 126 | RK816_ID_LDO5, |
|---|
| 127 | RK816_ID_LDO6, |
|---|
| 128 | RK816_ID_BOOST, |
|---|
| 129 | RK816_ID_OTG_SW, |
|---|
| 130 | }; |
|---|
| 131 | |
|---|
| 132 | enum rk816_irqs { |
|---|
| 133 | /* INT_STS_REG1 */ |
|---|
| 134 | RK816_IRQ_PWRON_FALL, |
|---|
| 135 | RK816_IRQ_PWRON_RISE, |
|---|
| 136 | |
|---|
| 137 | /* INT_STS_REG2 */ |
|---|
| 138 | RK816_IRQ_VB_LOW, |
|---|
| 139 | RK816_IRQ_PWRON, |
|---|
| 140 | RK816_IRQ_PWRON_LP, |
|---|
| 141 | RK816_IRQ_HOTDIE, |
|---|
| 142 | RK816_IRQ_RTC_ALARM, |
|---|
| 143 | RK816_IRQ_RTC_PERIOD, |
|---|
| 144 | RK816_IRQ_USB_OV, |
|---|
| 145 | |
|---|
| 146 | /* INT_STS_REG3 */ |
|---|
| 147 | RK816_IRQ_PLUG_IN, |
|---|
| 148 | RK816_IRQ_PLUG_OUT, |
|---|
| 149 | RK816_IRQ_CHG_OK, |
|---|
| 150 | RK816_IRQ_CHG_TE, |
|---|
| 151 | RK816_IRQ_CHG_TS, |
|---|
| 152 | RK816_IRQ_CHG_CVTLIM, |
|---|
| 153 | RK816_IRQ_DISCHG_ILIM, |
|---|
| 154 | }; |
|---|
| 155 | |
|---|
| 156 | /* power channel registers */ |
|---|
| 157 | #define RK816_DCDC_EN_REG1 0x23 |
|---|
| 158 | |
|---|
| 159 | #define RK816_DCDC_EN_REG2 0x24 |
|---|
| 160 | #define RK816_BOOST_EN BIT(1) |
|---|
| 161 | #define RK816_OTG_EN BIT(2) |
|---|
| 162 | #define RK816_BOOST_EN_MSK BIT(5) |
|---|
| 163 | #define RK816_OTG_EN_MSK BIT(6) |
|---|
| 164 | #define RK816_BUCK_DVS_CONFIRM BIT(7) |
|---|
| 165 | |
|---|
| 166 | #define RK816_LDO_EN_REG1 0x27 |
|---|
| 167 | |
|---|
| 168 | #define RK816_LDO_EN_REG2 0x28 |
|---|
| 169 | |
|---|
| 170 | /* interrupt registers and irq definitions */ |
|---|
| 171 | #define RK816_INT_STS_REG1 0x49 |
|---|
| 172 | #define RK816_INT_STS_MSK_REG1 0x4a |
|---|
| 173 | #define RK816_INT_STS_PWRON_FALL BIT(5) |
|---|
| 174 | #define RK816_INT_STS_PWRON_RISE BIT(6) |
|---|
| 175 | |
|---|
| 176 | #define RK816_INT_STS_REG2 0x4c |
|---|
| 177 | #define RK816_INT_STS_MSK_REG2 0x4d |
|---|
| 178 | #define RK816_INT_STS_VB_LOW BIT(1) |
|---|
| 179 | #define RK816_INT_STS_PWRON BIT(2) |
|---|
| 180 | #define RK816_INT_STS_PWRON_LP BIT(3) |
|---|
| 181 | #define RK816_INT_STS_HOTDIE BIT(4) |
|---|
| 182 | #define RK816_INT_STS_RTC_ALARM BIT(5) |
|---|
| 183 | #define RK816_INT_STS_RTC_PERIOD BIT(6) |
|---|
| 184 | #define RK816_INT_STS_USB_OV BIT(7) |
|---|
| 185 | |
|---|
| 186 | #define RK816_INT_STS_REG3 0x4e |
|---|
| 187 | #define RK816_INT_STS_MSK_REG3 0x4f |
|---|
| 188 | #define RK816_INT_STS_PLUG_IN BIT(0) |
|---|
| 189 | #define RK816_INT_STS_PLUG_OUT BIT(1) |
|---|
| 190 | #define RK816_INT_STS_CHG_OK BIT(2) |
|---|
| 191 | #define RK816_INT_STS_CHG_TE BIT(3) |
|---|
| 192 | #define RK816_INT_STS_CHG_TS BIT(4) |
|---|
| 193 | #define RK816_INT_STS_CHG_CVTLIM BIT(6) |
|---|
| 194 | #define RK816_INT_STS_DISCHG_ILIM BIT(7) |
|---|
| 195 | |
|---|
| 196 | #define RK816_IRQ_STS_OFFSET(x) ((x) - RK816_INT_STS_REG1) |
|---|
| 197 | #define RK816_IRQ_MSK_OFFSET(x) ((x) - RK816_INT_STS_MSK_REG1) |
|---|
| 198 | |
|---|
| 199 | /* charger, boost and OTG registers */ |
|---|
| 200 | #define RK816_OTG_BUCK_LDO_CONFIG_REG 0x2a |
|---|
| 201 | #define RK816_CHRG_CONFIG_REG 0x2b |
|---|
| 202 | #define RK816_BOOST_ON_VESL_REG 0x54 |
|---|
| 203 | #define RK816_BOOST_SLP_VSEL_REG 0x55 |
|---|
| 204 | #define RK816_CHRG_BOOST_CONFIG_REG 0x9a |
|---|
| 205 | #define RK816_SUP_STS_REG 0xa0 |
|---|
| 206 | #define RK816_USB_CTRL_REG 0xa1 |
|---|
| 207 | #define RK816_CHRG_CTRL(x) (0xa3 + (x)) |
|---|
| 208 | #define RK816_BAT_CTRL_REG 0xa6 |
|---|
| 209 | #define RK816_BAT_HTS_TS_REG 0xa8 |
|---|
| 210 | #define RK816_BAT_LTS_TS_REG 0xa9 |
|---|
| 211 | |
|---|
| 212 | /* adc and fuel gauge registers */ |
|---|
| 213 | #define RK816_TS_CTRL_REG 0xac |
|---|
| 214 | #define RK816_ADC_CTRL_REG 0xad |
|---|
| 215 | #define RK816_GGCON_REG 0xb0 |
|---|
| 216 | #define RK816_GGSTS_REG 0xb1 |
|---|
| 217 | #define RK816_ZERO_CUR_ADC_REGH 0xb2 |
|---|
| 218 | #define RK816_ZERO_CUR_ADC_REGL 0xb3 |
|---|
| 219 | #define RK816_GASCNT_CAL_REG(x) (0xb7 - (x)) |
|---|
| 220 | #define RK816_GASCNT_REG(x) (0xbb - (x)) |
|---|
| 221 | #define RK816_BAT_CUR_AVG_REGH 0xbc |
|---|
| 222 | #define RK816_BAT_CUR_AVG_REGL 0xbd |
|---|
| 223 | #define RK816_TS_ADC_REGH 0xbe |
|---|
| 224 | #define RK816_TS_ADC_REGL 0xbf |
|---|
| 225 | #define RK816_USB_ADC_REGH 0xc0 |
|---|
| 226 | #define RK816_USB_ADC_REGL 0xc1 |
|---|
| 227 | #define RK816_BAT_OCV_REGH 0xc2 |
|---|
| 228 | #define RK816_BAT_OCV_REGL 0xc3 |
|---|
| 229 | #define RK816_BAT_VOL_REGH 0xc4 |
|---|
| 230 | #define RK816_BAT_VOL_REGL 0xc5 |
|---|
| 231 | #define RK816_RELAX_ENTRY_THRES_REGH 0xc6 |
|---|
| 232 | #define RK816_RELAX_ENTRY_THRES_REGL 0xc7 |
|---|
| 233 | #define RK816_RELAX_EXIT_THRES_REGH 0xc8 |
|---|
| 234 | #define RK816_RELAX_EXIT_THRES_REGL 0xc9 |
|---|
| 235 | #define RK816_RELAX_VOL1_REGH 0xca |
|---|
| 236 | #define RK816_RELAX_VOL1_REGL 0xcb |
|---|
| 237 | #define RK816_RELAX_VOL2_REGH 0xcc |
|---|
| 238 | #define RK816_RELAX_VOL2_REGL 0xcd |
|---|
| 239 | #define RK816_RELAX_CUR1_REGH 0xce |
|---|
| 240 | #define RK816_RELAX_CUR1_REGL 0xcf |
|---|
| 241 | #define RK816_RELAX_CUR2_REGH 0xd0 |
|---|
| 242 | #define RK816_RELAX_CUR2_REGL 0xd1 |
|---|
| 243 | #define RK816_CAL_OFFSET_REGH 0xd2 |
|---|
| 244 | #define RK816_CAL_OFFSET_REGL 0xd3 |
|---|
| 245 | #define RK816_NON_ACT_TIMER_CNT_REG 0xd4 |
|---|
| 246 | #define RK816_VCALIB0_REGH 0xd5 |
|---|
| 247 | #define RK816_VCALIB0_REGL 0xd6 |
|---|
| 248 | #define RK816_VCALIB1_REGH 0xd7 |
|---|
| 249 | #define RK816_VCALIB1_REGL 0xd8 |
|---|
| 250 | #define RK816_FCC_GASCNT_REG(x) (0xdc - (x)) |
|---|
| 251 | #define RK816_IOFFSET_REGH 0xdd |
|---|
| 252 | #define RK816_IOFFSET_REGL 0xde |
|---|
| 253 | #define RK816_SLEEP_CON_SAMP_CUR_REG 0xdf |
|---|
| 254 | |
|---|
| 255 | /* general purpose data registers 0xe0 ~ 0xf2 */ |
|---|
| 256 | #define RK816_DATA_REG(x) (0xe0 + (x)) |
|---|
| 257 | |
|---|
| 258 | /* RK818 */ |
|---|
| 259 | #define RK818_DCDC1 0 |
|---|
| 260 | #define RK818_LDO1 4 |
|---|
| 261 | #define RK818_NUM_REGULATORS 17 |
|---|
| 262 | |
|---|
| 263 | enum rk818_reg { |
|---|
| 264 | RK818_ID_DCDC1, |
|---|
| 265 | RK818_ID_DCDC2, |
|---|
| 266 | RK818_ID_DCDC3, |
|---|
| 267 | RK818_ID_DCDC4, |
|---|
| 268 | RK818_ID_BOOST, |
|---|
| 269 | RK818_ID_LDO1, |
|---|
| 270 | RK818_ID_LDO2, |
|---|
| 271 | RK818_ID_LDO3, |
|---|
| 272 | RK818_ID_LDO4, |
|---|
| 273 | RK818_ID_LDO5, |
|---|
| 274 | RK818_ID_LDO6, |
|---|
| 275 | RK818_ID_LDO7, |
|---|
| 276 | RK818_ID_LDO8, |
|---|
| 277 | RK818_ID_LDO9, |
|---|
| 278 | RK818_ID_SWITCH, |
|---|
| 279 | RK818_ID_HDMI_SWITCH, |
|---|
| 280 | RK818_ID_OTG_SWITCH, |
|---|
| 281 | }; |
|---|
| 282 | |
|---|
| 283 | #define RK818_DCDC_EN_REG 0x23 |
|---|
| 284 | #define RK818_LDO_EN_REG 0x24 |
|---|
| 285 | #define RK818_SLEEP_SET_OFF_REG1 0x25 |
|---|
| 286 | #define RK818_SLEEP_SET_OFF_REG2 0x26 |
|---|
| 287 | #define RK818_DCDC_UV_STS_REG 0x27 |
|---|
| 288 | #define RK818_DCDC_UV_ACT_REG 0x28 |
|---|
| 289 | #define RK818_LDO_UV_STS_REG 0x29 |
|---|
| 290 | #define RK818_LDO_UV_ACT_REG 0x2a |
|---|
| 291 | #define RK818_DCDC_PG_REG 0x2b |
|---|
| 292 | #define RK818_LDO_PG_REG 0x2c |
|---|
| 293 | #define RK818_VOUT_MON_TDB_REG 0x2d |
|---|
| 294 | #define RK818_BUCK1_CONFIG_REG 0x2e |
|---|
| 295 | #define RK818_BUCK1_ON_VSEL_REG 0x2f |
|---|
| 296 | #define RK818_BUCK1_SLP_VSEL_REG 0x30 |
|---|
| 297 | #define RK818_BUCK2_CONFIG_REG 0x32 |
|---|
| 298 | #define RK818_BUCK2_ON_VSEL_REG 0x33 |
|---|
| 299 | #define RK818_BUCK2_SLP_VSEL_REG 0x34 |
|---|
| 300 | #define RK818_BUCK3_CONFIG_REG 0x36 |
|---|
| 301 | #define RK818_BUCK4_CONFIG_REG 0x37 |
|---|
| 302 | #define RK818_BUCK4_ON_VSEL_REG 0x38 |
|---|
| 303 | #define RK818_BUCK4_SLP_VSEL_REG 0x39 |
|---|
| 304 | #define RK818_BOOST_CONFIG_REG 0x3a |
|---|
| 305 | #define RK818_LDO1_ON_VSEL_REG 0x3b |
|---|
| 306 | #define RK818_LDO1_SLP_VSEL_REG 0x3c |
|---|
| 307 | #define RK818_LDO2_ON_VSEL_REG 0x3d |
|---|
| 308 | #define RK818_LDO2_SLP_VSEL_REG 0x3e |
|---|
| 309 | #define RK818_LDO3_ON_VSEL_REG 0x3f |
|---|
| 310 | #define RK818_LDO3_SLP_VSEL_REG 0x40 |
|---|
| 311 | #define RK818_LDO4_ON_VSEL_REG 0x41 |
|---|
| 312 | #define RK818_LDO4_SLP_VSEL_REG 0x42 |
|---|
| 313 | #define RK818_LDO5_ON_VSEL_REG 0x43 |
|---|
| 314 | #define RK818_LDO5_SLP_VSEL_REG 0x44 |
|---|
| 315 | #define RK818_LDO6_ON_VSEL_REG 0x45 |
|---|
| 316 | #define RK818_LDO6_SLP_VSEL_REG 0x46 |
|---|
| 317 | #define RK818_LDO7_ON_VSEL_REG 0x47 |
|---|
| 318 | #define RK818_LDO7_SLP_VSEL_REG 0x48 |
|---|
| 319 | #define RK818_LDO8_ON_VSEL_REG 0x49 |
|---|
| 320 | #define RK818_LDO8_SLP_VSEL_REG 0x4a |
|---|
| 321 | #define RK818_BOOST_LDO9_ON_VSEL_REG 0x54 |
|---|
| 322 | #define RK818_BOOST_LDO9_SLP_VSEL_REG 0x55 |
|---|
| 323 | #define RK818_DEVCTRL_REG 0x4b |
|---|
| 324 | #define RK818_INT_STS_REG1 0X4c |
|---|
| 325 | #define RK818_INT_STS_MSK_REG1 0x4d |
|---|
| 326 | #define RK818_INT_STS_REG2 0x4e |
|---|
| 327 | #define RK818_INT_STS_MSK_REG2 0x4f |
|---|
| 328 | #define RK818_IO_POL_REG 0x50 |
|---|
| 329 | #define RK818_H5V_EN_REG 0x52 |
|---|
| 330 | #define RK818_SLEEP_SET_OFF_REG3 0x53 |
|---|
| 331 | #define RK818_BOOST_LDO9_ON_VSEL_REG 0x54 |
|---|
| 332 | #define RK818_BOOST_LDO9_SLP_VSEL_REG 0x55 |
|---|
| 333 | #define RK818_BOOST_CTRL_REG 0x56 |
|---|
| 334 | #define RK818_DCDC_ILMAX 0x90 |
|---|
| 335 | #define RK818_USB_CTRL_REG 0xa1 |
|---|
| 336 | |
|---|
| 337 | #define RK818_H5V_EN BIT(0) |
|---|
| 338 | #define RK818_REF_RDY_CTRL BIT(1) |
|---|
| 339 | #define RK818_USB_ILIM_SEL_MASK 0xf |
|---|
| 340 | #define RK818_USB_ILMIN_2000MA 0x7 |
|---|
| 341 | #define RK818_USB_CHG_SD_VSEL_MASK 0x70 |
|---|
| 342 | |
|---|
| 343 | /* RK805 */ |
|---|
| 344 | enum rk805_reg { |
|---|
| 345 | RK805_ID_DCDC1, |
|---|
| 346 | RK805_ID_DCDC2, |
|---|
| 347 | RK805_ID_DCDC3, |
|---|
| 348 | RK805_ID_DCDC4, |
|---|
| 349 | RK805_ID_LDO1, |
|---|
| 350 | RK805_ID_LDO2, |
|---|
| 351 | RK805_ID_LDO3, |
|---|
| 352 | }; |
|---|
| 353 | |
|---|
| 354 | /* CONFIG REGISTER */ |
|---|
| 355 | #define RK805_VB_MON_REG 0x21 |
|---|
| 356 | #define RK805_THERMAL_REG 0x22 |
|---|
| 357 | |
|---|
| 358 | /* POWER CHANNELS ENABLE REGISTER */ |
|---|
| 359 | #define RK805_DCDC_EN_REG 0x23 |
|---|
| 360 | #define RK805_SLP_DCDC_EN_REG 0x25 |
|---|
| 361 | #define RK805_SLP_LDO_EN_REG 0x26 |
|---|
| 362 | #define RK805_LDO_EN_REG 0x27 |
|---|
| 363 | |
|---|
| 364 | /* BUCK AND LDO CONFIG REGISTER */ |
|---|
| 365 | #define RK805_BUCK_LDO_SLP_LP_EN_REG 0x2A |
|---|
| 366 | #define RK805_BUCK1_CONFIG_REG 0x2E |
|---|
| 367 | #define RK805_BUCK1_ON_VSEL_REG 0x2F |
|---|
| 368 | #define RK805_BUCK1_SLP_VSEL_REG 0x30 |
|---|
| 369 | #define RK805_BUCK2_CONFIG_REG 0x32 |
|---|
| 370 | #define RK805_BUCK2_ON_VSEL_REG 0x33 |
|---|
| 371 | #define RK805_BUCK2_SLP_VSEL_REG 0x34 |
|---|
| 372 | #define RK805_BUCK3_CONFIG_REG 0x36 |
|---|
| 373 | #define RK805_BUCK4_CONFIG_REG 0x37 |
|---|
| 374 | #define RK805_BUCK4_ON_VSEL_REG 0x38 |
|---|
| 375 | #define RK805_BUCK4_SLP_VSEL_REG 0x39 |
|---|
| 376 | #define RK805_LDO1_ON_VSEL_REG 0x3B |
|---|
| 377 | #define RK805_LDO1_SLP_VSEL_REG 0x3C |
|---|
| 378 | #define RK805_LDO2_ON_VSEL_REG 0x3D |
|---|
| 379 | #define RK805_LDO2_SLP_VSEL_REG 0x3E |
|---|
| 380 | #define RK805_LDO3_ON_VSEL_REG 0x3F |
|---|
| 381 | #define RK805_LDO3_SLP_VSEL_REG 0x40 |
|---|
| 382 | |
|---|
| 383 | /* INTERRUPT REGISTER */ |
|---|
| 384 | #define RK805_PWRON_LP_INT_TIME_REG 0x47 |
|---|
| 385 | #define RK805_PWRON_DB_REG 0x48 |
|---|
| 386 | #define RK805_DEV_CTRL_REG 0x4B |
|---|
| 387 | #define RK805_INT_STS_REG 0x4C |
|---|
| 388 | #define RK805_INT_STS_MSK_REG 0x4D |
|---|
| 389 | #define RK805_GPIO_IO_POL_REG 0x50 |
|---|
| 390 | #define RK805_OUT_REG 0x52 |
|---|
| 391 | #define RK805_ON_SOURCE_REG 0xAE |
|---|
| 392 | #define RK805_OFF_SOURCE_REG 0xAF |
|---|
| 393 | |
|---|
| 394 | #define RK805_NUM_REGULATORS 7 |
|---|
| 395 | |
|---|
| 396 | #define RK805_PWRON_FALL_RISE_INT_EN 0x0 |
|---|
| 397 | #define RK805_PWRON_FALL_RISE_INT_MSK 0x81 |
|---|
| 398 | |
|---|
| 399 | /* RK805 IRQ Definitions */ |
|---|
| 400 | #define RK805_IRQ_PWRON_RISE 0 |
|---|
| 401 | #define RK805_IRQ_VB_LOW 1 |
|---|
| 402 | #define RK805_IRQ_PWRON 2 |
|---|
| 403 | #define RK805_IRQ_PWRON_LP 3 |
|---|
| 404 | #define RK805_IRQ_HOTDIE 4 |
|---|
| 405 | #define RK805_IRQ_RTC_ALARM 5 |
|---|
| 406 | #define RK805_IRQ_RTC_PERIOD 6 |
|---|
| 407 | #define RK805_IRQ_PWRON_FALL 7 |
|---|
| 408 | |
|---|
| 409 | #define RK805_IRQ_PWRON_RISE_MSK BIT(0) |
|---|
| 410 | #define RK805_IRQ_VB_LOW_MSK BIT(1) |
|---|
| 411 | #define RK805_IRQ_PWRON_MSK BIT(2) |
|---|
| 412 | #define RK805_IRQ_PWRON_LP_MSK BIT(3) |
|---|
| 413 | #define RK805_IRQ_HOTDIE_MSK BIT(4) |
|---|
| 414 | #define RK805_IRQ_RTC_ALARM_MSK BIT(5) |
|---|
| 415 | #define RK805_IRQ_RTC_PERIOD_MSK BIT(6) |
|---|
| 416 | #define RK805_IRQ_PWRON_FALL_MSK BIT(7) |
|---|
| 417 | |
|---|
| 418 | #define RK805_PWR_RISE_INT_STATUS BIT(0) |
|---|
| 419 | #define RK805_VB_LOW_INT_STATUS BIT(1) |
|---|
| 420 | #define RK805_PWRON_INT_STATUS BIT(2) |
|---|
| 421 | #define RK805_PWRON_LP_INT_STATUS BIT(3) |
|---|
| 422 | #define RK805_HOTDIE_INT_STATUS BIT(4) |
|---|
| 423 | #define RK805_ALARM_INT_STATUS BIT(5) |
|---|
| 424 | #define RK805_PERIOD_INT_STATUS BIT(6) |
|---|
| 425 | #define RK805_PWR_FALL_INT_STATUS BIT(7) |
|---|
| 426 | |
|---|
| 427 | #define RK805_BUCK1_2_ILMAX_MASK (3 << 6) |
|---|
| 428 | #define RK805_BUCK3_4_ILMAX_MASK (3 << 3) |
|---|
| 429 | #define RK805_RTC_PERIOD_INT_MASK (1 << 6) |
|---|
| 430 | #define RK805_RTC_ALARM_INT_MASK (1 << 5) |
|---|
| 431 | #define RK805_INT_ALARM_EN (1 << 3) |
|---|
| 432 | #define RK805_INT_TIMER_EN (1 << 2) |
|---|
| 433 | |
|---|
| 434 | /* RK806 */ |
|---|
| 435 | #define RK806_POWER_EN0 0x0 |
|---|
| 436 | #define RK806_POWER_EN1 0x1 |
|---|
| 437 | #define RK806_POWER_EN2 0x2 |
|---|
| 438 | #define RK806_POWER_EN3 0x3 |
|---|
| 439 | #define RK806_POWER_EN4 0x4 |
|---|
| 440 | #define RK806_POWER_EN5 0x5 |
|---|
| 441 | #define RK806_POWER_SLP_EN0 0x6 |
|---|
| 442 | #define RK806_POWER_SLP_EN1 0x7 |
|---|
| 443 | #define RK806_POWER_SLP_EN2 0x8 |
|---|
| 444 | #define RK806_POWER_DISCHRG_EN0 0x9 |
|---|
| 445 | #define RK806_POWER_DISCHRG_EN1 0xA |
|---|
| 446 | #define RK806_POWER_DISCHRG_EN2 0xB |
|---|
| 447 | #define RK806_BUCK_FB_CONFIG 0xC |
|---|
| 448 | #define RK806_SLP_LP_CONFIG 0xD |
|---|
| 449 | #define RK806_POWER_FPWM_EN0 0xE |
|---|
| 450 | #define RK806_POWER_FPWM_EN1 0xF |
|---|
| 451 | #define RK806_BUCK1_CONFIG 0x10 |
|---|
| 452 | #define RK806_BUCK2_CONFIG 0x11 |
|---|
| 453 | #define RK806_BUCK3_CONFIG 0x12 |
|---|
| 454 | #define RK806_BUCK4_CONFIG 0x13 |
|---|
| 455 | #define RK806_BUCK5_CONFIG 0x14 |
|---|
| 456 | #define RK806_BUCK6_CONFIG 0x15 |
|---|
| 457 | #define RK806_BUCK7_CONFIG 0x16 |
|---|
| 458 | #define RK806_BUCK8_CONFIG 0x17 |
|---|
| 459 | #define RK806_BUCK9_CONFIG 0x18 |
|---|
| 460 | #define RK806_BUCK10_CONFIG 0x19 |
|---|
| 461 | #define RK806_BUCK1_ON_VSEL 0x1A |
|---|
| 462 | #define RK806_BUCK2_ON_VSEL 0x1B |
|---|
| 463 | #define RK806_BUCK3_ON_VSEL 0x1C |
|---|
| 464 | #define RK806_BUCK4_ON_VSEL 0x1D |
|---|
| 465 | #define RK806_BUCK5_ON_VSEL 0x1E |
|---|
| 466 | #define RK806_BUCK6_ON_VSEL 0x1F |
|---|
| 467 | #define RK806_BUCK7_ON_VSEL 0x20 |
|---|
| 468 | #define RK806_BUCK8_ON_VSEL 0x21 |
|---|
| 469 | #define RK806_BUCK9_ON_VSEL 0x22 |
|---|
| 470 | #define RK806_BUCK10_ON_VSEL 0x23 |
|---|
| 471 | #define RK806_BUCK1_SLP_VSEL 0x24 |
|---|
| 472 | #define RK806_BUCK2_SLP_VSEL 0x25 |
|---|
| 473 | #define RK806_BUCK3_SLP_VSEL 0x26 |
|---|
| 474 | #define RK806_BUCK4_SLP_VSEL 0x27 |
|---|
| 475 | #define RK806_BUCK5_SLP_VSEL 0x28 |
|---|
| 476 | #define RK806_BUCK6_SLP_VSEL 0x29 |
|---|
| 477 | #define RK806_BUCK7_SLP_VSEL 0x2A |
|---|
| 478 | #define RK806_BUCK8_SLP_VSEL 0x2B |
|---|
| 479 | #define RK806_BUCK9_SLP_VSEL 0x2D |
|---|
| 480 | #define RK806_BUCK10_SLP_VSEL 0x2E |
|---|
| 481 | #define RK806_BUCK_DEBUG1 0x30 |
|---|
| 482 | #define RK806_BUCK_DEBUG2 0x31 |
|---|
| 483 | #define RK806_BUCK_DEBUG3 0x32 |
|---|
| 484 | #define RK806_BUCK_DEBUG4 0x33 |
|---|
| 485 | #define RK806_BUCK_DEBUG5 0x34 |
|---|
| 486 | #define RK806_BUCK_DEBUG6 0x35 |
|---|
| 487 | #define RK806_BUCK_DEBUG7 0x36 |
|---|
| 488 | #define RK806_BUCK_DEBUG8 0x37 |
|---|
| 489 | #define RK806_BUCK_DEBUG9 0x38 |
|---|
| 490 | #define RK806_BUCK_DEBUG10 0x39 |
|---|
| 491 | #define RK806_BUCK_DEBUG11 0x3A |
|---|
| 492 | #define RK806_BUCK_DEBUG12 0x3B |
|---|
| 493 | #define RK806_BUCK_DEBUG13 0x3C |
|---|
| 494 | #define RK806_BUCK_DEBUG14 0x3D |
|---|
| 495 | #define RK806_BUCK_DEBUG15 0x3E |
|---|
| 496 | #define RK806_BUCK_DEBUG16 0x3F |
|---|
| 497 | #define RK806_BUCK_DEBUG17 0x40 |
|---|
| 498 | #define RK806_BUCK_DEBUG18 0x41 |
|---|
| 499 | #define RK806_NLDO_IMAX 0x42 |
|---|
| 500 | #define RK806_NLDO1_ON_VSEL 0x43 |
|---|
| 501 | #define RK806_NLDO2_ON_VSEL 0x44 |
|---|
| 502 | #define RK806_NLDO3_ON_VSEL 0x45 |
|---|
| 503 | #define RK806_NLDO4_ON_VSEL 0x46 |
|---|
| 504 | #define RK806_NLDO5_ON_VSEL 0x47 |
|---|
| 505 | #define RK806_NLDO1_SLP_VSEL 0x48 |
|---|
| 506 | #define RK806_NLDO2_SLP_VSEL 0x49 |
|---|
| 507 | #define RK806_NLDO3_SLP_VSEL 0x4A |
|---|
| 508 | #define RK806_NLDO4_SLP_VSEL 0x4B |
|---|
| 509 | #define RK806_NLDO5_SLP_VSEL 0x4C |
|---|
| 510 | #define RK806_PLDO_IMAX 0x4D |
|---|
| 511 | #define RK806_PLDO1_ON_VSEL 0x4E |
|---|
| 512 | #define RK806_PLDO2_ON_VSEL 0x4F |
|---|
| 513 | #define RK806_PLDO3_ON_VSEL 0x50 |
|---|
| 514 | #define RK806_PLDO4_ON_VSEL 0x51 |
|---|
| 515 | #define RK806_PLDO5_ON_VSEL 0x52 |
|---|
| 516 | #define RK806_PLDO6_ON_VSEL 0x53 |
|---|
| 517 | #define RK806_PLDO1_SLP_VSEL 0x54 |
|---|
| 518 | #define RK806_PLDO2_SLP_VSEL 0x55 |
|---|
| 519 | #define RK806_PLDO3_SLP_VSEL 0x56 |
|---|
| 520 | #define RK806_PLDO4_SLP_VSEL 0x57 |
|---|
| 521 | #define RK806_PLDO5_SLP_VSEL 0x58 |
|---|
| 522 | #define RK806_PLDO6_SLP_VSEL 0x59 |
|---|
| 523 | #define RK806_CHIP_NAME 0x5A |
|---|
| 524 | #define RK806_CHIP_VER 0x5B |
|---|
| 525 | #define RK806_OTP_VER 0x5C |
|---|
| 526 | #define RK806_SYS_STS 0x5D |
|---|
| 527 | #define RK806_SYS_CFG0 0x5E |
|---|
| 528 | #define RK806_SYS_CFG1 0x5F |
|---|
| 529 | #define RK806_SYS_OPTION 0x61 |
|---|
| 530 | #define RK806_SLEEP_CONFIG0 0x62 |
|---|
| 531 | #define RK806_SLEEP_CONFIG1 0x63 |
|---|
| 532 | #define RK806_SLEEP_CTR_SEL0 0x64 |
|---|
| 533 | #define RK806_SLEEP_CTR_SEL1 0x65 |
|---|
| 534 | #define RK806_SLEEP_CTR_SEL2 0x66 |
|---|
| 535 | #define RK806_SLEEP_CTR_SEL3 0x67 |
|---|
| 536 | #define RK806_SLEEP_CTR_SEL4 0x68 |
|---|
| 537 | #define RK806_SLEEP_CTR_SEL5 0x69 |
|---|
| 538 | #define RK806_DVS_CTRL_SEL0 0x6A |
|---|
| 539 | #define RK806_DVS_CTRL_SEL1 0x6B |
|---|
| 540 | #define RK806_DVS_CTRL_SEL2 0x6C |
|---|
| 541 | #define RK806_DVS_CTRL_SEL3 0x6D |
|---|
| 542 | #define RK806_DVS_CTRL_SEL4 0x6E |
|---|
| 543 | #define RK806_DVS_CTRL_SEL5 0x6F |
|---|
| 544 | #define RK806_DVS_START_CTRL 0x70 |
|---|
| 545 | #define RK806_SLEEP_GPIO 0x71 |
|---|
| 546 | #define RK806_SYS_CFG3 0x72 |
|---|
| 547 | #define RK806_ON_SOURCE 0x74 |
|---|
| 548 | #define RK806_OFF_SOURCE 0x75 |
|---|
| 549 | #define RK806_PWRON_KEY 0x76 |
|---|
| 550 | #define RK806_INT_STS0 0x77 |
|---|
| 551 | #define RK806_INT_MSK0 0x78 |
|---|
| 552 | #define RK806_INT_STS1 0x79 |
|---|
| 553 | #define RK806_INT_MSK1 0x7A |
|---|
| 554 | #define RK806_GPIO_INT_CONFIG 0x7B |
|---|
| 555 | #define RK806_DATA_REG0 0x7C |
|---|
| 556 | #define RK806_DATA_REG1 0x7D |
|---|
| 557 | #define RK806_DATA_REG2 0x7E |
|---|
| 558 | #define RK806_DATA_REG3 0x7F |
|---|
| 559 | #define RK806_DATA_REG4 0x80 |
|---|
| 560 | #define RK806_DATA_REG5 0x81 |
|---|
| 561 | #define RK806_DATA_REG6 0x82 |
|---|
| 562 | #define RK806_DATA_REG7 0x83 |
|---|
| 563 | #define RK806_DATA_REG8 0x84 |
|---|
| 564 | #define RK806_DATA_REG9 0x85 |
|---|
| 565 | #define RK806_DATA_REG10 0x86 |
|---|
| 566 | #define RK806_DATA_REG11 0x87 |
|---|
| 567 | #define RK806_DATA_REG12 0x88 |
|---|
| 568 | #define RK806_DATA_REG13 0x89 |
|---|
| 569 | #define RK806_DATA_REG14 0x8A |
|---|
| 570 | #define RK806_DATA_REG15 0x8B |
|---|
| 571 | #define RK806_TM_REG 0x8C |
|---|
| 572 | #define RK806_OTP_EN_REG 0x8D |
|---|
| 573 | #define RK806_FUNC_OTP_EN_REG 0x8E |
|---|
| 574 | #define RK806_TEST_REG1 0x8F |
|---|
| 575 | #define RK806_TEST_REG2 0x90 |
|---|
| 576 | #define RK806_TEST_REG3 0x91 |
|---|
| 577 | #define RK806_TEST_REG4 0x92 |
|---|
| 578 | #define RK806_TEST_REG5 0x93 |
|---|
| 579 | #define RK806_BUCK_VSEL_OTP_REG0 0x94 |
|---|
| 580 | #define RK806_BUCK_VSEL_OTP_REG1 0x95 |
|---|
| 581 | #define RK806_BUCK_VSEL_OTP_REG2 0x96 |
|---|
| 582 | #define RK806_BUCK_VSEL_OTP_REG3 0x97 |
|---|
| 583 | #define RK806_BUCK_VSEL_OTP_REG4 0x98 |
|---|
| 584 | #define RK806_BUCK_VSEL_OTP_REG5 0x99 |
|---|
| 585 | #define RK806_BUCK_VSEL_OTP_REG6 0x9A |
|---|
| 586 | #define RK806_BUCK_VSEL_OTP_REG7 0x9B |
|---|
| 587 | #define RK806_BUCK_VSEL_OTP_REG8 0x9C |
|---|
| 588 | #define RK806_BUCK_VSEL_OTP_REG9 0x9D |
|---|
| 589 | #define RK806_NLDO1_VSEL_OTP_REG0 0x9E |
|---|
| 590 | #define RK806_NLDO1_VSEL_OTP_REG1 0x9F |
|---|
| 591 | #define RK806_NLDO1_VSEL_OTP_REG2 0xA0 |
|---|
| 592 | #define RK806_NLDO1_VSEL_OTP_REG3 0xA1 |
|---|
| 593 | #define RK806_NLDO1_VSEL_OTP_REG4 0xA2 |
|---|
| 594 | #define RK806_PLDO_VSEL_OTP_REG0 0xA3 |
|---|
| 595 | #define RK806_PLDO_VSEL_OTP_REG1 0xA4 |
|---|
| 596 | #define RK806_PLDO_VSEL_OTP_REG2 0xA5 |
|---|
| 597 | #define RK806_PLDO_VSEL_OTP_REG3 0xA6 |
|---|
| 598 | #define RK806_PLDO_VSEL_OTP_REG4 0xA7 |
|---|
| 599 | #define RK806_PLDO_VSEL_OTP_REG5 0xA8 |
|---|
| 600 | #define RK806_BUCK_EN_OTP_REG1 0xA9 |
|---|
| 601 | #define RK806_NLDO_EN_OTP_REG1 0xAA |
|---|
| 602 | #define RK806_PLDO_EN_OTP_REG1 0xAB |
|---|
| 603 | #define RK806_BUCK_FB_RES_OTP_REG1 0xAC |
|---|
| 604 | #define RK806_OTP_RESEV_REG0 0xAD |
|---|
| 605 | #define RK806_OTP_RESEV_REG1 0xAE |
|---|
| 606 | #define RK806_OTP_RESEV_REG2 0xAF |
|---|
| 607 | #define RK806_OTP_RESEV_REG3 0xB0 |
|---|
| 608 | #define RK806_OTP_RESEV_REG4 0xB1 |
|---|
| 609 | #define RK806_BUCK_SEQ_REG0 0xB2 |
|---|
| 610 | #define RK806_BUCK_SEQ_REG1 0xB3 |
|---|
| 611 | #define RK806_BUCK_SEQ_REG2 0xB4 |
|---|
| 612 | #define RK806_BUCK_SEQ_REG3 0xB5 |
|---|
| 613 | #define RK806_BUCK_SEQ_REG4 0xB6 |
|---|
| 614 | #define RK806_BUCK_SEQ_REG5 0xB7 |
|---|
| 615 | #define RK806_BUCK_SEQ_REG6 0xB8 |
|---|
| 616 | #define RK806_BUCK_SEQ_REG7 0xB9 |
|---|
| 617 | #define RK806_BUCK_SEQ_REG8 0xBA |
|---|
| 618 | #define RK806_BUCK_SEQ_REG9 0xBB |
|---|
| 619 | #define RK806_BUCK_SEQ_REG10 0xBC |
|---|
| 620 | #define RK806_BUCK_SEQ_REG11 0xBD |
|---|
| 621 | #define RK806_BUCK_SEQ_REG12 0xBE |
|---|
| 622 | #define RK806_BUCK_SEQ_REG13 0xBF |
|---|
| 623 | #define RK806_BUCK_SEQ_REG14 0xC0 |
|---|
| 624 | #define RK806_BUCK_SEQ_REG15 0xC1 |
|---|
| 625 | #define RK806_BUCK_SEQ_REG16 0xC2 |
|---|
| 626 | #define RK806_BUCK_SEQ_REG17 0xC3 |
|---|
| 627 | #define RK806_HK_TRIM_REG1 0xC4 |
|---|
| 628 | #define RK806_HK_TRIM_REG2 0xC5 |
|---|
| 629 | #define RK806_BUCK_REF_TRIM_REG1 0xC6 |
|---|
| 630 | #define RK806_BUCK_REF_TRIM_REG2 0xC7 |
|---|
| 631 | #define RK806_BUCK_REF_TRIM_REG3 0xC8 |
|---|
| 632 | #define RK806_BUCK_REF_TRIM_REG4 0xC9 |
|---|
| 633 | #define RK806_BUCK_REF_TRIM_REG5 0xCA |
|---|
| 634 | #define RK806_BUCK_OSC_TRIM_REG1 0xCB |
|---|
| 635 | #define RK806_BUCK_OSC_TRIM_REG2 0xCC |
|---|
| 636 | #define RK806_BUCK_OSC_TRIM_REG3 0xCD |
|---|
| 637 | #define RK806_BUCK_OSC_TRIM_REG4 0xCE |
|---|
| 638 | #define RK806_BUCK_OSC_TRIM_REG5 0xCF |
|---|
| 639 | #define RK806_BUCK_TRIM_ZCDIOS_REG1 0xD0 |
|---|
| 640 | #define RK806_BUCK_TRIM_ZCDIOS_REG2 0xD1 |
|---|
| 641 | #define RK806_NLDO_TRIM_REG1 0xD2 |
|---|
| 642 | #define RK806_NLDO_TRIM_REG2 0xD3 |
|---|
| 643 | #define RK806_NLDO_TRIM_REG3 0xD4 |
|---|
| 644 | #define RK806_PLDO_TRIM_REG1 0xD5 |
|---|
| 645 | #define RK806_PLDO_TRIM_REG2 0xD6 |
|---|
| 646 | #define RK806_PLDO_TRIM_REG3 0xD7 |
|---|
| 647 | #define RK806_TRIM_ICOMP_REG1 0xD8 |
|---|
| 648 | #define RK806_TRIM_ICOMP_REG2 0xD9 |
|---|
| 649 | #define RK806_EFUSE_CONTROL_REGH 0xDA |
|---|
| 650 | #define RK806_FUSE_PROG_REG 0xDB |
|---|
| 651 | #define RK806_MAIN_FSM_STS_REG 0xDD |
|---|
| 652 | #define RK806_FSM_REG 0xDE |
|---|
| 653 | #define RK806_TOP_RESEV_OFFR 0xEC |
|---|
| 654 | #define RK806_TOP_RESEV_POR 0xED |
|---|
| 655 | #define RK806_BUCK_VRSN_REG1 0xEE |
|---|
| 656 | #define RK806_BUCK_VRSN_REG2 0xEF |
|---|
| 657 | #define RK806_NLDO_RLOAD_SEL_REG1 0xF0 |
|---|
| 658 | #define RK806_PLDO_RLOAD_SEL_REG1 0xF1 |
|---|
| 659 | #define RK806_PLDO_RLOAD_SEL_REG2 0xF2 |
|---|
| 660 | #define RK806_BUCK_CMIN_MX_REG1 0xF3 |
|---|
| 661 | #define RK806_BUCK_CMIN_MX_REG2 0xF4 |
|---|
| 662 | #define RK806_BUCK_FREQ_SET_REG1 0xF5 |
|---|
| 663 | #define RK806_BUCK_FREQ_SET_REG2 0xF6 |
|---|
| 664 | #define RK806_BUCK_RS_MEABS_REG1 0xF7 |
|---|
| 665 | #define RK806_BUCK_RS_MEABS_REG2 0xF8 |
|---|
| 666 | #define RK806_BUCK_RS_ZDLEB_REG1 0xF9 |
|---|
| 667 | #define RK806_BUCK_RS_ZDLEB_REG2 0xFA |
|---|
| 668 | #define RK806_BUCK_RSERVE_REG1 0xFB |
|---|
| 669 | #define RK806_BUCK_RSERVE_REG2 0xFC |
|---|
| 670 | #define RK806_BUCK_RSERVE_REG3 0xFD |
|---|
| 671 | #define RK806_BUCK_RSERVE_REG4 0xFE |
|---|
| 672 | #define RK806_BUCK_RSERVE_REG5 0xFF |
|---|
| 673 | |
|---|
| 674 | /* INT_STS Register field definitions */ |
|---|
| 675 | #define RK806_INT_STS_PWRON_FALL BIT(0) |
|---|
| 676 | #define RK806_INT_STS_PWRON_RISE BIT(1) |
|---|
| 677 | #define RK806_INT_STS_PWRON BIT(2) |
|---|
| 678 | #define RK806_INT_STS_PWRON_LP BIT(3) |
|---|
| 679 | #define RK806_INT_STS_HOTDIE BIT(4) |
|---|
| 680 | #define RK806_INT_STS_VDC_RISE BIT(5) |
|---|
| 681 | #define RK806_INT_STS_VDC_FALL BIT(6) |
|---|
| 682 | #define RK806_INT_STS_VB_LO BIT(7) |
|---|
| 683 | #define RK806_INT_STS_REV0 BIT(0) |
|---|
| 684 | #define RK806_INT_STS_REV1 BIT(1) |
|---|
| 685 | #define RK806_INT_STS_REV2 BIT(2) |
|---|
| 686 | #define RK806_INT_STS_CRC_ERROR BIT(3) |
|---|
| 687 | #define RK806_INT_STS_SLP3_GPIO BIT(4) |
|---|
| 688 | #define RK806_INT_STS_SLP2_GPIO BIT(5) |
|---|
| 689 | #define RK806_INT_STS_SLP1_GPIO BIT(6) |
|---|
| 690 | #define RK806_INT_STS_WDT BIT(7) |
|---|
| 691 | |
|---|
| 692 | /* SPI command */ |
|---|
| 693 | #define RK806_CMD_READ 0 |
|---|
| 694 | #define RK806_CMD_WRITE BIT(7) |
|---|
| 695 | #define RK806_CMD_CRC_EN BIT(6) |
|---|
| 696 | #define RK806_CMD_CRC_DIS 0 |
|---|
| 697 | #define RK806_CMD_LEN_MSK 0x0f |
|---|
| 698 | #define RK806_REG_H 0x00 |
|---|
| 699 | |
|---|
| 700 | #define VERSION_AB 0x01 |
|---|
| 701 | |
|---|
| 702 | enum rk806_reg_id { |
|---|
| 703 | RK806_ID_DCDC1 = 0, |
|---|
| 704 | RK806_ID_DCDC2, |
|---|
| 705 | RK806_ID_DCDC3, |
|---|
| 706 | RK806_ID_DCDC4, |
|---|
| 707 | RK806_ID_DCDC5, |
|---|
| 708 | RK806_ID_DCDC6, |
|---|
| 709 | RK806_ID_DCDC7, |
|---|
| 710 | RK806_ID_DCDC8, |
|---|
| 711 | RK806_ID_DCDC9, |
|---|
| 712 | RK806_ID_DCDC10, |
|---|
| 713 | |
|---|
| 714 | RK806_ID_NLDO1, |
|---|
| 715 | RK806_ID_NLDO2, |
|---|
| 716 | RK806_ID_NLDO3, |
|---|
| 717 | RK806_ID_NLDO4, |
|---|
| 718 | RK806_ID_NLDO5, |
|---|
| 719 | |
|---|
| 720 | RK806_ID_PLDO1, |
|---|
| 721 | RK806_ID_PLDO2, |
|---|
| 722 | RK806_ID_PLDO3, |
|---|
| 723 | RK806_ID_PLDO4, |
|---|
| 724 | RK806_ID_PLDO5, |
|---|
| 725 | RK806_ID_PLDO6, |
|---|
| 726 | RK806_ID_END, |
|---|
| 727 | }; |
|---|
| 728 | |
|---|
| 729 | /* Define the RK806 IRQ numbers */ |
|---|
| 730 | enum rk806_irqs { |
|---|
| 731 | /* INT_STS0 registers */ |
|---|
| 732 | RK806_IRQ_PWRON_FALL, |
|---|
| 733 | RK806_IRQ_PWRON_RISE, |
|---|
| 734 | RK806_IRQ_PWRON, |
|---|
| 735 | RK806_IRQ_PWRON_LP, |
|---|
| 736 | RK806_IRQ_HOTDIE, |
|---|
| 737 | RK806_IRQ_VDC_RISE, |
|---|
| 738 | RK806_IRQ_VDC_FALL, |
|---|
| 739 | RK806_IRQ_VB_LO, |
|---|
| 740 | |
|---|
| 741 | /* INT_STS0 registers */ |
|---|
| 742 | RK806_IRQ_REV0, |
|---|
| 743 | RK806_IRQ_REV1, |
|---|
| 744 | RK806_IRQ_REV2, |
|---|
| 745 | RK806_IRQ_CRC_ERROR, |
|---|
| 746 | RK806_IRQ_SLP3_GPIO, |
|---|
| 747 | RK806_IRQ_SLP2_GPIO, |
|---|
| 748 | RK806_IRQ_SLP1_GPIO, |
|---|
| 749 | RK806_IRQ_WDT, |
|---|
| 750 | }; |
|---|
| 751 | |
|---|
| 752 | /* VCC1 Low Voltage Threshold */ |
|---|
| 753 | enum rk806_lv_sel { |
|---|
| 754 | VB_LO_SEL_2800, |
|---|
| 755 | VB_LO_SEL_2900, |
|---|
| 756 | VB_LO_SEL_3000, |
|---|
| 757 | VB_LO_SEL_3100, |
|---|
| 758 | VB_LO_SEL_3200, |
|---|
| 759 | VB_LO_SEL_3300, |
|---|
| 760 | VB_LO_SEL_3400, |
|---|
| 761 | VB_LO_SEL_3500, |
|---|
| 762 | }; |
|---|
| 763 | |
|---|
| 764 | /* System Shutdown Voltage Select */ |
|---|
| 765 | enum rk806_uv_sel { |
|---|
| 766 | VB_UV_SEL_2700, |
|---|
| 767 | VB_UV_SEL_2800, |
|---|
| 768 | VB_UV_SEL_2900, |
|---|
| 769 | VB_UV_SEL_3000, |
|---|
| 770 | VB_UV_SEL_3100, |
|---|
| 771 | VB_UV_SEL_3200, |
|---|
| 772 | VB_UV_SEL_3300, |
|---|
| 773 | VB_UV_SEL_3400, |
|---|
| 774 | }; |
|---|
| 775 | |
|---|
| 776 | /* Pin Function */ |
|---|
| 777 | enum rk806_pwrctrl_fun { |
|---|
| 778 | PWRCTRL_NULL_FUN, |
|---|
| 779 | PWRCTRL_SLP_FUN, |
|---|
| 780 | PWRCTRL_POWOFF_FUN, |
|---|
| 781 | PWRCTRL_RST_FUN, |
|---|
| 782 | PWRCTRL_DVS_FUN, |
|---|
| 783 | PWRCTRL_GPIO_FUN, |
|---|
| 784 | }; |
|---|
| 785 | |
|---|
| 786 | /* Pin Polarity */ |
|---|
| 787 | enum rk806_pin_level { |
|---|
| 788 | POL_LOW, |
|---|
| 789 | POL_HIGH, |
|---|
| 790 | }; |
|---|
| 791 | |
|---|
| 792 | enum rk806_vsel_ctr_sel { |
|---|
| 793 | CTR_BY_NO_EFFECT, |
|---|
| 794 | CTR_BY_PWRCTRL1, |
|---|
| 795 | CTR_BY_PWRCTRL2, |
|---|
| 796 | CTR_BY_PWRCTRL3, |
|---|
| 797 | }; |
|---|
| 798 | |
|---|
| 799 | enum rk806_dvs_ctr_sel { |
|---|
| 800 | CTR_SEL_NO_EFFECT, |
|---|
| 801 | CTR_SEL_DVS_START1, |
|---|
| 802 | CTR_SEL_DVS_START2, |
|---|
| 803 | CTR_SEL_DVS_START3, |
|---|
| 804 | }; |
|---|
| 805 | |
|---|
| 806 | enum rk806_pin_dr_sel { |
|---|
| 807 | RK806_PIN_INPUT, |
|---|
| 808 | RK806_PIN_OUTPUT, |
|---|
| 809 | }; |
|---|
| 810 | |
|---|
| 811 | #define RK806_INT_POL_MSK BIT(1) |
|---|
| 812 | #define RK806_INT_POL_H BIT(1) |
|---|
| 813 | #define RK806_INT_POL_L 0 |
|---|
| 814 | |
|---|
| 815 | /* SYS_CFG3 */ |
|---|
| 816 | #define RK806_RST_FUN_MSK GENMASK(7, 6) |
|---|
| 817 | #define RK806_SLAVE_RESTART_FUN_MSK BIT(1) |
|---|
| 818 | #define RK806_SLAVE_RESTART_FUN_EN BIT(1) |
|---|
| 819 | #define RK806_SLAVE_RESTART_FUN_OFF 0 |
|---|
| 820 | |
|---|
| 821 | #define RK806_SYS_ENB2_2M_MSK BIT(1) |
|---|
| 822 | #define RK806_SYS_ENB2_2M_EN BIT(1) |
|---|
| 823 | #define RK806_SYS_ENB2_2M_OFF 0 |
|---|
| 824 | |
|---|
| 825 | enum rk806_int_fun { |
|---|
| 826 | RK806_INT_ONLY, |
|---|
| 827 | RK806_INT_ADN_WKUP, |
|---|
| 828 | }; |
|---|
| 829 | |
|---|
| 830 | enum rk806_dvs_mode { |
|---|
| 831 | RK806_DVS_NOT_SUPPORT, |
|---|
| 832 | RK806_DVS_START1, |
|---|
| 833 | RK806_DVS_START2, |
|---|
| 834 | RK806_DVS_START3, |
|---|
| 835 | RK806_DVS_PWRCTRL1, |
|---|
| 836 | RK806_DVS_PWRCTRL2, |
|---|
| 837 | RK806_DVS_PWRCTRL3, |
|---|
| 838 | RK806_DVS_START_PWRCTR1, |
|---|
| 839 | RK806_DVS_START_PWRCTR2, |
|---|
| 840 | RK806_DVS_START_PWRCTR3, |
|---|
| 841 | RK806_DVS_END, |
|---|
| 842 | }; |
|---|
| 843 | |
|---|
| 844 | /* RK808 IRQ Definitions */ |
|---|
| 845 | #define RK808_IRQ_VOUT_LO 0 |
|---|
| 846 | #define RK808_IRQ_VB_LO 1 |
|---|
| 847 | #define RK808_IRQ_PWRON 2 |
|---|
| 848 | #define RK808_IRQ_PWRON_LP 3 |
|---|
| 849 | #define RK808_IRQ_HOTDIE 4 |
|---|
| 850 | #define RK808_IRQ_RTC_ALARM 5 |
|---|
| 851 | #define RK808_IRQ_RTC_PERIOD 6 |
|---|
| 852 | #define RK808_IRQ_PLUG_IN_INT 7 |
|---|
| 853 | #define RK808_IRQ_PLUG_OUT_INT 8 |
|---|
| 854 | #define RK808_NUM_IRQ 9 |
|---|
| 855 | |
|---|
| 856 | #define RK808_IRQ_VOUT_LO_MSK BIT(0) |
|---|
| 857 | #define RK808_IRQ_VB_LO_MSK BIT(1) |
|---|
| 858 | #define RK808_IRQ_PWRON_MSK BIT(2) |
|---|
| 859 | #define RK808_IRQ_PWRON_LP_MSK BIT(3) |
|---|
| 860 | #define RK808_IRQ_HOTDIE_MSK BIT(4) |
|---|
| 861 | #define RK808_IRQ_RTC_ALARM_MSK BIT(5) |
|---|
| 862 | #define RK808_IRQ_RTC_PERIOD_MSK BIT(6) |
|---|
| 863 | #define RK808_IRQ_PLUG_IN_INT_MSK BIT(0) |
|---|
| 864 | #define RK808_IRQ_PLUG_OUT_INT_MSK BIT(1) |
|---|
| 865 | |
|---|
| 866 | /* RK818 IRQ Definitions */ |
|---|
| 867 | #define RK818_IRQ_VOUT_LO 0 |
|---|
| 868 | #define RK818_IRQ_VB_LO 1 |
|---|
| 869 | #define RK818_IRQ_PWRON 2 |
|---|
| 870 | #define RK818_IRQ_PWRON_LP 3 |
|---|
| 871 | #define RK818_IRQ_HOTDIE 4 |
|---|
| 872 | #define RK818_IRQ_RTC_ALARM 5 |
|---|
| 873 | #define RK818_IRQ_RTC_PERIOD 6 |
|---|
| 874 | #define RK818_IRQ_USB_OV 7 |
|---|
| 875 | #define RK818_IRQ_PLUG_IN 8 |
|---|
| 876 | #define RK818_IRQ_PLUG_OUT 9 |
|---|
| 877 | #define RK818_IRQ_CHG_OK 10 |
|---|
| 878 | #define RK818_IRQ_CHG_TE 11 |
|---|
| 879 | #define RK818_IRQ_CHG_TS1 12 |
|---|
| 880 | #define RK818_IRQ_TS2 13 |
|---|
| 881 | #define RK818_IRQ_CHG_CVTLIM 14 |
|---|
| 882 | #define RK818_IRQ_DISCHG_ILIM 15 |
|---|
| 883 | |
|---|
| 884 | #define RK818_IRQ_VOUT_LO_MSK BIT(0) |
|---|
| 885 | #define RK818_IRQ_VB_LO_MSK BIT(1) |
|---|
| 886 | #define RK818_IRQ_PWRON_MSK BIT(2) |
|---|
| 887 | #define RK818_IRQ_PWRON_LP_MSK BIT(3) |
|---|
| 888 | #define RK818_IRQ_HOTDIE_MSK BIT(4) |
|---|
| 889 | #define RK818_IRQ_RTC_ALARM_MSK BIT(5) |
|---|
| 890 | #define RK818_IRQ_RTC_PERIOD_MSK BIT(6) |
|---|
| 891 | #define RK818_IRQ_USB_OV_MSK BIT(7) |
|---|
| 892 | #define RK818_IRQ_PLUG_IN_MSK BIT(0) |
|---|
| 893 | #define RK818_IRQ_PLUG_OUT_MSK BIT(1) |
|---|
| 894 | #define RK818_IRQ_CHG_OK_MSK BIT(2) |
|---|
| 895 | #define RK818_IRQ_CHG_TE_MSK BIT(3) |
|---|
| 896 | #define RK818_IRQ_CHG_TS1_MSK BIT(4) |
|---|
| 897 | #define RK818_IRQ_TS2_MSK BIT(5) |
|---|
| 898 | #define RK818_IRQ_CHG_CVTLIM_MSK BIT(6) |
|---|
| 899 | #define RK818_IRQ_DISCHG_ILIM_MSK BIT(7) |
|---|
| 900 | |
|---|
| 901 | #define RK818_NUM_IRQ 16 |
|---|
| 902 | |
|---|
| 903 | #define RK808_VBAT_LOW_2V8 0x00 |
|---|
| 904 | #define RK808_VBAT_LOW_2V9 0x01 |
|---|
| 905 | #define RK808_VBAT_LOW_3V0 0x02 |
|---|
| 906 | #define RK808_VBAT_LOW_3V1 0x03 |
|---|
| 907 | #define RK808_VBAT_LOW_3V2 0x04 |
|---|
| 908 | #define RK808_VBAT_LOW_3V3 0x05 |
|---|
| 909 | #define RK808_VBAT_LOW_3V4 0x06 |
|---|
| 910 | #define RK808_VBAT_LOW_3V5 0x07 |
|---|
| 911 | #define VBAT_LOW_VOL_MASK (0x07 << 0) |
|---|
| 912 | #define EN_VABT_LOW_SHUT_DOWN (0x00 << 4) |
|---|
| 913 | #define EN_VBAT_LOW_IRQ (0x1 << 4) |
|---|
| 914 | #define VBAT_LOW_ACT_MASK (0x1 << 4) |
|---|
| 915 | |
|---|
| 916 | #define BUCK_ILMIN_MASK (7 << 0) |
|---|
| 917 | #define BOOST_ILMIN_MASK (7 << 0) |
|---|
| 918 | #define BUCK1_RATE_MASK (3 << 3) |
|---|
| 919 | #define BUCK2_RATE_MASK (3 << 3) |
|---|
| 920 | #define MASK_ALL 0xff |
|---|
| 921 | |
|---|
| 922 | #define BUCK_UV_ACT_MASK 0x0f |
|---|
| 923 | #define BUCK_UV_ACT_DISABLE 0 |
|---|
| 924 | |
|---|
| 925 | #define SWITCH2_EN BIT(6) |
|---|
| 926 | #define SWITCH1_EN BIT(5) |
|---|
| 927 | #define DEV_OFF_RST BIT(3) |
|---|
| 928 | #define DEV_RST BIT(2) |
|---|
| 929 | #define DEV_OFF BIT(0) |
|---|
| 930 | #define RTC_STOP BIT(0) |
|---|
| 931 | |
|---|
| 932 | #define VB_LO_ACT BIT(4) |
|---|
| 933 | #define VB_LO_SEL_3500MV (7 << 0) |
|---|
| 934 | |
|---|
| 935 | #define VOUT_LO_INT BIT(0) |
|---|
| 936 | #define CLK32KOUT2_EN BIT(0) |
|---|
| 937 | |
|---|
| 938 | #define TEMP105C 0x08 |
|---|
| 939 | #define TEMP115C 0x0c |
|---|
| 940 | #define TEMP_HOTDIE_MSK 0x0c |
|---|
| 941 | #define SLP_SD_MSK (0x3 << 2) |
|---|
| 942 | #define SHUTDOWN_FUN (0x2 << 2) |
|---|
| 943 | #define SLEEP_FUN (0x1 << 2) |
|---|
| 944 | #define RK8XX_ID_MSK 0xfff0 |
|---|
| 945 | #define PWM_MODE_MSK BIT(7) |
|---|
| 946 | #define FPWM_MODE BIT(7) |
|---|
| 947 | #define AUTO_PWM_MODE 0 |
|---|
| 948 | |
|---|
| 949 | enum rk817_reg_id { |
|---|
| 950 | RK817_ID_DCDC1 = 0, |
|---|
| 951 | RK817_ID_DCDC2, |
|---|
| 952 | RK817_ID_DCDC3, |
|---|
| 953 | RK817_ID_DCDC4, |
|---|
| 954 | RK817_ID_LDO1, |
|---|
| 955 | RK817_ID_LDO2, |
|---|
| 956 | RK817_ID_LDO3, |
|---|
| 957 | RK817_ID_LDO4, |
|---|
| 958 | RK817_ID_LDO5, |
|---|
| 959 | RK817_ID_LDO6, |
|---|
| 960 | RK817_ID_LDO7, |
|---|
| 961 | RK817_ID_LDO8, |
|---|
| 962 | RK817_ID_LDO9, |
|---|
| 963 | RK817_ID_BOOST, |
|---|
| 964 | RK817_ID_BOOST_OTG_SW, |
|---|
| 965 | RK817_NUM_REGULATORS |
|---|
| 966 | }; |
|---|
| 967 | |
|---|
| 968 | enum rk809_reg_id { |
|---|
| 969 | RK809_ID_DCDC5 = RK817_ID_BOOST, |
|---|
| 970 | RK809_ID_SW1, |
|---|
| 971 | RK809_ID_SW2, |
|---|
| 972 | RK809_NUM_REGULATORS |
|---|
| 973 | }; |
|---|
| 974 | |
|---|
| 975 | #define RK817_SECONDS_REG 0x00 |
|---|
| 976 | #define RK817_MINUTES_REG 0x01 |
|---|
| 977 | #define RK817_HOURS_REG 0x02 |
|---|
| 978 | #define RK817_DAYS_REG 0x03 |
|---|
| 979 | #define RK817_MONTHS_REG 0x04 |
|---|
| 980 | #define RK817_YEARS_REG 0x05 |
|---|
| 981 | #define RK817_WEEKS_REG 0x06 |
|---|
| 982 | #define RK817_ALARM_SECONDS_REG 0x07 |
|---|
| 983 | #define RK817_ALARM_MINUTES_REG 0x08 |
|---|
| 984 | #define RK817_ALARM_HOURS_REG 0x09 |
|---|
| 985 | #define RK817_ALARM_DAYS_REG 0x0a |
|---|
| 986 | #define RK817_ALARM_MONTHS_REG 0x0b |
|---|
| 987 | #define RK817_ALARM_YEARS_REG 0x0c |
|---|
| 988 | #define RK817_RTC_CTRL_REG 0xd |
|---|
| 989 | #define RK817_RTC_STATUS_REG 0xe |
|---|
| 990 | #define RK817_RTC_INT_REG 0xf |
|---|
| 991 | #define RK817_RTC_COMP_LSB_REG 0x10 |
|---|
| 992 | #define RK817_RTC_COMP_MSB_REG 0x11 |
|---|
| 993 | |
|---|
| 994 | /* RK817 Codec Registers */ |
|---|
| 995 | #define RK817_CODEC_DTOP_VUCTL 0x12 |
|---|
| 996 | #define RK817_CODEC_DTOP_VUCTIME 0x13 |
|---|
| 997 | #define RK817_CODEC_DTOP_LPT_SRST 0x14 |
|---|
| 998 | #define RK817_CODEC_DTOP_DIGEN_CLKE 0x15 |
|---|
| 999 | #define RK817_CODEC_AREF_RTCFG0 0x16 |
|---|
| 1000 | #define RK817_CODEC_AREF_RTCFG1 0x17 |
|---|
| 1001 | #define RK817_CODEC_AADC_CFG0 0x18 |
|---|
| 1002 | #define RK817_CODEC_AADC_CFG1 0x19 |
|---|
| 1003 | #define RK817_CODEC_DADC_VOLL 0x1a |
|---|
| 1004 | #define RK817_CODEC_DADC_VOLR 0x1b |
|---|
| 1005 | #define RK817_CODEC_DADC_SR_ACL0 0x1e |
|---|
| 1006 | #define RK817_CODEC_DADC_ALC1 0x1f |
|---|
| 1007 | #define RK817_CODEC_DADC_ALC2 0x20 |
|---|
| 1008 | #define RK817_CODEC_DADC_NG 0x21 |
|---|
| 1009 | #define RK817_CODEC_DADC_HPF 0x22 |
|---|
| 1010 | #define RK817_CODEC_DADC_RVOLL 0x23 |
|---|
| 1011 | #define RK817_CODEC_DADC_RVOLR 0x24 |
|---|
| 1012 | #define RK817_CODEC_AMIC_CFG0 0x27 |
|---|
| 1013 | #define RK817_CODEC_AMIC_CFG1 0x28 |
|---|
| 1014 | #define RK817_CODEC_DMIC_PGA_GAIN 0x29 |
|---|
| 1015 | #define RK817_CODEC_DMIC_LMT1 0x2a |
|---|
| 1016 | #define RK817_CODEC_DMIC_LMT2 0x2b |
|---|
| 1017 | #define RK817_CODEC_DMIC_NG1 0x2c |
|---|
| 1018 | #define RK817_CODEC_DMIC_NG2 0x2d |
|---|
| 1019 | #define RK817_CODEC_ADAC_CFG0 0x2e |
|---|
| 1020 | #define RK817_CODEC_ADAC_CFG1 0x2f |
|---|
| 1021 | #define RK817_CODEC_DDAC_POPD_DACST 0x30 |
|---|
| 1022 | #define RK817_CODEC_DDAC_VOLL 0x31 |
|---|
| 1023 | #define RK817_CODEC_DDAC_VOLR 0x32 |
|---|
| 1024 | #define RK817_CODEC_DDAC_SR_LMT0 0x35 |
|---|
| 1025 | #define RK817_CODEC_DDAC_LMT1 0x36 |
|---|
| 1026 | #define RK817_CODEC_DDAC_LMT2 0x37 |
|---|
| 1027 | #define RK817_CODEC_DDAC_MUTE_MIXCTL 0x38 |
|---|
| 1028 | #define RK817_CODEC_DDAC_RVOLL 0x39 |
|---|
| 1029 | #define RK817_CODEC_DDAC_RVOLR 0x3a |
|---|
| 1030 | #define RK817_CODEC_AHP_ANTI0 0x3b |
|---|
| 1031 | #define RK817_CODEC_AHP_ANTI1 0x3c |
|---|
| 1032 | #define RK817_CODEC_AHP_CFG0 0x3d |
|---|
| 1033 | #define RK817_CODEC_AHP_CFG1 0x3e |
|---|
| 1034 | #define RK817_CODEC_AHP_CP 0x3f |
|---|
| 1035 | #define RK817_CODEC_ACLASSD_CFG1 0x40 |
|---|
| 1036 | #define RK817_CODEC_ACLASSD_CFG2 0x41 |
|---|
| 1037 | #define RK817_CODEC_APLL_CFG0 0x42 |
|---|
| 1038 | #define RK817_CODEC_APLL_CFG1 0x43 |
|---|
| 1039 | #define RK817_CODEC_APLL_CFG2 0x44 |
|---|
| 1040 | #define RK817_CODEC_APLL_CFG3 0x45 |
|---|
| 1041 | #define RK817_CODEC_APLL_CFG4 0x46 |
|---|
| 1042 | #define RK817_CODEC_APLL_CFG5 0x47 |
|---|
| 1043 | #define RK817_CODEC_DI2S_CKM 0x48 |
|---|
| 1044 | #define RK817_CODEC_DI2S_RSD 0x49 |
|---|
| 1045 | #define RK817_CODEC_DI2S_RXCR1 0x4a |
|---|
| 1046 | #define RK817_CODEC_DI2S_RXCR2 0x4b |
|---|
| 1047 | #define RK817_CODEC_DI2S_RXCMD_TSD 0x4c |
|---|
| 1048 | #define RK817_CODEC_DI2S_TXCR1 0x4d |
|---|
| 1049 | #define RK817_CODEC_DI2S_TXCR2 0x4e |
|---|
| 1050 | #define RK817_CODEC_DI2S_TXCR3_TXCMD 0x4f |
|---|
| 1051 | |
|---|
| 1052 | /* RK817_CODEC_DI2S_CKM */ |
|---|
| 1053 | #define RK817_I2S_MODE_MASK (0x1 << 0) |
|---|
| 1054 | #define RK817_I2S_MODE_MST (0x1 << 0) |
|---|
| 1055 | #define RK817_I2S_MODE_SLV (0x0 << 0) |
|---|
| 1056 | |
|---|
| 1057 | /* RK817_CODEC_DDAC_MUTE_MIXCTL */ |
|---|
| 1058 | #define DACMT_MASK (0x1 << 0) |
|---|
| 1059 | #define DACMT_ENABLE (0x1 << 0) |
|---|
| 1060 | #define DACMT_DISABLE (0x0 << 0) |
|---|
| 1061 | |
|---|
| 1062 | /* RK817_CODEC_DI2S_RXCR2 */ |
|---|
| 1063 | #define VDW_RX_24BITS (0x17) |
|---|
| 1064 | #define VDW_RX_16BITS (0x0f) |
|---|
| 1065 | |
|---|
| 1066 | /* RK817_CODEC_DI2S_TXCR2 */ |
|---|
| 1067 | #define VDW_TX_24BITS (0x17) |
|---|
| 1068 | #define VDW_TX_16BITS (0x0f) |
|---|
| 1069 | |
|---|
| 1070 | /* RK817_CODEC_AMIC_CFG0 */ |
|---|
| 1071 | #define MIC_DIFF_MASK (0x1 << 7) |
|---|
| 1072 | #define MIC_DIFF_DIS (0x0 << 7) |
|---|
| 1073 | #define MIC_DIFF_EN (0x1 << 7) |
|---|
| 1074 | |
|---|
| 1075 | /* RK817 Battery Registers */ |
|---|
| 1076 | #define RK817_GAS_GAUGE_ADC_CONFIG0 0x50 |
|---|
| 1077 | #define RK817_GG_EN (0x1 << 7) |
|---|
| 1078 | #define RK817_SYS_VOL_ADC_EN (0x1 << 6) |
|---|
| 1079 | #define RK817_TS_ADC_EN (0x1 << 5) |
|---|
| 1080 | #define RK817_USB_VOL_ADC_EN (0x1 << 4) |
|---|
| 1081 | #define RK817_BAT_VOL_ADC_EN (0x1 << 3) |
|---|
| 1082 | #define RK817_BAT_CUR_ADC_EN (0x1 << 2) |
|---|
| 1083 | |
|---|
| 1084 | #define RK817_GAS_GAUGE_ADC_CONFIG1 0x55 |
|---|
| 1085 | |
|---|
| 1086 | #define RK817_VOL_CUR_CALIB_UPD BIT(7) |
|---|
| 1087 | |
|---|
| 1088 | #define RK817_GAS_GAUGE_GG_CON 0x56 |
|---|
| 1089 | #define RK817_GAS_GAUGE_GG_STS 0x57 |
|---|
| 1090 | |
|---|
| 1091 | #define RK817_BAT_CON (0x1 << 4) |
|---|
| 1092 | #define RK817_RELAX_VOL_UPD (0x3 << 2) |
|---|
| 1093 | #define RK817_RELAX_STS (0x1 << 1) |
|---|
| 1094 | |
|---|
| 1095 | #define RK817_GAS_GAUGE_RELAX_THRE_H 0x58 |
|---|
| 1096 | #define RK817_GAS_GAUGE_RELAX_THRE_L 0x59 |
|---|
| 1097 | #define RK817_GAS_GAUGE_OCV_THRE_VOL 0x62 |
|---|
| 1098 | #define RK817_GAS_GAUGE_OCV_VOL_H 0x63 |
|---|
| 1099 | #define RK817_GAS_GAUGE_OCV_VOL_L 0x64 |
|---|
| 1100 | #define RK817_GAS_GAUGE_PWRON_VOL_H 0x6b |
|---|
| 1101 | #define RK817_GAS_GAUGE_PWRON_VOL_L 0x6c |
|---|
| 1102 | #define RK817_GAS_GAUGE_PWRON_CUR_H 0x6d |
|---|
| 1103 | #define RK817_GAS_GAUGE_PWRON_CUR_L 0x6e |
|---|
| 1104 | #define RK817_GAS_GAUGE_OFF_CNT 0x6f |
|---|
| 1105 | #define RK817_GAS_GAUGE_Q_INIT_H3 0x70 |
|---|
| 1106 | #define RK817_GAS_GAUGE_Q_INIT_H2 0x71 |
|---|
| 1107 | #define RK817_GAS_GAUGE_Q_INIT_L1 0x72 |
|---|
| 1108 | #define RK817_GAS_GAUGE_Q_INIT_L0 0x73 |
|---|
| 1109 | #define RK817_GAS_GAUGE_Q_PRES_H3 0x74 |
|---|
| 1110 | #define RK817_GAS_GAUGE_Q_PRES_H2 0x75 |
|---|
| 1111 | #define RK817_GAS_GAUGE_Q_PRES_L1 0x76 |
|---|
| 1112 | #define RK817_GAS_GAUGE_Q_PRES_L0 0x77 |
|---|
| 1113 | #define RK817_GAS_GAUGE_BAT_VOL_H 0x78 |
|---|
| 1114 | #define RK817_GAS_GAUGE_BAT_VOL_L 0x79 |
|---|
| 1115 | #define RK817_GAS_GAUGE_BAT_CUR_H 0x7a |
|---|
| 1116 | #define RK817_GAS_GAUGE_BAT_CUR_L 0x7b |
|---|
| 1117 | #define RK817_GAS_GAUGE_USB_VOL_H 0x7e |
|---|
| 1118 | #define RK817_GAS_GAUGE_USB_VOL_L 0x7f |
|---|
| 1119 | #define RK817_GAS_GAUGE_SYS_VOL_H 0x80 |
|---|
| 1120 | #define RK817_GAS_GAUGE_SYS_VOL_L 0x81 |
|---|
| 1121 | #define RK817_GAS_GAUGE_Q_MAX_H3 0x82 |
|---|
| 1122 | #define RK817_GAS_GAUGE_Q_MAX_H2 0x83 |
|---|
| 1123 | #define RK817_GAS_GAUGE_Q_MAX_L1 0x84 |
|---|
| 1124 | #define RK817_GAS_GAUGE_Q_MAX_L0 0x85 |
|---|
| 1125 | #define RK817_GAS_GAUGE_SLEEP_CON_SAMP_CUR_H 0x8f |
|---|
| 1126 | #define RK817_GAS_GAUGE_SLEEP_CON_SAMP_CUR_L 0x90 |
|---|
| 1127 | #define RK817_GAS_GAUGE_CAL_OFFSET_H 0x91 |
|---|
| 1128 | #define RK817_GAS_GAUGE_CAL_OFFSET_L 0x92 |
|---|
| 1129 | #define RK817_GAS_GAUGE_VCALIB0_H 0x93 |
|---|
| 1130 | #define RK817_GAS_GAUGE_VCALIB0_L 0x94 |
|---|
| 1131 | #define RK817_GAS_GAUGE_VCALIB1_H 0x95 |
|---|
| 1132 | #define RK817_GAS_GAUGE_VCALIB1_L 0x96 |
|---|
| 1133 | #define RK817_GAS_GAUGE_IOFFSET_H 0x97 |
|---|
| 1134 | #define RK817_GAS_GAUGE_IOFFSET_L 0x98 |
|---|
| 1135 | #define RK817_GAS_GAUGE_BAT_R1 0x9a |
|---|
| 1136 | #define RK817_GAS_GAUGE_BAT_R2 0x9b |
|---|
| 1137 | #define RK817_GAS_GAUGE_BAT_R3 0x9c |
|---|
| 1138 | #define RK817_GAS_GAUGE_DATA0 0x9d |
|---|
| 1139 | #define RK817_GAS_GAUGE_DATA1 0x9e |
|---|
| 1140 | #define RK817_GAS_GAUGE_DATA2 0x9f |
|---|
| 1141 | #define RK817_GAS_GAUGE_DATA3 0xa0 |
|---|
| 1142 | #define RK817_GAS_GAUGE_DATA4 0xa1 |
|---|
| 1143 | #define RK817_GAS_GAUGE_DATA5 0xa2 |
|---|
| 1144 | #define RK817_GAS_GAUGE_CUR_ADC_K0 0xb0 |
|---|
| 1145 | |
|---|
| 1146 | #define RK817_POWER_EN_REG(i) (0xb1 + (i)) |
|---|
| 1147 | #define RK817_POWER_SLP_EN_REG(i) (0xb5 + (i)) |
|---|
| 1148 | |
|---|
| 1149 | #define RK817_POWER_CONFIG (0xb9) |
|---|
| 1150 | |
|---|
| 1151 | #define RK817_BUCK_CONFIG_REG(i) (0xba + (i) * 3) |
|---|
| 1152 | |
|---|
| 1153 | #define RK817_BUCK1_ON_VSEL_REG 0xBB |
|---|
| 1154 | #define RK817_BUCK1_SLP_VSEL_REG 0xBC |
|---|
| 1155 | |
|---|
| 1156 | #define RK817_BUCK2_CONFIG_REG 0xBD |
|---|
| 1157 | #define RK817_BUCK2_ON_VSEL_REG 0xBE |
|---|
| 1158 | #define RK817_BUCK2_SLP_VSEL_REG 0xBF |
|---|
| 1159 | |
|---|
| 1160 | #define RK817_BUCK3_CONFIG_REG 0xC0 |
|---|
| 1161 | #define RK817_BUCK3_ON_VSEL_REG 0xC1 |
|---|
| 1162 | #define RK817_BUCK3_SLP_VSEL_REG 0xC2 |
|---|
| 1163 | |
|---|
| 1164 | #define RK817_BUCK4_CONFIG_REG 0xC3 |
|---|
| 1165 | #define RK817_BUCK4_ON_VSEL_REG 0xC4 |
|---|
| 1166 | #define RK817_BUCK4_SLP_VSEL_REG 0xC5 |
|---|
| 1167 | |
|---|
| 1168 | #define RK817_LDO_ON_VSEL_REG(idx) (0xcc + (idx) * 2) |
|---|
| 1169 | #define RK817_BOOST_OTG_CFG (0xde) |
|---|
| 1170 | |
|---|
| 1171 | #define RK817_PMIC_CHRG_OUT 0xe4 |
|---|
| 1172 | #define RK817_CHRG_VOL_SEL (0x07 << 4) |
|---|
| 1173 | #define RK817_CHRG_CUR_SEL (0x07 << 0) |
|---|
| 1174 | |
|---|
| 1175 | #define RK817_PMIC_CHRG_IN 0xe5 |
|---|
| 1176 | #define RK817_USB_VLIM_EN (0x01 << 7) |
|---|
| 1177 | #define RK817_USB_VLIM_SEL (0x07 << 4) |
|---|
| 1178 | #define RK817_USB_ILIM_EN (0x01 << 3) |
|---|
| 1179 | #define RK817_USB_ILIM_SEL (0x07 << 0) |
|---|
| 1180 | #define RK817_PMIC_CHRG_TERM 0xe6 |
|---|
| 1181 | #define RK817_CHRG_TERM_ANA_DIG (0x01 << 2) |
|---|
| 1182 | #define RK817_CHRG_TERM_ANA_SEL (0x03 << 0) |
|---|
| 1183 | #define RK817_CHRG_EN (0x01 << 6) |
|---|
| 1184 | |
|---|
| 1185 | #define RK817_PMIC_CHRG_STS 0xeb |
|---|
| 1186 | #define RK817_BAT_EXS BIT(7) |
|---|
| 1187 | #define RK817_CHG_STS (0x07 << 4) |
|---|
| 1188 | |
|---|
| 1189 | #define RK817_ID_MSB 0xed |
|---|
| 1190 | #define RK817_ID_LSB 0xee |
|---|
| 1191 | |
|---|
| 1192 | #define RK817_SYS_STS 0xf0 |
|---|
| 1193 | #define RK817_PLUG_IN_STS (0x1 << 6) |
|---|
| 1194 | |
|---|
| 1195 | #define RK817_SYS_CFG(i) (0xf1 + (i)) |
|---|
| 1196 | |
|---|
| 1197 | #define RK817_ON_SOURCE_REG 0xf5 |
|---|
| 1198 | #define RK817_OFF_SOURCE_REG 0xf6 |
|---|
| 1199 | |
|---|
| 1200 | /* INTERRUPT REGISTER */ |
|---|
| 1201 | #define RK817_INT_STS_REG0 0xf8 |
|---|
| 1202 | #define RK817_INT_STS_MSK_REG0 0xf9 |
|---|
| 1203 | #define RK817_INT_STS_REG1 0xfa |
|---|
| 1204 | #define RK817_INT_STS_MSK_REG1 0xfb |
|---|
| 1205 | #define RK817_INT_STS_REG2 0xfc |
|---|
| 1206 | #define RK817_INT_STS_MSK_REG2 0xfd |
|---|
| 1207 | #define RK817_GPIO_INT_CFG 0xfe |
|---|
| 1208 | |
|---|
| 1209 | /* IRQ Definitions */ |
|---|
| 1210 | #define RK817_IRQ_PWRON_FALL 0 |
|---|
| 1211 | #define RK817_IRQ_PWRON_RISE 1 |
|---|
| 1212 | #define RK817_IRQ_PWRON 2 |
|---|
| 1213 | #define RK817_IRQ_PWMON_LP 3 |
|---|
| 1214 | #define RK817_IRQ_HOTDIE 4 |
|---|
| 1215 | #define RK817_IRQ_RTC_ALARM 5 |
|---|
| 1216 | #define RK817_IRQ_RTC_PERIOD 6 |
|---|
| 1217 | #define RK817_IRQ_VB_LO 7 |
|---|
| 1218 | #define RK817_IRQ_PLUG_IN 8 |
|---|
| 1219 | #define RK817_IRQ_PLUG_OUT 9 |
|---|
| 1220 | #define RK817_IRQ_CHRG_TERM 10 |
|---|
| 1221 | #define RK817_IRQ_CHRG_TIME 11 |
|---|
| 1222 | #define RK817_IRQ_CHRG_TS 12 |
|---|
| 1223 | #define RK817_IRQ_USB_OV 13 |
|---|
| 1224 | #define RK817_IRQ_CHRG_IN_CLMP 14 |
|---|
| 1225 | #define RK817_IRQ_BAT_DIS_ILIM 15 |
|---|
| 1226 | #define RK817_IRQ_GATE_GPIO 16 |
|---|
| 1227 | #define RK817_IRQ_TS_GPIO 17 |
|---|
| 1228 | #define RK817_IRQ_CODEC_PD 18 |
|---|
| 1229 | #define RK817_IRQ_CODEC_PO 19 |
|---|
| 1230 | #define RK817_IRQ_CLASSD_MUTE_DONE 20 |
|---|
| 1231 | #define RK817_IRQ_CLASSD_OCP 21 |
|---|
| 1232 | #define RK817_IRQ_BAT_OVP 22 |
|---|
| 1233 | #define RK817_IRQ_CHRG_BAT_HI 23 |
|---|
| 1234 | #define RK817_IRQ_END (RK817_IRQ_CHRG_BAT_HI + 1) |
|---|
| 1235 | |
|---|
| 1236 | /* |
|---|
| 1237 | * rtc_ctrl 0xd |
|---|
| 1238 | * same as 808, except bit4 |
|---|
| 1239 | */ |
|---|
| 1240 | #define RK817_RTC_CTRL_RSV4 BIT(4) |
|---|
| 1241 | |
|---|
| 1242 | /* power config 0xb9 */ |
|---|
| 1243 | #define RK817_BUCK3_FB_RES_MSK BIT(6) |
|---|
| 1244 | #define RK817_BUCK3_FB_RES_INTER BIT(6) |
|---|
| 1245 | #define RK817_BUCK3_FB_RES_EXT 0 |
|---|
| 1246 | |
|---|
| 1247 | /* buck config 0xba */ |
|---|
| 1248 | #define RK817_RAMP_RATE_OFFSET 6 |
|---|
| 1249 | #define RK817_RAMP_RATE_MASK (0x3 << RK817_RAMP_RATE_OFFSET) |
|---|
| 1250 | #define RK817_RAMP_RATE_3MV_PER_US (0x0 << RK817_RAMP_RATE_OFFSET) |
|---|
| 1251 | #define RK817_RAMP_RATE_6_3MV_PER_US (0x1 << RK817_RAMP_RATE_OFFSET) |
|---|
| 1252 | #define RK817_RAMP_RATE_12_5MV_PER_US (0x2 << RK817_RAMP_RATE_OFFSET) |
|---|
| 1253 | #define RK817_RAMP_RATE_25MV_PER_US (0x3 << RK817_RAMP_RATE_OFFSET) |
|---|
| 1254 | |
|---|
| 1255 | /* sys_cfg1 0xf2 */ |
|---|
| 1256 | #define RK817_HOTDIE_TEMP_MSK (0x3 << 4) |
|---|
| 1257 | #define RK817_HOTDIE_85 (0x0 << 4) |
|---|
| 1258 | #define RK817_HOTDIE_95 (0x1 << 4) |
|---|
| 1259 | #define RK817_HOTDIE_105 (0x2 << 4) |
|---|
| 1260 | #define RK817_HOTDIE_115 (0x3 << 4) |
|---|
| 1261 | |
|---|
| 1262 | #define RK817_TSD_TEMP_MSK BIT(6) |
|---|
| 1263 | #define RK817_TSD_140 0 |
|---|
| 1264 | #define RK817_TSD_160 BIT(6) |
|---|
| 1265 | |
|---|
| 1266 | #define RK817_CLK32KOUT2_EN BIT(7) |
|---|
| 1267 | |
|---|
| 1268 | /* sys_cfg3 0xf4 */ |
|---|
| 1269 | #define RK817_SLPPIN_FUNC_MSK (0x3 << 3) |
|---|
| 1270 | #define SLPPIN_NULL_FUN (0x0 << 3) |
|---|
| 1271 | #define SLPPIN_SLP_FUN (0x1 << 3) |
|---|
| 1272 | #define SLPPIN_DN_FUN (0x2 << 3) |
|---|
| 1273 | #define SLPPIN_RST_FUN (0x3 << 3) |
|---|
| 1274 | |
|---|
| 1275 | #define RK817_RST_FUNC_MSK (0x3 << 6) |
|---|
| 1276 | #define RK817_RST_FUNC_SFT (6) |
|---|
| 1277 | #define RK817_RST_FUNC_CNT (3) |
|---|
| 1278 | #define RK817_RST_FUNC_DEV (0) /* reset the dev */ |
|---|
| 1279 | #define RK817_RST_FUNC_REG (0x1 << 6) /* reset the reg only */ |
|---|
| 1280 | |
|---|
| 1281 | #define RK817_SLPPOL_MSK BIT(5) |
|---|
| 1282 | #define RK817_SLPPOL_H BIT(5) |
|---|
| 1283 | #define RK817_SLPPOL_L (0) |
|---|
| 1284 | |
|---|
| 1285 | /* gpio&int 0xfe */ |
|---|
| 1286 | #define RK817_INT_POL_MSK BIT(1) |
|---|
| 1287 | #define RK817_INT_POL_H BIT(1) |
|---|
| 1288 | #define RK817_INT_POL_L 0 |
|---|
| 1289 | #define RK809_BUCK5_CONFIG(i) (RK817_BOOST_OTG_CFG + (i) * 1) |
|---|
| 1290 | |
|---|
| 1291 | enum { |
|---|
| 1292 | BUCK_ILMIN_50MA, |
|---|
| 1293 | BUCK_ILMIN_100MA, |
|---|
| 1294 | BUCK_ILMIN_150MA, |
|---|
| 1295 | BUCK_ILMIN_200MA, |
|---|
| 1296 | BUCK_ILMIN_250MA, |
|---|
| 1297 | BUCK_ILMIN_300MA, |
|---|
| 1298 | BUCK_ILMIN_350MA, |
|---|
| 1299 | BUCK_ILMIN_400MA, |
|---|
| 1300 | }; |
|---|
| 1301 | |
|---|
| 1302 | enum { |
|---|
| 1303 | BOOST_ILMIN_75MA, |
|---|
| 1304 | BOOST_ILMIN_100MA, |
|---|
| 1305 | BOOST_ILMIN_125MA, |
|---|
| 1306 | BOOST_ILMIN_150MA, |
|---|
| 1307 | BOOST_ILMIN_175MA, |
|---|
| 1308 | BOOST_ILMIN_200MA, |
|---|
| 1309 | BOOST_ILMIN_225MA, |
|---|
| 1310 | BOOST_ILMIN_250MA, |
|---|
| 1311 | }; |
|---|
| 1312 | |
|---|
| 1313 | enum { |
|---|
| 1314 | RK805_BUCK1_2_ILMAX_2500MA, |
|---|
| 1315 | RK805_BUCK1_2_ILMAX_3000MA, |
|---|
| 1316 | RK805_BUCK1_2_ILMAX_3500MA, |
|---|
| 1317 | RK805_BUCK1_2_ILMAX_4000MA, |
|---|
| 1318 | }; |
|---|
| 1319 | |
|---|
| 1320 | enum { |
|---|
| 1321 | RK805_BUCK3_ILMAX_1500MA, |
|---|
| 1322 | RK805_BUCK3_ILMAX_2000MA, |
|---|
| 1323 | RK805_BUCK3_ILMAX_2500MA, |
|---|
| 1324 | RK805_BUCK3_ILMAX_3000MA, |
|---|
| 1325 | }; |
|---|
| 1326 | |
|---|
| 1327 | enum { |
|---|
| 1328 | RK805_BUCK4_ILMAX_2000MA, |
|---|
| 1329 | RK805_BUCK4_ILMAX_2500MA, |
|---|
| 1330 | RK805_BUCK4_ILMAX_3000MA, |
|---|
| 1331 | RK805_BUCK4_ILMAX_3500MA, |
|---|
| 1332 | }; |
|---|
| 1333 | |
|---|
| 1334 | enum { |
|---|
| 1335 | RK805_ID = 0x8050, |
|---|
| 1336 | RK806_ID = 0x8060, |
|---|
| 1337 | RK808_ID = 0x0000, |
|---|
| 1338 | RK809_ID = 0x8090, |
|---|
| 1339 | RK816_ID = 0x8160, |
|---|
| 1340 | RK817_ID = 0x8170, |
|---|
| 1341 | RK818_ID = 0x8180, |
|---|
| 1342 | }; |
|---|
| 1343 | |
|---|
| 1344 | struct rk808 { |
|---|
| 1345 | struct device *dev; |
|---|
| 1346 | struct regmap_irq_chip_data *irq_data; |
|---|
| 1347 | struct regmap *regmap; |
|---|
| 1348 | long variant; |
|---|
| 1349 | const struct regmap_config *regmap_cfg; |
|---|
| 1350 | const struct regmap_irq_chip *regmap_irq_chip; |
|---|
| 1351 | }; |
|---|
| 1352 | |
|---|
| 1353 | void rk8xx_shutdown(struct device *dev); |
|---|
| 1354 | int rk8xx_probe(struct device *dev, int variant, unsigned int irq, struct regmap *regmap); |
|---|
| 1355 | int rk8xx_suspend(struct device *dev); |
|---|
| 1356 | int rk8xx_resume(struct device *dev); |
|---|
| 1357 | |
|---|
| 1358 | #endif /* __LINUX_REGULATOR_RK808_H */ |
|---|
| 1359 | |
|---|
