1/* SPDX-License-Identifier: GPL-2.0-only */
2/*
3 * Copyright (C) 2021 Western Digital Corporation or its affiliates.
4 * Copyright (C) 2022 Ventana Micro Systems Inc.
5 */
6#ifndef __LINUX_IRQCHIP_RISCV_IMSIC_H
7#define __LINUX_IRQCHIP_RISCV_IMSIC_H
8
9#include <linux/types.h>
10#include <linux/bitops.h>
11#include <linux/device.h>
12#include <linux/fwnode.h>
13
14#define IMSIC_MMIO_PAGE_SHIFT 12
15#define IMSIC_MMIO_PAGE_SZ BIT(IMSIC_MMIO_PAGE_SHIFT)
16#define IMSIC_MMIO_PAGE_LE 0x00
17#define IMSIC_MMIO_PAGE_BE 0x04
18
19#define IMSIC_MIN_ID 63
20#define IMSIC_MAX_ID 2048
21
22#define IMSIC_EIDELIVERY 0x70
23
24#define IMSIC_EITHRESHOLD 0x72
25
26#define IMSIC_EIP0 0x80
27#define IMSIC_EIP63 0xbf
28#define IMSIC_EIPx_BITS 32
29
30#define IMSIC_EIE0 0xc0
31#define IMSIC_EIE63 0xff
32#define IMSIC_EIEx_BITS 32
33
34#define IMSIC_FIRST IMSIC_EIDELIVERY
35#define IMSIC_LAST IMSIC_EIE63
36
37#define IMSIC_MMIO_SETIPNUM_LE 0x00
38#define IMSIC_MMIO_SETIPNUM_BE 0x04
39
40struct imsic_local_config {
41 phys_addr_t msi_pa;
42 void __iomem *msi_va;
43};
44
45struct imsic_global_config {
46 /*
47 * MSI Target Address Scheme
48 *
49 * XLEN-1 12 0
50 * | | |
51 * -------------------------------------------------------------
52 * |xxxxxx|Group Index|xxxxxxxxxxx|HART Index|Guest Index| 0 |
53 * -------------------------------------------------------------
54 */
55
56 /* Bits representing Guest index, HART index, and Group index */
57 u32 guest_index_bits;
58 u32 hart_index_bits;
59 u32 group_index_bits;
60 u32 group_index_shift;
61
62 /* Global base address matching all target MSI addresses */
63 phys_addr_t base_addr;
64
65 /* Number of interrupt identities */
66 u32 nr_ids;
67
68 /* Number of guest interrupt identities */
69 u32 nr_guest_ids;
70
71 /* Per-CPU IMSIC addresses */
72 struct imsic_local_config __percpu *local;
73};
74
75#ifdef CONFIG_RISCV_IMSIC
76
77const struct imsic_global_config *imsic_get_global_config(void);
78
79#else
80
81static inline const struct imsic_global_config *imsic_get_global_config(void)
82{
83 return NULL;
84}
85
86#endif
87
88#if IS_ENABLED(CONFIG_ACPI) && IS_ENABLED(CONFIG_RISCV_IMSIC)
89int imsic_platform_acpi_probe(struct fwnode_handle *fwnode);
90struct fwnode_handle *imsic_acpi_get_fwnode(struct device *dev);
91#else
92static inline struct fwnode_handle *imsic_acpi_get_fwnode(struct device *dev) { return NULL; }
93#endif
94
95#endif
96

source code of linux/include/linux/irqchip/riscv-imsic.h