| 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
| 2 | /* |
| 3 | * Copyright (c) 2024, Fuzhou Rockchip Electronics Co., Ltd |
| 4 | * |
| 5 | * Authors: Guochun Huang <hero.huang@rock-chips.com> |
| 6 | * Heiko Stuebner <heiko.stuebner@cherry.de> |
| 7 | */ |
| 8 | |
| 9 | #ifndef __DW_MIPI_DSI2__ |
| 10 | #define __DW_MIPI_DSI2__ |
| 11 | |
| 12 | #include <linux/regmap.h> |
| 13 | #include <linux/types.h> |
| 14 | |
| 15 | #include <drm/drm_atomic.h> |
| 16 | #include <drm/drm_bridge.h> |
| 17 | #include <drm/drm_connector.h> |
| 18 | #include <drm/drm_crtc.h> |
| 19 | #include <drm/drm_modes.h> |
| 20 | |
| 21 | struct drm_display_mode; |
| 22 | struct drm_encoder; |
| 23 | struct dw_mipi_dsi2; |
| 24 | struct mipi_dsi_device; |
| 25 | struct platform_device; |
| 26 | |
| 27 | enum dw_mipi_dsi2_phy_type { |
| 28 | DW_MIPI_DSI2_DPHY, |
| 29 | DW_MIPI_DSI2_CPHY, |
| 30 | }; |
| 31 | |
| 32 | struct dw_mipi_dsi2_phy_iface { |
| 33 | int ppi_width; |
| 34 | enum dw_mipi_dsi2_phy_type phy_type; |
| 35 | }; |
| 36 | |
| 37 | struct dw_mipi_dsi2_phy_timing { |
| 38 | u32 data_hs2lp; |
| 39 | u32 data_lp2hs; |
| 40 | }; |
| 41 | |
| 42 | struct dw_mipi_dsi2_phy_ops { |
| 43 | int (*init)(void *priv_data); |
| 44 | void (*power_on)(void *priv_data); |
| 45 | void (*power_off)(void *priv_data); |
| 46 | void (*get_interface)(void *priv_data, struct dw_mipi_dsi2_phy_iface *iface); |
| 47 | int (*get_lane_mbps)(void *priv_data, |
| 48 | const struct drm_display_mode *mode, |
| 49 | unsigned long mode_flags, u32 lanes, u32 format, |
| 50 | unsigned int *lane_mbps); |
| 51 | int (*get_timing)(void *priv_data, unsigned int lane_mbps, |
| 52 | struct dw_mipi_dsi2_phy_timing *timing); |
| 53 | int (*get_esc_clk_rate)(void *priv_data, unsigned int *esc_clk_rate); |
| 54 | }; |
| 55 | |
| 56 | struct dw_mipi_dsi2_host_ops { |
| 57 | int (*attach)(void *priv_data, |
| 58 | struct mipi_dsi_device *dsi); |
| 59 | int (*detach)(void *priv_data, |
| 60 | struct mipi_dsi_device *dsi); |
| 61 | }; |
| 62 | |
| 63 | struct dw_mipi_dsi2_plat_data { |
| 64 | struct regmap *regmap; |
| 65 | unsigned int max_data_lanes; |
| 66 | |
| 67 | enum drm_mode_status (*mode_valid)(void *priv_data, |
| 68 | const struct drm_display_mode *mode, |
| 69 | unsigned long mode_flags, |
| 70 | u32 lanes, u32 format); |
| 71 | |
| 72 | bool (*mode_fixup)(void *priv_data, const struct drm_display_mode *mode, |
| 73 | struct drm_display_mode *adjusted_mode); |
| 74 | |
| 75 | u32 *(*get_input_bus_fmts)(void *priv_data, |
| 76 | struct drm_bridge *bridge, |
| 77 | struct drm_bridge_state *bridge_state, |
| 78 | struct drm_crtc_state *crtc_state, |
| 79 | struct drm_connector_state *conn_state, |
| 80 | u32 output_fmt, |
| 81 | unsigned int *num_input_fmts); |
| 82 | |
| 83 | const struct dw_mipi_dsi2_phy_ops *phy_ops; |
| 84 | const struct dw_mipi_dsi2_host_ops *host_ops; |
| 85 | |
| 86 | void *priv_data; |
| 87 | }; |
| 88 | |
| 89 | struct dw_mipi_dsi2 *dw_mipi_dsi2_probe(struct platform_device *pdev, |
| 90 | const struct dw_mipi_dsi2_plat_data *plat_data); |
| 91 | void dw_mipi_dsi2_remove(struct dw_mipi_dsi2 *dsi2); |
| 92 | int dw_mipi_dsi2_bind(struct dw_mipi_dsi2 *dsi2, struct drm_encoder *encoder); |
| 93 | void dw_mipi_dsi2_unbind(struct dw_mipi_dsi2 *dsi2); |
| 94 | |
| 95 | #endif /* __DW_MIPI_DSI2__ */ |
| 96 | |