| 1 | /* |
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| 2 | * Copyright 2017 Advanced Micro Devices, Inc. |
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| 3 | * |
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| 4 | * Permission is hereby granted, free of charge, to any person obtaining a |
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| 5 | * copy of this software and associated documentation files (the "Software"), |
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| 6 | * to deal in the Software without restriction, including without limitation |
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| 7 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, |
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| 8 | * and/or sell copies of the Software, and to permit persons to whom the |
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| 9 | * Software is furnished to do so, subject to the following conditions: |
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| 10 | * |
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| 11 | * The above copyright notice and this permission notice shall be included in |
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| 12 | * all copies or substantial portions of the Software. |
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| 13 | * |
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| 14 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
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| 15 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
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| 16 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL |
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| 17 | * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR |
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| 18 | * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, |
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| 19 | * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR |
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| 20 | * OTHER DEALINGS IN THE SOFTWARE. |
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| 21 | */ |
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| 22 | |
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| 23 | #ifndef __AMD_ASIC_TYPE_H__ |
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| 24 | #define __AMD_ASIC_TYPE_H__ |
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| 25 | |
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| 26 | #include <linux/types.h> |
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| 27 | |
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| 28 | /* |
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| 29 | * Supported ASIC types |
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| 30 | */ |
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| 31 | enum amd_asic_type { |
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| 32 | CHIP_TAHITI = 0, |
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| 33 | CHIP_PITCAIRN, /* 1 */ |
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| 34 | CHIP_VERDE, /* 2 */ |
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| 35 | CHIP_OLAND, /* 3 */ |
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| 36 | CHIP_HAINAN, /* 4 */ |
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| 37 | CHIP_BONAIRE, /* 5 */ |
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| 38 | CHIP_KAVERI, /* 6 */ |
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| 39 | CHIP_KABINI, /* 7 */ |
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| 40 | CHIP_HAWAII, /* 8 */ |
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| 41 | CHIP_MULLINS, /* 9 */ |
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| 42 | CHIP_TOPAZ, /* 10 */ |
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| 43 | CHIP_TONGA, /* 11 */ |
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| 44 | CHIP_FIJI, /* 12 */ |
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| 45 | CHIP_CARRIZO, /* 13 */ |
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| 46 | CHIP_STONEY, /* 14 */ |
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| 47 | CHIP_POLARIS10, /* 15 */ |
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| 48 | CHIP_POLARIS11, /* 16 */ |
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| 49 | CHIP_POLARIS12, /* 17 */ |
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| 50 | CHIP_VEGAM, /* 18 */ |
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| 51 | CHIP_VEGA10, /* 19 */ |
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| 52 | CHIP_VEGA12, /* 20 */ |
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| 53 | CHIP_VEGA20, /* 21 */ |
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| 54 | CHIP_RAVEN, /* 22 */ |
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| 55 | CHIP_ARCTURUS, /* 23 */ |
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| 56 | CHIP_RENOIR, /* 24 */ |
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| 57 | CHIP_ALDEBARAN, /* 25 */ |
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| 58 | CHIP_NAVI10, /* 26 */ |
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| 59 | CHIP_CYAN_SKILLFISH, /* 27 */ |
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| 60 | CHIP_NAVI14, /* 28 */ |
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| 61 | CHIP_NAVI12, /* 29 */ |
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| 62 | CHIP_SIENNA_CICHLID, /* 30 */ |
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| 63 | CHIP_NAVY_FLOUNDER, /* 31 */ |
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| 64 | CHIP_VANGOGH, /* 32 */ |
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| 65 | CHIP_DIMGREY_CAVEFISH, /* 33 */ |
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| 66 | CHIP_BEIGE_GOBY, /* 34 */ |
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| 67 | CHIP_YELLOW_CARP, /* 35 */ |
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| 68 | CHIP_IP_DISCOVERY, /* 36 */ |
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| 69 | CHIP_LAST, |
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| 70 | }; |
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| 71 | |
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| 72 | extern const char *amdgpu_asic_name[]; |
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| 73 | |
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| 74 | struct amdgpu_asic_type_quirk { |
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| 75 | unsigned short device; /* PCI device ID */ |
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| 76 | u8 revision; /* revision ID */ |
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| 77 | unsigned short type; /* real ASIC type */ |
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| 78 | }; |
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| 79 | #endif /*__AMD_ASIC_TYPE_H__ */ |
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| 80 | |
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