1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Texas Instruments DSPS platforms "glue layer"
4 *
5 * Copyright (C) 2012, by Texas Instruments
6 *
7 * Based on the am35x "glue layer" code.
8 *
9 * This file is part of the Inventra Controller Driver for Linux.
10 *
11 * musb_dsps.c will be a common file for all the TI DSPS platforms
12 * such as dm64x, dm36x, dm35x, da8x, am35x and ti81x.
13 * For now only ti81x is using this and in future davinci.c, am35x.c
14 * da8xx.c would be merged to this file after testing.
15 */
16
17#include <linux/io.h>
18#include <linux/irq.h>
19#include <linux/err.h>
20#include <linux/platform_device.h>
21#include <linux/dma-mapping.h>
22#include <linux/pm_runtime.h>
23#include <linux/module.h>
24#include <linux/usb/usb_phy_generic.h>
25#include <linux/platform_data/usb-omap.h>
26#include <linux/sizes.h>
27#include <linux/string_choices.h>
28
29#include <linux/of.h>
30#include <linux/of_address.h>
31#include <linux/usb/of.h>
32
33#include <linux/debugfs.h>
34
35#include "musb_core.h"
36
37static const struct of_device_id musb_dsps_of_match[];
38
39/*
40 * DSPS musb wrapper register offset.
41 * FIXME: This should be expanded to have all the wrapper registers from TI DSPS
42 * musb ips.
43 */
44struct dsps_musb_wrapper {
45 u16 revision;
46 u16 control;
47 u16 status;
48 u16 epintr_set;
49 u16 epintr_clear;
50 u16 epintr_status;
51 u16 coreintr_set;
52 u16 coreintr_clear;
53 u16 coreintr_status;
54 u16 phy_utmi;
55 u16 mode;
56 u16 tx_mode;
57 u16 rx_mode;
58
59 /* bit positions for control */
60 unsigned reset:5;
61
62 /* bit positions for interrupt */
63 unsigned usb_shift:5;
64 u32 usb_mask;
65 u32 usb_bitmap;
66 unsigned drvvbus:5;
67
68 unsigned txep_shift:5;
69 u32 txep_mask;
70 u32 txep_bitmap;
71
72 unsigned rxep_shift:5;
73 u32 rxep_mask;
74 u32 rxep_bitmap;
75
76 /* bit positions for phy_utmi */
77 unsigned otg_disable:5;
78
79 /* bit positions for mode */
80 unsigned iddig:5;
81 unsigned iddig_mux:5;
82 /* miscellaneous stuff */
83 unsigned poll_timeout;
84};
85
86/*
87 * register shadow for suspend
88 */
89struct dsps_context {
90 u32 control;
91 u32 epintr;
92 u32 coreintr;
93 u32 phy_utmi;
94 u32 mode;
95 u32 tx_mode;
96 u32 rx_mode;
97};
98
99/*
100 * DSPS glue structure.
101 */
102struct dsps_glue {
103 struct device *dev;
104 struct platform_device *musb; /* child musb pdev */
105 const struct dsps_musb_wrapper *wrp; /* wrapper register offsets */
106 int vbus_irq; /* optional vbus irq */
107 unsigned long last_timer; /* last timer data for each instance */
108 bool sw_babble_enabled;
109 void __iomem *usbss_base;
110
111 struct dsps_context context;
112 struct debugfs_regset32 regset;
113 struct dentry *dbgfs_root;
114};
115
116static const struct debugfs_reg32 dsps_musb_regs[] = {
117 { "revision", 0x00 },
118 { "control", 0x14 },
119 { "status", 0x18 },
120 { "eoi", 0x24 },
121 { "intr0_stat", 0x30 },
122 { "intr1_stat", 0x34 },
123 { "intr0_set", 0x38 },
124 { "intr1_set", 0x3c },
125 { "txmode", 0x70 },
126 { "rxmode", 0x74 },
127 { "autoreq", 0xd0 },
128 { "srpfixtime", 0xd4 },
129 { "tdown", 0xd8 },
130 { "phy_utmi", 0xe0 },
131 { "mode", 0xe8 },
132};
133
134static void dsps_mod_timer(struct dsps_glue *glue, int wait_ms)
135{
136 struct musb *musb = platform_get_drvdata(pdev: glue->musb);
137 int wait;
138
139 if (wait_ms < 0)
140 wait = msecs_to_jiffies(m: glue->wrp->poll_timeout);
141 else
142 wait = msecs_to_jiffies(m: wait_ms);
143
144 mod_timer(timer: &musb->dev_timer, expires: jiffies + wait);
145}
146
147/*
148 * If no vbus irq from the PMIC is configured, we need to poll VBUS status.
149 */
150static void dsps_mod_timer_optional(struct dsps_glue *glue)
151{
152 if (glue->vbus_irq)
153 return;
154
155 dsps_mod_timer(glue, wait_ms: -1);
156}
157
158/* USBSS / USB AM335x */
159#define USBSS_IRQ_STATUS 0x28
160#define USBSS_IRQ_ENABLER 0x2c
161#define USBSS_IRQ_CLEARR 0x30
162
163#define USBSS_IRQ_PD_COMP (1 << 2)
164
165/*
166 * dsps_musb_enable - enable interrupts
167 */
168static void dsps_musb_enable(struct musb *musb)
169{
170 struct device *dev = musb->controller;
171 struct dsps_glue *glue = dev_get_drvdata(dev: dev->parent);
172 const struct dsps_musb_wrapper *wrp = glue->wrp;
173 void __iomem *reg_base = musb->ctrl_base;
174 u32 epmask, coremask;
175
176 /* Workaround: setup IRQs through both register sets. */
177 epmask = ((musb->epmask & wrp->txep_mask) << wrp->txep_shift) |
178 ((musb->epmask & wrp->rxep_mask) << wrp->rxep_shift);
179 coremask = (wrp->usb_bitmap & ~MUSB_INTR_SOF);
180
181 musb_writel(addr: reg_base, offset: wrp->epintr_set, data: epmask);
182 musb_writel(addr: reg_base, offset: wrp->coreintr_set, data: coremask);
183 /*
184 * start polling for runtime PM active and idle,
185 * and for ID change in dual-role idle mode.
186 */
187 if (musb->xceiv->otg->state == OTG_STATE_B_IDLE)
188 dsps_mod_timer(glue, wait_ms: -1);
189}
190
191/*
192 * dsps_musb_disable - disable HDRC and flush interrupts
193 */
194static void dsps_musb_disable(struct musb *musb)
195{
196 struct device *dev = musb->controller;
197 struct dsps_glue *glue = dev_get_drvdata(dev: dev->parent);
198 const struct dsps_musb_wrapper *wrp = glue->wrp;
199 void __iomem *reg_base = musb->ctrl_base;
200
201 musb_writel(addr: reg_base, offset: wrp->coreintr_clear, data: wrp->usb_bitmap);
202 musb_writel(addr: reg_base, offset: wrp->epintr_clear,
203 data: wrp->txep_bitmap | wrp->rxep_bitmap);
204 timer_delete_sync(timer: &musb->dev_timer);
205}
206
207/* Caller must take musb->lock */
208static int dsps_check_status(struct musb *musb, void *unused)
209{
210 void __iomem *mregs = musb->mregs;
211 struct device *dev = musb->controller;
212 struct dsps_glue *glue = dev_get_drvdata(dev: dev->parent);
213 const struct dsps_musb_wrapper *wrp = glue->wrp;
214 u8 devctl;
215 int skip_session = 0;
216
217 if (glue->vbus_irq)
218 timer_delete(timer: &musb->dev_timer);
219
220 /*
221 * We poll because DSPS IP's won't expose several OTG-critical
222 * status change events (from the transceiver) otherwise.
223 */
224 devctl = musb_readb(mregs, MUSB_DEVCTL);
225 dev_dbg(musb->controller, "Poll devctl %02x (%s)\n", devctl,
226 usb_otg_state_string(musb->xceiv->otg->state));
227
228 switch (musb->xceiv->otg->state) {
229 case OTG_STATE_A_WAIT_VRISE:
230 if (musb->port_mode == MUSB_HOST) {
231 musb->xceiv->otg->state = OTG_STATE_A_WAIT_BCON;
232 dsps_mod_timer_optional(glue);
233 break;
234 }
235 fallthrough;
236
237 case OTG_STATE_A_WAIT_BCON:
238 /* keep VBUS on for host-only mode */
239 if (musb->port_mode == MUSB_HOST) {
240 dsps_mod_timer_optional(glue);
241 break;
242 }
243 musb_writeb(musb->mregs, MUSB_DEVCTL, 0);
244 skip_session = 1;
245 fallthrough;
246
247 case OTG_STATE_A_IDLE:
248 case OTG_STATE_B_IDLE:
249 if (!glue->vbus_irq) {
250 if (devctl & MUSB_DEVCTL_BDEVICE) {
251 musb->xceiv->otg->state = OTG_STATE_B_IDLE;
252 MUSB_DEV_MODE(musb);
253 } else {
254 musb->xceiv->otg->state = OTG_STATE_A_IDLE;
255 MUSB_HST_MODE(musb);
256 }
257
258 if (musb->port_mode == MUSB_PERIPHERAL)
259 skip_session = 1;
260
261 if (!(devctl & MUSB_DEVCTL_SESSION) && !skip_session)
262 musb_writeb(mregs, MUSB_DEVCTL,
263 MUSB_DEVCTL_SESSION);
264 }
265 dsps_mod_timer_optional(glue);
266 break;
267 case OTG_STATE_A_WAIT_VFALL:
268 musb->xceiv->otg->state = OTG_STATE_A_WAIT_VRISE;
269 musb_writel(addr: musb->ctrl_base, offset: wrp->coreintr_set,
270 MUSB_INTR_VBUSERROR << wrp->usb_shift);
271 break;
272 default:
273 break;
274 }
275
276 return 0;
277}
278
279static void otg_timer(struct timer_list *t)
280{
281 struct musb *musb = timer_container_of(musb, t, dev_timer);
282 struct device *dev = musb->controller;
283 unsigned long flags;
284 int err;
285
286 err = pm_runtime_get(dev);
287 if ((err != -EINPROGRESS) && err < 0) {
288 dev_err(dev, "Poll could not pm_runtime_get: %i\n", err);
289 pm_runtime_put_noidle(dev);
290
291 return;
292 }
293
294 spin_lock_irqsave(&musb->lock, flags);
295 err = musb_queue_resume_work(musb, callback: dsps_check_status, NULL);
296 if (err < 0)
297 dev_err(dev, "%s resume work: %i\n", __func__, err);
298 spin_unlock_irqrestore(lock: &musb->lock, flags);
299 pm_runtime_put_autosuspend(dev);
300}
301
302static void dsps_musb_clear_ep_rxintr(struct musb *musb, int epnum)
303{
304 u32 epintr;
305 struct dsps_glue *glue = dev_get_drvdata(dev: musb->controller->parent);
306 const struct dsps_musb_wrapper *wrp = glue->wrp;
307
308 /* musb->lock might already been held */
309 epintr = (1 << epnum) << wrp->rxep_shift;
310 musb_writel(addr: musb->ctrl_base, offset: wrp->epintr_status, data: epintr);
311}
312
313static irqreturn_t dsps_interrupt(int irq, void *hci)
314{
315 struct musb *musb = hci;
316 void __iomem *reg_base = musb->ctrl_base;
317 struct device *dev = musb->controller;
318 struct dsps_glue *glue = dev_get_drvdata(dev: dev->parent);
319 const struct dsps_musb_wrapper *wrp = glue->wrp;
320 unsigned long flags;
321 irqreturn_t ret = IRQ_NONE;
322 u32 epintr, usbintr;
323
324 spin_lock_irqsave(&musb->lock, flags);
325
326 /* Get endpoint interrupts */
327 epintr = musb_readl(addr: reg_base, offset: wrp->epintr_status);
328 musb->int_rx = (epintr & wrp->rxep_bitmap) >> wrp->rxep_shift;
329 musb->int_tx = (epintr & wrp->txep_bitmap) >> wrp->txep_shift;
330
331 if (epintr)
332 musb_writel(addr: reg_base, offset: wrp->epintr_status, data: epintr);
333
334 /* Get usb core interrupts */
335 usbintr = musb_readl(addr: reg_base, offset: wrp->coreintr_status);
336 if (!usbintr && !epintr)
337 goto out;
338
339 musb->int_usb = (usbintr & wrp->usb_bitmap) >> wrp->usb_shift;
340 if (usbintr)
341 musb_writel(addr: reg_base, offset: wrp->coreintr_status, data: usbintr);
342
343 dev_dbg(musb->controller, "usbintr (%x) epintr(%x)\n",
344 usbintr, epintr);
345
346 if (usbintr & ((1 << wrp->drvvbus) << wrp->usb_shift)) {
347 int drvvbus = musb_readl(addr: reg_base, offset: wrp->status);
348 void __iomem *mregs = musb->mregs;
349 u8 devctl = musb_readb(mregs, MUSB_DEVCTL);
350 int err;
351
352 err = musb->int_usb & MUSB_INTR_VBUSERROR;
353 if (err) {
354 /*
355 * The Mentor core doesn't debounce VBUS as needed
356 * to cope with device connect current spikes. This
357 * means it's not uncommon for bus-powered devices
358 * to get VBUS errors during enumeration.
359 *
360 * This is a workaround, but newer RTL from Mentor
361 * seems to allow a better one: "re"-starting sessions
362 * without waiting for VBUS to stop registering in
363 * devctl.
364 */
365 musb->int_usb &= ~MUSB_INTR_VBUSERROR;
366 musb->xceiv->otg->state = OTG_STATE_A_WAIT_VFALL;
367 dsps_mod_timer_optional(glue);
368 WARNING("VBUS error workaround (delay coming)\n");
369 } else if (drvvbus) {
370 MUSB_HST_MODE(musb);
371 musb->xceiv->otg->state = OTG_STATE_A_WAIT_VRISE;
372 dsps_mod_timer_optional(glue);
373 } else {
374 musb->is_active = 0;
375 MUSB_DEV_MODE(musb);
376 musb->xceiv->otg->state = OTG_STATE_B_IDLE;
377 }
378
379 /* NOTE: this must complete power-on within 100 ms. */
380 dev_dbg(musb->controller, "VBUS %s (%s)%s, devctl %02x\n",
381 str_on_off(drvvbus),
382 usb_otg_state_string(musb->xceiv->otg->state),
383 err ? " ERROR" : "",
384 devctl);
385 ret = IRQ_HANDLED;
386 }
387
388 if (musb->int_tx || musb->int_rx || musb->int_usb)
389 ret |= musb_interrupt(musb);
390
391 /* Poll for ID change and connect */
392 switch (musb->xceiv->otg->state) {
393 case OTG_STATE_B_IDLE:
394 case OTG_STATE_A_WAIT_BCON:
395 dsps_mod_timer_optional(glue);
396 break;
397 default:
398 break;
399 }
400
401out:
402 spin_unlock_irqrestore(lock: &musb->lock, flags);
403
404 return ret;
405}
406
407static int dsps_musb_dbg_init(struct musb *musb, struct dsps_glue *glue)
408{
409 struct dentry *root;
410 char buf[128];
411
412 sprintf(buf, fmt: "%s.dsps", dev_name(dev: musb->controller));
413 root = debugfs_create_dir(name: buf, parent: usb_debug_root);
414 glue->dbgfs_root = root;
415
416 glue->regset.regs = dsps_musb_regs;
417 glue->regset.nregs = ARRAY_SIZE(dsps_musb_regs);
418 glue->regset.base = musb->ctrl_base;
419
420 debugfs_create_regset32(name: "regdump", S_IRUGO, parent: root, regset: &glue->regset);
421 return 0;
422}
423
424static int dsps_musb_init(struct musb *musb)
425{
426 struct device *dev = musb->controller;
427 struct dsps_glue *glue = dev_get_drvdata(dev: dev->parent);
428 struct platform_device *parent = to_platform_device(dev->parent);
429 const struct dsps_musb_wrapper *wrp = glue->wrp;
430 void __iomem *reg_base;
431 struct resource *r;
432 u32 rev, val;
433 int ret;
434
435 r = platform_get_resource_byname(parent, IORESOURCE_MEM, "control");
436 reg_base = devm_ioremap_resource(dev, res: r);
437 if (IS_ERR(ptr: reg_base))
438 return PTR_ERR(ptr: reg_base);
439 musb->ctrl_base = reg_base;
440
441 /* NOP driver needs change if supporting dual instance */
442 musb->xceiv = devm_usb_get_phy_by_phandle(dev: dev->parent, phandle: "phys", index: 0);
443 if (IS_ERR(ptr: musb->xceiv))
444 return PTR_ERR(ptr: musb->xceiv);
445
446 musb->phy = devm_phy_get(dev: dev->parent, string: "usb2-phy");
447
448 /* Returns zero if e.g. not clocked */
449 rev = musb_readl(addr: reg_base, offset: wrp->revision);
450 if (!rev)
451 return -ENODEV;
452
453 if (IS_ERR(ptr: musb->phy)) {
454 musb->phy = NULL;
455 } else {
456 ret = phy_init(phy: musb->phy);
457 if (ret < 0)
458 return ret;
459 ret = phy_power_on(phy: musb->phy);
460 if (ret) {
461 phy_exit(phy: musb->phy);
462 return ret;
463 }
464 }
465
466 timer_setup(&musb->dev_timer, otg_timer, 0);
467
468 /* Reset the musb */
469 musb_writel(addr: reg_base, offset: wrp->control, data: (1 << wrp->reset));
470
471 musb->isr = dsps_interrupt;
472
473 /* reset the otgdisable bit, needed for host mode to work */
474 val = musb_readl(addr: reg_base, offset: wrp->phy_utmi);
475 val &= ~(1 << wrp->otg_disable);
476 musb_writel(addr: musb->ctrl_base, offset: wrp->phy_utmi, data: val);
477
478 /*
479 * Check whether the dsps version has babble control enabled.
480 * In latest silicon revision the babble control logic is enabled.
481 * If MUSB_BABBLE_CTL returns 0x4 then we have the babble control
482 * logic enabled.
483 */
484 val = musb_readb(musb->mregs, MUSB_BABBLE_CTL);
485 if (val & MUSB_BABBLE_RCV_DISABLE) {
486 glue->sw_babble_enabled = true;
487 val |= MUSB_BABBLE_SW_SESSION_CTRL;
488 musb_writeb(musb->mregs, MUSB_BABBLE_CTL, val);
489 }
490
491 dsps_mod_timer(glue, wait_ms: -1);
492
493 return dsps_musb_dbg_init(musb, glue);
494}
495
496static int dsps_musb_exit(struct musb *musb)
497{
498 struct device *dev = musb->controller;
499 struct dsps_glue *glue = dev_get_drvdata(dev: dev->parent);
500
501 timer_delete_sync(timer: &musb->dev_timer);
502 phy_power_off(phy: musb->phy);
503 phy_exit(phy: musb->phy);
504 debugfs_remove_recursive(dentry: glue->dbgfs_root);
505
506 return 0;
507}
508
509static int dsps_musb_set_mode(struct musb *musb, u8 mode)
510{
511 struct device *dev = musb->controller;
512 struct dsps_glue *glue = dev_get_drvdata(dev: dev->parent);
513 const struct dsps_musb_wrapper *wrp = glue->wrp;
514 void __iomem *ctrl_base = musb->ctrl_base;
515 u32 reg;
516
517 reg = musb_readl(addr: ctrl_base, offset: wrp->mode);
518
519 switch (mode) {
520 case MUSB_HOST:
521 reg &= ~(1 << wrp->iddig);
522
523 /*
524 * if we're setting mode to host-only or device-only, we're
525 * going to ignore whatever the PHY sends us and just force
526 * ID pin status by SW
527 */
528 reg |= (1 << wrp->iddig_mux);
529
530 musb_writel(addr: ctrl_base, offset: wrp->mode, data: reg);
531 musb_writel(addr: ctrl_base, offset: wrp->phy_utmi, data: 0x02);
532 break;
533 case MUSB_PERIPHERAL:
534 reg |= (1 << wrp->iddig);
535
536 /*
537 * if we're setting mode to host-only or device-only, we're
538 * going to ignore whatever the PHY sends us and just force
539 * ID pin status by SW
540 */
541 reg |= (1 << wrp->iddig_mux);
542
543 musb_writel(addr: ctrl_base, offset: wrp->mode, data: reg);
544 break;
545 case MUSB_OTG:
546 musb_writel(addr: ctrl_base, offset: wrp->phy_utmi, data: 0x02);
547 break;
548 default:
549 dev_err(glue->dev, "unsupported mode %d\n", mode);
550 return -EINVAL;
551 }
552
553 return 0;
554}
555
556static bool dsps_sw_babble_control(struct musb *musb)
557{
558 u8 babble_ctl;
559 bool session_restart = false;
560
561 babble_ctl = musb_readb(musb->mregs, MUSB_BABBLE_CTL);
562 dev_dbg(musb->controller, "babble: MUSB_BABBLE_CTL value %x\n",
563 babble_ctl);
564 /*
565 * check line monitor flag to check whether babble is
566 * due to noise
567 */
568 dev_dbg(musb->controller, "STUCK_J is %s\n",
569 babble_ctl & MUSB_BABBLE_STUCK_J ? "set" : "reset");
570
571 if (babble_ctl & MUSB_BABBLE_STUCK_J) {
572 int timeout = 10;
573
574 /*
575 * babble is due to noise, then set transmit idle (d7 bit)
576 * to resume normal operation
577 */
578 babble_ctl = musb_readb(musb->mregs, MUSB_BABBLE_CTL);
579 babble_ctl |= MUSB_BABBLE_FORCE_TXIDLE;
580 musb_writeb(musb->mregs, MUSB_BABBLE_CTL, babble_ctl);
581
582 /* wait till line monitor flag cleared */
583 dev_dbg(musb->controller, "Set TXIDLE, wait J to clear\n");
584 do {
585 babble_ctl = musb_readb(musb->mregs, MUSB_BABBLE_CTL);
586 udelay(usec: 1);
587 } while ((babble_ctl & MUSB_BABBLE_STUCK_J) && timeout--);
588
589 /* check whether stuck_at_j bit cleared */
590 if (babble_ctl & MUSB_BABBLE_STUCK_J) {
591 /*
592 * real babble condition has occurred
593 * restart the controller to start the
594 * session again
595 */
596 dev_dbg(musb->controller, "J not cleared, misc (%x)\n",
597 babble_ctl);
598 session_restart = true;
599 }
600 } else {
601 session_restart = true;
602 }
603
604 return session_restart;
605}
606
607static int dsps_musb_recover(struct musb *musb)
608{
609 struct device *dev = musb->controller;
610 struct dsps_glue *glue = dev_get_drvdata(dev: dev->parent);
611 int session_restart = 0;
612
613 if (glue->sw_babble_enabled)
614 session_restart = dsps_sw_babble_control(musb);
615 else
616 session_restart = 1;
617
618 return session_restart ? 0 : -EPIPE;
619}
620
621/* Similar to am35x, dm81xx support only 32-bit read operation */
622static void dsps_read_fifo32(struct musb_hw_ep *hw_ep, u16 len, u8 *dst)
623{
624 void __iomem *fifo = hw_ep->fifo;
625
626 if (len >= 4) {
627 ioread32_rep(port: fifo, buf: dst, count: len >> 2);
628 dst += len & ~0x03;
629 len &= 0x03;
630 }
631
632 /* Read any remaining 1 to 3 bytes */
633 if (len > 0) {
634 u32 val = musb_readl(addr: fifo, offset: 0);
635 memcpy(dst, &val, len);
636 }
637}
638
639#ifdef CONFIG_USB_TI_CPPI41_DMA
640static void dsps_dma_controller_callback(struct dma_controller *c)
641{
642 struct musb *musb = c->musb;
643 struct dsps_glue *glue = dev_get_drvdata(musb->controller->parent);
644 void __iomem *usbss_base = glue->usbss_base;
645 u32 status;
646
647 status = musb_readl(usbss_base, USBSS_IRQ_STATUS);
648 if (status & USBSS_IRQ_PD_COMP)
649 musb_writel(usbss_base, USBSS_IRQ_STATUS, USBSS_IRQ_PD_COMP);
650}
651
652static struct dma_controller *
653dsps_dma_controller_create(struct musb *musb, void __iomem *base)
654{
655 struct dma_controller *controller;
656 struct dsps_glue *glue = dev_get_drvdata(musb->controller->parent);
657 void __iomem *usbss_base = glue->usbss_base;
658
659 controller = cppi41_dma_controller_create(musb, base);
660 if (IS_ERR_OR_NULL(controller))
661 return controller;
662
663 musb_writel(usbss_base, USBSS_IRQ_ENABLER, USBSS_IRQ_PD_COMP);
664 controller->dma_callback = dsps_dma_controller_callback;
665
666 return controller;
667}
668
669#ifdef CONFIG_PM_SLEEP
670static void dsps_dma_controller_suspend(struct dsps_glue *glue)
671{
672 void __iomem *usbss_base = glue->usbss_base;
673
674 musb_writel(usbss_base, USBSS_IRQ_CLEARR, USBSS_IRQ_PD_COMP);
675}
676
677static void dsps_dma_controller_resume(struct dsps_glue *glue)
678{
679 void __iomem *usbss_base = glue->usbss_base;
680
681 musb_writel(usbss_base, USBSS_IRQ_ENABLER, USBSS_IRQ_PD_COMP);
682}
683#endif
684#else /* CONFIG_USB_TI_CPPI41_DMA */
685#ifdef CONFIG_PM_SLEEP
686static void dsps_dma_controller_suspend(struct dsps_glue *glue) {}
687static void dsps_dma_controller_resume(struct dsps_glue *glue) {}
688#endif
689#endif /* CONFIG_USB_TI_CPPI41_DMA */
690
691static struct musb_platform_ops dsps_ops = {
692 .quirks = MUSB_DMA_CPPI41 | MUSB_INDEXED_EP,
693 .init = dsps_musb_init,
694 .exit = dsps_musb_exit,
695
696#ifdef CONFIG_USB_TI_CPPI41_DMA
697 .dma_init = dsps_dma_controller_create,
698 .dma_exit = cppi41_dma_controller_destroy,
699#endif
700 .enable = dsps_musb_enable,
701 .disable = dsps_musb_disable,
702
703 .set_mode = dsps_musb_set_mode,
704 .recover = dsps_musb_recover,
705 .clear_ep_rxintr = dsps_musb_clear_ep_rxintr,
706};
707
708static u64 musb_dmamask = DMA_BIT_MASK(32);
709
710static int get_int_prop(struct device_node *dn, const char *s)
711{
712 int ret;
713 u32 val;
714
715 ret = of_property_read_u32(np: dn, propname: s, out_value: &val);
716 if (ret)
717 return 0;
718 return val;
719}
720
721static int dsps_create_musb_pdev(struct dsps_glue *glue,
722 struct platform_device *parent)
723{
724 struct musb_hdrc_platform_data pdata;
725 struct resource resources[2];
726 struct resource *res;
727 struct device *dev = &parent->dev;
728 struct musb_hdrc_config *config;
729 struct platform_device *musb;
730 struct device_node *dn = parent->dev.of_node;
731 int ret, val;
732
733 memset(resources, 0, sizeof(resources));
734 res = platform_get_resource_byname(parent, IORESOURCE_MEM, "mc");
735 if (!res) {
736 dev_err(dev, "failed to get memory.\n");
737 return -EINVAL;
738 }
739 resources[0] = *res;
740
741 ret = platform_get_irq_byname(parent, "mc");
742 if (ret < 0)
743 return ret;
744
745 resources[1].start = ret;
746 resources[1].end = ret;
747 resources[1].flags = IORESOURCE_IRQ | irq_get_trigger_type(irq: ret);
748 resources[1].name = "mc";
749
750 /* allocate the child platform device */
751 musb = platform_device_alloc(name: "musb-hdrc",
752 id: (resources[0].start & 0xFFF) == 0x400 ? 0 : 1);
753 if (!musb) {
754 dev_err(dev, "failed to allocate musb device\n");
755 return -ENOMEM;
756 }
757
758 musb->dev.parent = dev;
759 musb->dev.dma_mask = &musb_dmamask;
760 musb->dev.coherent_dma_mask = musb_dmamask;
761 device_set_of_node_from_dev(dev: &musb->dev, dev2: &parent->dev);
762
763 glue->musb = musb;
764
765 ret = platform_device_add_resources(pdev: musb, res: resources,
766 ARRAY_SIZE(resources));
767 if (ret) {
768 dev_err(dev, "failed to add resources\n");
769 goto err;
770 }
771
772 config = devm_kzalloc(dev: &parent->dev, size: sizeof(*config), GFP_KERNEL);
773 if (!config) {
774 ret = -ENOMEM;
775 goto err;
776 }
777 pdata.config = config;
778 pdata.platform_ops = &dsps_ops;
779
780 config->num_eps = get_int_prop(dn, s: "mentor,num-eps");
781 config->ram_bits = get_int_prop(dn, s: "mentor,ram-bits");
782 config->host_port_deassert_reset_at_resume = 1;
783 pdata.mode = musb_get_mode(dev);
784 /* DT keeps this entry in mA, musb expects it as per USB spec */
785 pdata.power = get_int_prop(dn, s: "mentor,power") / 2;
786
787 ret = of_property_read_u32(np: dn, propname: "mentor,multipoint", out_value: &val);
788 if (!ret && val)
789 config->multipoint = true;
790
791 config->maximum_speed = usb_get_maximum_speed(dev: &parent->dev);
792 switch (config->maximum_speed) {
793 case USB_SPEED_LOW:
794 case USB_SPEED_FULL:
795 break;
796 case USB_SPEED_SUPER:
797 dev_warn(dev, "ignore incorrect maximum_speed "
798 "(super-speed) setting in dts");
799 fallthrough;
800 default:
801 config->maximum_speed = USB_SPEED_HIGH;
802 }
803
804 ret = platform_device_add_data(pdev: musb, data: &pdata, size: sizeof(pdata));
805 if (ret) {
806 dev_err(dev, "failed to add platform_data\n");
807 goto err;
808 }
809
810 ret = platform_device_add(pdev: musb);
811 if (ret) {
812 dev_err(dev, "failed to register musb device\n");
813 goto err;
814 }
815 return 0;
816
817err:
818 platform_device_put(pdev: musb);
819 return ret;
820}
821
822static irqreturn_t dsps_vbus_threaded_irq(int irq, void *priv)
823{
824 struct dsps_glue *glue = priv;
825 struct musb *musb = platform_get_drvdata(pdev: glue->musb);
826
827 if (!musb)
828 return IRQ_NONE;
829
830 dev_dbg(glue->dev, "VBUS interrupt\n");
831 dsps_mod_timer(glue, wait_ms: 0);
832
833 return IRQ_HANDLED;
834}
835
836static int dsps_setup_optional_vbus_irq(struct platform_device *pdev,
837 struct dsps_glue *glue)
838{
839 int error;
840
841 glue->vbus_irq = platform_get_irq_byname_optional(dev: pdev, name: "vbus");
842 if (glue->vbus_irq == -EPROBE_DEFER)
843 return -EPROBE_DEFER;
844
845 if (glue->vbus_irq <= 0) {
846 glue->vbus_irq = 0;
847 return 0;
848 }
849
850 error = devm_request_threaded_irq(dev: glue->dev, irq: glue->vbus_irq,
851 NULL, thread_fn: dsps_vbus_threaded_irq,
852 IRQF_SHARED,
853 devname: "vbus", dev_id: glue);
854 if (error) {
855 glue->vbus_irq = 0;
856 return error;
857 }
858 dev_dbg(glue->dev, "VBUS irq %i configured\n", glue->vbus_irq);
859
860 return 0;
861}
862
863static int dsps_probe(struct platform_device *pdev)
864{
865 const struct of_device_id *match;
866 const struct dsps_musb_wrapper *wrp;
867 struct dsps_glue *glue;
868 int ret;
869
870 if (!strcmp(pdev->name, "musb-hdrc"))
871 return -ENODEV;
872
873 match = of_match_node(matches: musb_dsps_of_match, node: pdev->dev.of_node);
874 if (!match) {
875 dev_err(&pdev->dev, "fail to get matching of_match struct\n");
876 return -EINVAL;
877 }
878 wrp = match->data;
879
880 if (of_device_is_compatible(device: pdev->dev.of_node, "ti,musb-dm816"))
881 dsps_ops.read_fifo = dsps_read_fifo32;
882
883 /* allocate glue */
884 glue = devm_kzalloc(dev: &pdev->dev, size: sizeof(*glue), GFP_KERNEL);
885 if (!glue)
886 return -ENOMEM;
887
888 glue->dev = &pdev->dev;
889 glue->wrp = wrp;
890 glue->usbss_base = of_iomap(node: pdev->dev.parent->of_node, index: 0);
891 if (!glue->usbss_base)
892 return -ENXIO;
893
894 platform_set_drvdata(pdev, data: glue);
895 pm_runtime_enable(dev: &pdev->dev);
896 ret = dsps_create_musb_pdev(glue, parent: pdev);
897 if (ret)
898 goto err;
899
900 if (usb_get_dr_mode(dev: &pdev->dev) == USB_DR_MODE_PERIPHERAL) {
901 ret = dsps_setup_optional_vbus_irq(pdev, glue);
902 if (ret)
903 goto unregister_pdev;
904 }
905
906 return 0;
907
908unregister_pdev:
909 platform_device_unregister(glue->musb);
910err:
911 pm_runtime_disable(dev: &pdev->dev);
912 iounmap(addr: glue->usbss_base);
913 return ret;
914}
915
916static void dsps_remove(struct platform_device *pdev)
917{
918 struct dsps_glue *glue = platform_get_drvdata(pdev);
919
920 platform_device_unregister(glue->musb);
921
922 pm_runtime_disable(dev: &pdev->dev);
923 iounmap(addr: glue->usbss_base);
924}
925
926static const struct dsps_musb_wrapper am33xx_driver_data = {
927 .revision = 0x00,
928 .control = 0x14,
929 .status = 0x18,
930 .epintr_set = 0x38,
931 .epintr_clear = 0x40,
932 .epintr_status = 0x30,
933 .coreintr_set = 0x3c,
934 .coreintr_clear = 0x44,
935 .coreintr_status = 0x34,
936 .phy_utmi = 0xe0,
937 .mode = 0xe8,
938 .tx_mode = 0x70,
939 .rx_mode = 0x74,
940 .reset = 0,
941 .otg_disable = 21,
942 .iddig = 8,
943 .iddig_mux = 7,
944 .usb_shift = 0,
945 .usb_mask = 0x1ff,
946 .usb_bitmap = (0x1ff << 0),
947 .drvvbus = 8,
948 .txep_shift = 0,
949 .txep_mask = 0xffff,
950 .txep_bitmap = (0xffff << 0),
951 .rxep_shift = 16,
952 .rxep_mask = 0xfffe,
953 .rxep_bitmap = (0xfffe << 16),
954 .poll_timeout = 2000, /* ms */
955};
956
957static const struct of_device_id musb_dsps_of_match[] = {
958 { .compatible = "ti,musb-am33xx",
959 .data = &am33xx_driver_data, },
960 { .compatible = "ti,musb-dm816",
961 .data = &am33xx_driver_data, },
962 { },
963};
964MODULE_DEVICE_TABLE(of, musb_dsps_of_match);
965
966#ifdef CONFIG_PM_SLEEP
967static int dsps_suspend(struct device *dev)
968{
969 struct dsps_glue *glue = dev_get_drvdata(dev);
970 const struct dsps_musb_wrapper *wrp = glue->wrp;
971 struct musb *musb = platform_get_drvdata(pdev: glue->musb);
972 void __iomem *mbase;
973 int ret;
974
975 if (!musb)
976 /* This can happen if the musb device is in -EPROBE_DEFER */
977 return 0;
978
979 ret = pm_runtime_get_sync(dev);
980 if (ret < 0) {
981 pm_runtime_put_noidle(dev);
982 return ret;
983 }
984
985 timer_delete_sync(timer: &musb->dev_timer);
986
987 mbase = musb->ctrl_base;
988 glue->context.control = musb_readl(addr: mbase, offset: wrp->control);
989 glue->context.epintr = musb_readl(addr: mbase, offset: wrp->epintr_set);
990 glue->context.coreintr = musb_readl(addr: mbase, offset: wrp->coreintr_set);
991 glue->context.phy_utmi = musb_readl(addr: mbase, offset: wrp->phy_utmi);
992 glue->context.mode = musb_readl(addr: mbase, offset: wrp->mode);
993 glue->context.tx_mode = musb_readl(addr: mbase, offset: wrp->tx_mode);
994 glue->context.rx_mode = musb_readl(addr: mbase, offset: wrp->rx_mode);
995
996 dsps_dma_controller_suspend(glue);
997
998 return 0;
999}
1000
1001static int dsps_resume(struct device *dev)
1002{
1003 struct dsps_glue *glue = dev_get_drvdata(dev);
1004 const struct dsps_musb_wrapper *wrp = glue->wrp;
1005 struct musb *musb = platform_get_drvdata(pdev: glue->musb);
1006 void __iomem *mbase;
1007
1008 if (!musb)
1009 return 0;
1010
1011 dsps_dma_controller_resume(glue);
1012
1013 mbase = musb->ctrl_base;
1014 musb_writel(addr: mbase, offset: wrp->control, data: glue->context.control);
1015 musb_writel(addr: mbase, offset: wrp->epintr_set, data: glue->context.epintr);
1016 musb_writel(addr: mbase, offset: wrp->coreintr_set, data: glue->context.coreintr);
1017 musb_writel(addr: mbase, offset: wrp->phy_utmi, data: glue->context.phy_utmi);
1018 musb_writel(addr: mbase, offset: wrp->mode, data: glue->context.mode);
1019 musb_writel(addr: mbase, offset: wrp->tx_mode, data: glue->context.tx_mode);
1020 musb_writel(addr: mbase, offset: wrp->rx_mode, data: glue->context.rx_mode);
1021 if (musb->xceiv->otg->state == OTG_STATE_B_IDLE &&
1022 musb->port_mode == MUSB_OTG)
1023 dsps_mod_timer(glue, wait_ms: -1);
1024
1025 pm_runtime_put(dev);
1026
1027 return 0;
1028}
1029#endif
1030
1031static SIMPLE_DEV_PM_OPS(dsps_pm_ops, dsps_suspend, dsps_resume);
1032
1033static struct platform_driver dsps_usbss_driver = {
1034 .probe = dsps_probe,
1035 .remove = dsps_remove,
1036 .driver = {
1037 .name = "musb-dsps",
1038 .pm = &dsps_pm_ops,
1039 .of_match_table = musb_dsps_of_match,
1040 },
1041};
1042
1043MODULE_DESCRIPTION("TI DSPS MUSB Glue Layer");
1044MODULE_AUTHOR("Ravi B <ravibabu@ti.com>");
1045MODULE_AUTHOR("Ajay Kumar Gupta <ajay.gupta@ti.com>");
1046MODULE_LICENSE("GPL v2");
1047
1048module_platform_driver(dsps_usbss_driver);
1049

source code of linux/drivers/usb/musb/musb_dsps.c