| 1 | /* SPDX-License-Identifier: GPL-2.0 */ |
| 2 | #ifndef DDK750_MODE_H__ |
| 3 | #define DDK750_MODE_H__ |
| 4 | |
| 5 | #include "ddk750_chip.h" |
| 6 | |
| 7 | enum spolarity { |
| 8 | POS = 0, /* positive */ |
| 9 | NEG, /* negative */ |
| 10 | }; |
| 11 | |
| 12 | struct mode_parameter { |
| 13 | /* Horizontal timing. */ |
| 14 | unsigned long horizontal_total; |
| 15 | unsigned long horizontal_display_end; |
| 16 | unsigned long horizontal_sync_start; |
| 17 | unsigned long horizontal_sync_width; |
| 18 | enum spolarity horizontal_sync_polarity; |
| 19 | |
| 20 | /* Vertical timing. */ |
| 21 | unsigned long vertical_total; |
| 22 | unsigned long vertical_display_end; |
| 23 | unsigned long vertical_sync_start; |
| 24 | unsigned long vertical_sync_height; |
| 25 | enum spolarity vertical_sync_polarity; |
| 26 | |
| 27 | /* Refresh timing. */ |
| 28 | unsigned long pixel_clock; |
| 29 | unsigned long horizontal_frequency; |
| 30 | unsigned long vertical_frequency; |
| 31 | |
| 32 | /* Clock Phase. This clock phase only applies to Panel. */ |
| 33 | enum spolarity clock_phase_polarity; |
| 34 | }; |
| 35 | |
| 36 | int ddk750_set_mode_timing(struct mode_parameter *parm, enum clock_type clock); |
| 37 | #endif |
| 38 | |