1// SPDX-License-Identifier: GPL-2.0+
2
3#include <linux/bitops.h>
4#include <linux/bitfield.h>
5#include <linux/util_macros.h>
6#include <linux/module.h>
7#include <linux/i2c.h>
8#include <linux/regmap.h>
9#include <linux/regulator/driver.h>
10#include <linux/regulator/machine.h>
11#include <linux/regulator/of_regulator.h>
12#include <linux/mod_devicetable.h>
13
14/* Register */
15#define RTQ2208_REG_GLOBAL_INT1 0x12
16#define RTQ2208_REG_FLT_RECORDBUCK_CB 0x18
17#define RTQ2208_REG_GLOBAL_INT1_MASK 0x1D
18#define RTQ2208_REG_FLT_MASKBUCK_CB 0x1F
19#define RTQ2208_REG_BUCK_C_CFG0 0x32
20#define RTQ2208_REG_BUCK_B_CFG0 0x42
21#define RTQ2208_REG_BUCK_A_CFG0 0x52
22#define RTQ2208_REG_BUCK_D_CFG0 0x62
23#define RTQ2208_REG_BUCK_G_CFG0 0x72
24#define RTQ2208_REG_BUCK_F_CFG0 0x82
25#define RTQ2208_REG_BUCK_E_CFG0 0x92
26#define RTQ2208_REG_BUCK_H_CFG0 0xA2
27#define RTQ2208_REG_LDO1_CFG 0xB1
28#define RTQ2208_REG_LDO2_CFG 0xC1
29#define RTQ2208_REG_LDO_DVS_CTRL 0xD0
30#define RTQ2208_REG_HIDDEN_BUCKPH 0x55
31#define RTQ2208_REG_HIDDEN_LDOCFG0 0x8F
32#define RTQ2208_REG_HIDDEN_LDOCFG1 0x96
33#define RTQ2208_REG_HIDDEN0 0xFE
34#define RTQ2208_REG_HIDDEN1 0xFF
35
36/* Mask */
37#define RTQ2208_BUCK_NR_MTP_SEL_MASK GENMASK(7, 0)
38#define RTQ2208_BUCK_EN_NR_MTP_SEL0_MASK BIT(0)
39#define RTQ2208_BUCK_EN_NR_MTP_SEL1_MASK BIT(1)
40#define RTQ2208_BUCK_RSPUP_MASK GENMASK(6, 4)
41#define RTQ2208_BUCK_RSPDN_MASK GENMASK(2, 0)
42#define RTQ2208_BUCK_NRMODE_MASK BIT(5)
43#define RTQ2208_BUCK_STRMODE_MASK BIT(5)
44#define RTQ2208_BUCK_EN_STR_MASK BIT(0)
45#define RTQ2208_LDO_EN_STR_MASK BIT(7)
46#define RTQ2208_EN_DIS_MASK BIT(0)
47#define RTQ2208_BUCK_RAMP_SEL_MASK GENMASK(2, 0)
48#define RTQ2208_HD_INT_MASK BIT(0)
49#define RTQ2208_LDO1_DISCHG_EN_MASK BIT(4)
50#define RTQ2208_LDO1_VOSEL_SD_MASK BIT(5)
51#define RTQ2208_LDO2_DISCHG_EN_MASK BIT(6)
52#define RTQ2208_LDO2_VOSEL_SD_MASK BIT(7)
53#define RTQ2208_MASK_BUCKPH_GROUP1 GENMASK(6, 4)
54#define RTQ2208_MASK_BUCKPH_GROUP2 GENMASK(2, 0)
55#define RTQ2208_MASK_LDO2_OPT0 BIT(7)
56#define RTQ2208_MASK_LDO2_OPT1 BIT(7)
57#define RTQ2208_MASK_LDO1_FIXED BIT(6)
58
59/* Size */
60#define RTQ2208_VOUT_MAXNUM 256
61#define RTQ2208_BUCK_NUM_IRQ_REGS 5
62#define RTQ2208_STS_NUM_IRQ_REGS 2
63
64/* Value */
65#define RTQ2208_RAMP_VALUE_MIN_uV 500
66#define RTQ2208_RAMP_VALUE_MAX_uV 16000
67
68#define RTQ2208_BUCK_MASK(uv_irq, ov_irq) (1 << ((uv_irq) % 8) | 1 << ((ov_irq) % 8))
69
70enum {
71 RTQ2208_BUCK_B = 0,
72 RTQ2208_BUCK_C,
73 RTQ2208_BUCK_D,
74 RTQ2208_BUCK_A,
75 RTQ2208_BUCK_F,
76 RTQ2208_BUCK_G,
77 RTQ2208_BUCK_H,
78 RTQ2208_BUCK_E,
79 RTQ2208_LDO2,
80 RTQ2208_LDO1,
81 RTQ2208_LDO_MAX,
82};
83
84enum {
85 RTQ2208_AUTO_MODE = 0,
86 RTQ2208_FCCM,
87};
88
89struct rtq2208_regulator_desc {
90 struct regulator_desc desc;
91 unsigned int mtp_sel_reg;
92 unsigned int mtp_sel_mask;
93 unsigned int mode_reg;
94 unsigned int mode_mask;
95 unsigned int suspend_config_reg;
96 unsigned int suspend_enable_mask;
97 unsigned int suspend_mode_mask;
98};
99
100struct rtq2208_rdev_map {
101 struct regulator_dev *rdev[RTQ2208_LDO_MAX];
102 struct regmap *regmap;
103 struct device *dev;
104};
105
106/* set Normal Auto/FCCM mode */
107static int rtq2208_set_mode(struct regulator_dev *rdev, unsigned int mode)
108{
109 const struct rtq2208_regulator_desc *rdesc =
110 (const struct rtq2208_regulator_desc *)rdev->desc;
111 unsigned int val, shift;
112
113 switch (mode) {
114 case REGULATOR_MODE_NORMAL:
115 val = RTQ2208_AUTO_MODE;
116 break;
117 case REGULATOR_MODE_FAST:
118 val = RTQ2208_FCCM;
119 break;
120 default:
121 return -EINVAL;
122 }
123
124 shift = ffs(rdesc->mode_mask) - 1;
125 return regmap_update_bits(map: rdev->regmap, reg: rdesc->mode_reg,
126 mask: rdesc->mode_mask, val: val << shift);
127}
128
129static unsigned int rtq2208_get_mode(struct regulator_dev *rdev)
130{
131 const struct rtq2208_regulator_desc *rdesc =
132 (const struct rtq2208_regulator_desc *)rdev->desc;
133 unsigned int mode_val;
134 int ret;
135
136 ret = regmap_read(map: rdev->regmap, reg: rdesc->mode_reg, val: &mode_val);
137 if (ret)
138 return REGULATOR_MODE_INVALID;
139
140 return (mode_val & rdesc->mode_mask) ? REGULATOR_MODE_FAST : REGULATOR_MODE_NORMAL;
141}
142
143static int rtq2208_set_ramp_delay(struct regulator_dev *rdev, int ramp_delay)
144{
145 const struct regulator_desc *desc = rdev->desc;
146 unsigned int sel = 0, val;
147
148 ramp_delay = max(ramp_delay, RTQ2208_RAMP_VALUE_MIN_uV);
149 ramp_delay = min(ramp_delay, RTQ2208_RAMP_VALUE_MAX_uV);
150
151 ramp_delay /= RTQ2208_RAMP_VALUE_MIN_uV;
152
153 /*
154 * fls(ramp_delay) - 1: doing LSB shift, let it starts from 0
155 *
156 * RTQ2208_BUCK_RAMP_SEL_MASK - sel: doing descending order shifting.
157 * Because the relation of seleltion and value is like that
158 *
159 * seletion: value
160 * 010: 16mv
161 * ...
162 * 111: 0.5mv
163 *
164 * For example, if I would like to select 16mv, the fls(ramp_delay) - 1 will be 0b010,
165 * and I need to use 0b111 - sel to do the shifting
166 */
167
168 sel = fls(x: ramp_delay) - 1;
169 sel = RTQ2208_BUCK_RAMP_SEL_MASK - sel;
170
171 val = FIELD_PREP(RTQ2208_BUCK_RSPUP_MASK, sel) | FIELD_PREP(RTQ2208_BUCK_RSPDN_MASK, sel);
172
173 return regmap_update_bits(map: rdev->regmap, reg: desc->ramp_reg,
174 RTQ2208_BUCK_RSPUP_MASK | RTQ2208_BUCK_RSPDN_MASK, val);
175}
176
177static int rtq2208_set_suspend_enable(struct regulator_dev *rdev)
178{
179 const struct rtq2208_regulator_desc *rdesc =
180 (const struct rtq2208_regulator_desc *)rdev->desc;
181
182 return regmap_set_bits(map: rdev->regmap, reg: rdesc->suspend_config_reg, bits: rdesc->suspend_enable_mask);
183}
184
185static int rtq2208_set_suspend_disable(struct regulator_dev *rdev)
186{
187 const struct rtq2208_regulator_desc *rdesc =
188 (const struct rtq2208_regulator_desc *)rdev->desc;
189
190 return regmap_update_bits(map: rdev->regmap, reg: rdesc->suspend_config_reg, mask: rdesc->suspend_enable_mask, val: 0);
191}
192
193static int rtq2208_set_suspend_mode(struct regulator_dev *rdev, unsigned int mode)
194{
195 const struct rtq2208_regulator_desc *rdesc =
196 (const struct rtq2208_regulator_desc *)rdev->desc;
197 unsigned int val, shift;
198
199 switch (mode) {
200 case REGULATOR_MODE_NORMAL:
201 val = RTQ2208_AUTO_MODE;
202 break;
203 case REGULATOR_MODE_FAST:
204 val = RTQ2208_FCCM;
205 break;
206 default:
207 return -EINVAL;
208 }
209
210 shift = ffs(rdesc->suspend_mode_mask) - 1;
211
212 return regmap_update_bits(map: rdev->regmap, reg: rdesc->suspend_config_reg,
213 mask: rdesc->suspend_mode_mask, val: val << shift);
214}
215
216static const struct regulator_ops rtq2208_regulator_buck_ops = {
217 .enable = regulator_enable_regmap,
218 .disable = regulator_disable_regmap,
219 .is_enabled = regulator_is_enabled_regmap,
220 .list_voltage = regulator_list_voltage_linear_range,
221 .set_voltage_sel = regulator_set_voltage_sel_regmap,
222 .get_voltage_sel = regulator_get_voltage_sel_regmap,
223 .set_mode = rtq2208_set_mode,
224 .get_mode = rtq2208_get_mode,
225 .set_ramp_delay = rtq2208_set_ramp_delay,
226 .set_active_discharge = regulator_set_active_discharge_regmap,
227 .set_suspend_enable = rtq2208_set_suspend_enable,
228 .set_suspend_disable = rtq2208_set_suspend_disable,
229 .set_suspend_mode = rtq2208_set_suspend_mode,
230};
231
232static const struct regulator_ops rtq2208_regulator_ldo_fix_ops = {
233 .enable = regulator_enable_regmap,
234 .disable = regulator_disable_regmap,
235 .is_enabled = regulator_is_enabled_regmap,
236 .set_active_discharge = regulator_set_active_discharge_regmap,
237 .set_suspend_enable = rtq2208_set_suspend_enable,
238 .set_suspend_disable = rtq2208_set_suspend_disable,
239};
240
241static const struct regulator_ops rtq2208_regulator_ldo_adj_ops = {
242 .enable = regulator_enable_regmap,
243 .disable = regulator_disable_regmap,
244 .is_enabled = regulator_is_enabled_regmap,
245 .list_voltage = regulator_list_voltage_table,
246 .set_voltage_sel = regulator_set_voltage_sel_regmap,
247 .get_voltage_sel = regulator_get_voltage_sel_regmap,
248 .set_active_discharge = regulator_set_active_discharge_regmap,
249 .set_suspend_enable = rtq2208_set_suspend_enable,
250 .set_suspend_disable = rtq2208_set_suspend_disable,
251};
252
253static const unsigned int rtq2208_ldo_volt_table[] = {
254 1800000,
255 3300000,
256};
257
258static unsigned int rtq2208_of_map_mode(unsigned int mode)
259{
260 switch (mode) {
261 case RTQ2208_AUTO_MODE:
262 return REGULATOR_MODE_NORMAL;
263 case RTQ2208_FCCM:
264 return REGULATOR_MODE_FAST;
265 default:
266 return REGULATOR_MODE_INVALID;
267 }
268}
269
270static int rtq2208_init_irq_mask(struct rtq2208_rdev_map *rdev_map, unsigned int *buck_masks)
271{
272 unsigned char buck_clr_masks[5] = {0x33, 0x33, 0x33, 0x33, 0x33},
273 sts_clr_masks[2] = {0xE7, 0xF7}, sts_masks[2] = {0xE6, 0xF6};
274 int ret;
275
276 /* write clear all buck irq once */
277 ret = regmap_bulk_write(map: rdev_map->regmap, RTQ2208_REG_FLT_RECORDBUCK_CB, val: buck_clr_masks, val_count: 5);
278 if (ret)
279 return dev_err_probe(dev: rdev_map->dev, err: ret, fmt: "Failed to clr buck irqs\n");
280
281 /* write clear general irq once */
282 ret = regmap_bulk_write(map: rdev_map->regmap, RTQ2208_REG_GLOBAL_INT1, val: sts_clr_masks, val_count: 2);
283 if (ret)
284 return dev_err_probe(dev: rdev_map->dev, err: ret, fmt: "Failed to clr general irqs\n");
285
286 /* unmask buck ov/uv irq */
287 ret = regmap_bulk_write(map: rdev_map->regmap, RTQ2208_REG_FLT_MASKBUCK_CB, val: buck_masks, val_count: 5);
288 if (ret)
289 return dev_err_probe(dev: rdev_map->dev, err: ret, fmt: "Failed to unmask buck irqs\n");
290
291 /* unmask needed general irq */
292 return regmap_bulk_write(map: rdev_map->regmap, RTQ2208_REG_GLOBAL_INT1_MASK, val: sts_masks, val_count: 2);
293}
294
295static irqreturn_t rtq2208_irq_handler(int irqno, void *devid)
296{
297 unsigned char buck_flags[RTQ2208_BUCK_NUM_IRQ_REGS], sts_flags[RTQ2208_STS_NUM_IRQ_REGS];
298 int ret = 0, i, uv_bit, ov_bit;
299 struct rtq2208_rdev_map *rdev_map = devid;
300 struct regulator_dev *rdev;
301
302 if (!rdev_map)
303 return IRQ_NONE;
304
305 /* read irq event */
306 ret = regmap_bulk_read(map: rdev_map->regmap, RTQ2208_REG_FLT_RECORDBUCK_CB,
307 val: buck_flags, ARRAY_SIZE(buck_flags));
308 if (ret)
309 return IRQ_NONE;
310
311 ret = regmap_bulk_read(map: rdev_map->regmap, RTQ2208_REG_GLOBAL_INT1,
312 val: sts_flags, ARRAY_SIZE(sts_flags));
313 if (ret)
314 return IRQ_NONE;
315
316 /* clear irq event */
317 ret = regmap_bulk_write(map: rdev_map->regmap, RTQ2208_REG_FLT_RECORDBUCK_CB,
318 val: buck_flags, ARRAY_SIZE(buck_flags));
319 if (ret)
320 return IRQ_NONE;
321
322 ret = regmap_bulk_write(map: rdev_map->regmap, RTQ2208_REG_GLOBAL_INT1,
323 val: sts_flags, ARRAY_SIZE(sts_flags));
324 if (ret)
325 return IRQ_NONE;
326
327 for (i = 0; i < RTQ2208_LDO_MAX; i++) {
328 if (!rdev_map->rdev[i])
329 continue;
330
331 rdev = rdev_map->rdev[i];
332 /* uv irq */
333 uv_bit = (i & 1) ? 4 : 0;
334 if (buck_flags[i >> 1] & (1 << uv_bit))
335 regulator_notifier_call_chain(rdev,
336 REGULATOR_EVENT_UNDER_VOLTAGE, NULL);
337 /* ov irq */
338 ov_bit = uv_bit + 1;
339 if (buck_flags[i >> 1] & (1 << ov_bit))
340 regulator_notifier_call_chain(rdev,
341 REGULATOR_EVENT_REGULATION_OUT, NULL);
342
343 /* hd irq */
344 if (sts_flags[1] & RTQ2208_HD_INT_MASK)
345 regulator_notifier_call_chain(rdev,
346 REGULATOR_EVENT_OVER_TEMP, NULL);
347 }
348
349 return IRQ_HANDLED;
350}
351
352#define BUCK_INFO(_name, _id) \
353{ \
354 .name = _name, \
355 .base = RTQ2208_REG_BUCK_##_id##_CFG0, \
356 .enable_reg = BUCK_RG_SHIFT(RTQ2208_REG_BUCK_##_id##_CFG0, 2), \
357 .dis_reg = RTQ2208_REG_BUCK_##_id##_CFG0, \
358}
359
360#define LDO_INFO(_name, _id) \
361{ \
362 .name = _name, \
363 .base = RTQ2208_REG_LDO##_id##_CFG, \
364 .enable_reg = RTQ2208_REG_LDO##_id##_CFG, \
365 .dis_mask = RTQ2208_LDO##_id##_DISCHG_EN_MASK, \
366 .dis_on = RTQ2208_LDO##_id##_DISCHG_EN_MASK, \
367 .vsel_mask = RTQ2208_LDO##_id##_VOSEL_SD_MASK, \
368}
369
370#define BUCK_RG_SHIFT(_base, _shift) (_base + _shift)
371#define VSEL_SHIFT(_sel) (_sel ? 3 : 1)
372#define MTP_SEL_MASK(_sel) RTQ2208_BUCK_EN_NR_MTP_SEL##_sel##_MASK
373
374static const struct linear_range rtq2208_vout_range[] = {
375 REGULATOR_LINEAR_RANGE(400000, 0, 180, 5000),
376 REGULATOR_LINEAR_RANGE(1310000, 181, 255, 10000),
377};
378
379static void rtq2208_init_regulator_desc(struct rtq2208_regulator_desc *rdesc, int mtp_sel, int idx,
380 unsigned int ldo1_fixed, unsigned int ldo2_fixed)
381{
382 struct regulator_desc *desc;
383 unsigned int fixed_uV;
384 static const struct {
385 char *name;
386 int base;
387 int enable_reg;
388 int dis_reg;
389 int dis_mask;
390 int dis_on;
391 int vsel_mask;
392 } regulator_info[] = {
393 BUCK_INFO("buck-b", B),
394 BUCK_INFO("buck-c", C),
395 BUCK_INFO("buck-d", D),
396 BUCK_INFO("buck-a", A),
397 BUCK_INFO("buck-f", F),
398 BUCK_INFO("buck-g", G),
399 BUCK_INFO("buck-h", H),
400 BUCK_INFO("buck-e", E),
401 LDO_INFO("ldo2", 2),
402 LDO_INFO("ldo1", 1),
403 }, *curr_info;
404
405 curr_info = regulator_info + idx;
406 desc = &rdesc->desc;
407 desc->name = curr_info->name;
408 desc->of_match = of_match_ptr(curr_info->name);
409 desc->regulators_node = of_match_ptr("regulators");
410 desc->id = idx;
411 desc->owner = THIS_MODULE;
412 desc->type = REGULATOR_VOLTAGE;
413 desc->enable_mask = mtp_sel ? MTP_SEL_MASK(1) : MTP_SEL_MASK(0);
414 desc->enable_reg = curr_info->enable_reg;
415 desc->active_discharge_off = 0;
416
417 rdesc->mode_mask = RTQ2208_BUCK_NRMODE_MASK;
418
419 switch (idx) {
420 case RTQ2208_BUCK_B ... RTQ2208_BUCK_E:
421 /* init buck desc */
422 desc->ops = &rtq2208_regulator_buck_ops;
423 desc->vsel_reg = curr_info->base + VSEL_SHIFT(mtp_sel);
424 desc->vsel_mask = RTQ2208_BUCK_NR_MTP_SEL_MASK;
425 desc->n_voltages = RTQ2208_VOUT_MAXNUM;
426 desc->linear_ranges = rtq2208_vout_range;
427 desc->n_linear_ranges = ARRAY_SIZE(rtq2208_vout_range);
428 desc->ramp_reg = BUCK_RG_SHIFT(curr_info->base, 5);
429 desc->of_map_mode = rtq2208_of_map_mode;
430 desc->active_discharge_reg = curr_info->dis_reg;
431 desc->active_discharge_on = RTQ2208_EN_DIS_MASK;
432 desc->active_discharge_mask = RTQ2208_EN_DIS_MASK;
433
434 rdesc->mode_reg = BUCK_RG_SHIFT(curr_info->base, 2);
435 rdesc->suspend_config_reg = BUCK_RG_SHIFT(curr_info->base, 4);
436 rdesc->suspend_enable_mask = RTQ2208_BUCK_EN_STR_MASK;
437 rdesc->suspend_mode_mask = RTQ2208_BUCK_STRMODE_MASK;
438 break;
439 default:
440 fixed_uV = idx == RTQ2208_LDO2 ? ldo2_fixed : ldo1_fixed;
441 if (fixed_uV) {
442 desc->n_voltages = 1;
443 desc->fixed_uV = fixed_uV;
444 desc->ops = &rtq2208_regulator_ldo_fix_ops;
445 } else {
446 desc->n_voltages = ARRAY_SIZE(rtq2208_ldo_volt_table);
447 desc->volt_table = rtq2208_ldo_volt_table;
448 desc->ops = &rtq2208_regulator_ldo_adj_ops;
449 }
450
451 /* init ldo desc */
452 desc->active_discharge_reg = RTQ2208_REG_LDO_DVS_CTRL;
453 desc->active_discharge_on = curr_info->dis_on;
454 desc->active_discharge_mask = curr_info->dis_mask;
455 desc->vsel_reg = RTQ2208_REG_LDO_DVS_CTRL;
456 desc->vsel_mask = curr_info->vsel_mask;
457
458 rdesc->suspend_config_reg = curr_info->base;
459 rdesc->suspend_enable_mask = RTQ2208_LDO_EN_STR_MASK;
460 break;
461 }
462}
463
464static int rtq2208_parse_regulator_dt_data(int n_regulator, const unsigned int *regulator_idx_table,
465 struct rtq2208_regulator_desc *rdesc[RTQ2208_LDO_MAX], struct device *dev,
466 unsigned int ldo1_fixed, unsigned int ldo2_fixed)
467{
468 int mtp_sel, i, idx;
469
470 /* get mtp_sel0 or mtp_sel1 */
471 mtp_sel = device_property_read_bool(dev, propname: "richtek,mtp-sel-high");
472
473 for (i = 0; i < n_regulator; i++) {
474 idx = regulator_idx_table[i];
475
476 rdesc[i] = devm_kcalloc(dev, n: 1, size: sizeof(*rdesc[0]), GFP_KERNEL);
477 if (!rdesc[i])
478 return -ENOMEM;
479
480 rtq2208_init_regulator_desc(rdesc: rdesc[i], mtp_sel, idx, ldo1_fixed, ldo2_fixed);
481 }
482
483 return 0;
484
485}
486
487static int rtq2208_regulator_check(struct device *dev, int *num, int *regulator_idx_table,
488 unsigned int *buck_masks, unsigned int *ldo1_fixed_uV,
489 unsigned int *ldo2_fixed_uV)
490{
491 struct regmap *regmap = dev_get_regmap(dev, NULL);
492 bool rtq2208_used_table[RTQ2208_LDO_MAX] = {0};
493 u8 entry_key[] = { 0x69, 0x01 };
494 unsigned int buck_phase, ldo_cfg0, ldo_cfg1;
495 int i, ret;
496 u8 mask;
497
498 ret = regmap_raw_write(map: regmap, RTQ2208_REG_HIDDEN0, val: entry_key, ARRAY_SIZE(entry_key));
499 if (ret)
500 return dev_err_probe(dev, err: ret, fmt: "Failed to enter hidden page\n");
501
502 ret = regmap_read(map: regmap, RTQ2208_REG_HIDDEN_BUCKPH, val: &buck_phase);
503 if (ret)
504 return dev_err_probe(dev, err: ret, fmt: "Failed to read buck phase configuration\n");
505
506 ret = regmap_read(map: regmap, RTQ2208_REG_HIDDEN_LDOCFG0, val: &ldo_cfg0);
507 if (ret)
508 return dev_err_probe(dev, err: ret, fmt: "Failed to read ldo cfg0\n");
509
510 ret = regmap_read(map: regmap, RTQ2208_REG_HIDDEN_LDOCFG1, val: &ldo_cfg1);
511 if (ret)
512 return dev_err_probe(dev, err: ret, fmt: "Failed to read ldo cfg1\n");
513
514 ret = regmap_write(map: regmap, RTQ2208_REG_HIDDEN1, val: 0x00);
515 if (ret)
516 return dev_err_probe(dev, err: ret, fmt: "Failed to exit hidden page\n");
517
518 dev_info(dev, "BUCK Phase 0x%x\n", buck_phase);
519 /*
520 * Use buck phase configuration to assign used table mask
521 * GROUP1 GROUP2
522 * 0 -> 2P + 2P BC FG
523 * 1 -> 2P + 1P + 1P BCA FGE
524 * 2 -> 1P + 1P + 1P + 1P BCDA FGHE
525 * 3 -> 3P + 1P BC FG
526 * others -> 4P C G
527 */
528 switch (FIELD_GET(RTQ2208_MASK_BUCKPH_GROUP1, buck_phase)) {
529 case 2:
530 rtq2208_used_table[RTQ2208_BUCK_D] = true;
531 fallthrough;
532 case 1:
533 rtq2208_used_table[RTQ2208_BUCK_A] = true;
534 fallthrough;
535 case 0:
536 case 3:
537 rtq2208_used_table[RTQ2208_BUCK_B] = true;
538 fallthrough;
539 default:
540 rtq2208_used_table[RTQ2208_BUCK_C] = true;
541 break;
542 }
543
544 switch (FIELD_GET(RTQ2208_MASK_BUCKPH_GROUP2, buck_phase)) {
545 case 2:
546 rtq2208_used_table[RTQ2208_BUCK_H] = true;
547 fallthrough;
548 case 1:
549 rtq2208_used_table[RTQ2208_BUCK_E] = true;
550 fallthrough;
551 case 0:
552 case 3:
553 rtq2208_used_table[RTQ2208_BUCK_F] = true;
554 fallthrough;
555 default:
556 rtq2208_used_table[RTQ2208_BUCK_G] = true;
557 break;
558 }
559
560 *ldo1_fixed_uV = FIELD_GET(RTQ2208_MASK_LDO1_FIXED, ldo_cfg1) ? 1200000 : 0;
561
562 if (!FIELD_GET(RTQ2208_MASK_LDO2_OPT0, ldo_cfg0) &&
563 !FIELD_GET(RTQ2208_MASK_LDO2_OPT1, ldo_cfg1))
564 *ldo2_fixed_uV = 0;
565 else if (FIELD_GET(RTQ2208_MASK_LDO2_OPT1, ldo_cfg1))
566 *ldo2_fixed_uV = 900000;
567 else
568 *ldo2_fixed_uV = 1200000;
569
570 /* By default, LDO1 & LDO2 are always used */
571 rtq2208_used_table[RTQ2208_LDO1] = rtq2208_used_table[RTQ2208_LDO2] = true;
572
573 for (i = 0; i < RTQ2208_LDO_MAX; i++) {
574 if (!rtq2208_used_table[i])
575 continue;
576
577 regulator_idx_table[(*num)++] = i;
578
579 mask = RTQ2208_BUCK_MASK(4 * i, 4 * i + 1);
580 buck_masks[i >> 1] &= ~mask;
581 }
582
583 return 0;
584}
585
586static const struct regmap_config rtq2208_regmap_config = {
587 .reg_bits = 8,
588 .val_bits = 8,
589 .max_register = 0xFF,
590};
591
592static int rtq2208_probe(struct i2c_client *i2c)
593{
594 struct device *dev = &i2c->dev;
595 struct regmap *regmap;
596 struct rtq2208_regulator_desc *rdesc[RTQ2208_LDO_MAX];
597 struct regulator_dev *rdev;
598 struct regulator_config cfg = {};
599 struct rtq2208_rdev_map *rdev_map;
600 int i, ret = 0, idx, n_regulator = 0;
601 unsigned int regulator_idx_table[RTQ2208_LDO_MAX],
602 buck_masks[RTQ2208_BUCK_NUM_IRQ_REGS] = {0x33, 0x33, 0x33, 0x33, 0x33};
603 unsigned int ldo1_fixed_uV, ldo2_fixed_uV;
604
605 rdev_map = devm_kzalloc(dev, size: sizeof(struct rtq2208_rdev_map), GFP_KERNEL);
606 if (!rdev_map)
607 return -ENOMEM;
608
609 regmap = devm_regmap_init_i2c(i2c, &rtq2208_regmap_config);
610 if (IS_ERR(ptr: regmap))
611 return dev_err_probe(dev, err: PTR_ERR(ptr: regmap), fmt: "Failed to allocate regmap\n");
612
613 /* get needed regulator */
614 ret = rtq2208_regulator_check(dev, num: &n_regulator, regulator_idx_table, buck_masks,
615 ldo1_fixed_uV: &ldo1_fixed_uV, ldo2_fixed_uV: &ldo2_fixed_uV);
616 if (ret)
617 return dev_err_probe(dev, err: ret, fmt: "Failed to check used regulators\n");
618
619 rdev_map->regmap = regmap;
620 rdev_map->dev = dev;
621
622 cfg.dev = dev;
623
624 /* init regulator desc */
625 ret = rtq2208_parse_regulator_dt_data(n_regulator, regulator_idx_table, rdesc, dev,
626 ldo1_fixed: ldo1_fixed_uV, ldo2_fixed: ldo2_fixed_uV);
627 if (ret)
628 return ret;
629
630 for (i = 0; i < n_regulator; i++) {
631 idx = regulator_idx_table[i];
632
633 /* register regulator */
634 rdev = devm_regulator_register(dev, regulator_desc: &rdesc[i]->desc, config: &cfg);
635 if (IS_ERR(ptr: rdev))
636 return PTR_ERR(ptr: rdev);
637
638 rdev_map->rdev[idx] = rdev;
639 }
640
641 /* init interrupt mask */
642 ret = rtq2208_init_irq_mask(rdev_map, buck_masks);
643 if (ret)
644 return ret;
645
646 /* register interrupt */
647 return devm_request_threaded_irq(dev, irq: i2c->irq, NULL, thread_fn: rtq2208_irq_handler,
648 IRQF_ONESHOT, devname: dev_name(dev), dev_id: rdev_map);
649}
650
651static const struct of_device_id rtq2208_device_tables[] = {
652 { .compatible = "richtek,rtq2208" },
653 {}
654};
655MODULE_DEVICE_TABLE(of, rtq2208_device_tables);
656
657static struct i2c_driver rtq2208_driver = {
658 .driver = {
659 .name = "rtq2208",
660 .of_match_table = rtq2208_device_tables,
661 },
662 .probe = rtq2208_probe,
663};
664module_i2c_driver(rtq2208_driver);
665
666MODULE_AUTHOR("Alina Yu <alina_yu@richtek.com>");
667MODULE_DESCRIPTION("Richtek RTQ2208 Regulator Driver");
668MODULE_LICENSE("GPL");
669

source code of linux/drivers/regulator/rtq2208-regulator.c