1// SPDX-License-Identifier: GPL-2.0
2// Copyright (c) 2018-2021, The Linux Foundation. All rights reserved.
3// Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.
4
5#define pr_fmt(fmt) "%s: " fmt, __func__
6
7#include <linux/err.h>
8#include <linux/kernel.h>
9#include <linux/module.h>
10#include <linux/of.h>
11#include <linux/platform_device.h>
12#include <linux/slab.h>
13#include <linux/string.h>
14#include <linux/regulator/driver.h>
15#include <linux/regulator/machine.h>
16#include <linux/regulator/of_regulator.h>
17
18#include <soc/qcom/cmd-db.h>
19#include <soc/qcom/rpmh.h>
20
21#include <dt-bindings/regulator/qcom,rpmh-regulator.h>
22
23/**
24 * enum rpmh_regulator_type - supported RPMh accelerator types
25 * @VRM: RPMh VRM accelerator which supports voting on enable, voltage,
26 * and mode of LDO, SMPS, and BOB type PMIC regulators.
27 * @XOB: RPMh XOB accelerator which supports voting on the enable state
28 * of PMIC regulators.
29 */
30enum rpmh_regulator_type {
31 VRM,
32 XOB,
33};
34
35/**
36 * enum regulator_hw_type - supported regulator types
37 * @SMPS: Switch mode power supply.
38 * @LDO: Linear Dropout regulator.
39 * @BOB: Buck/Boost type regulator.
40 * @VS: Simple voltage ON/OFF switch.
41 * @NUM_REGULATOR_TYPES: Number of regulator types.
42 */
43enum regulator_hw_type {
44 SMPS,
45 LDO,
46 BOB,
47 VS,
48 NUM_REGULATOR_TYPES,
49};
50
51struct resource_name_formats {
52 const char *rsc_name_fmt;
53 const char *rsc_name_fmt1;
54};
55
56static const struct resource_name_formats vreg_rsc_name_lookup[NUM_REGULATOR_TYPES] = {
57 [SMPS] = {.rsc_name_fmt: "S%d%s", .rsc_name_fmt1: "smp%s%d"},
58 [LDO] = {"L%d%s", "ldo%s%d"},
59 [BOB] = {"B%d%s", "bob%s%d"},
60 [VS] = {"VS%d%s", "vs%s%d"},
61};
62
63#define RPMH_REGULATOR_REG_VRM_VOLTAGE 0x0
64#define RPMH_REGULATOR_REG_ENABLE 0x4
65#define RPMH_REGULATOR_REG_VRM_MODE 0x8
66
67#define PMIC4_LDO_MODE_RETENTION 4
68#define PMIC4_LDO_MODE_LPM 5
69#define PMIC4_LDO_MODE_HPM 7
70
71#define PMIC4_SMPS_MODE_RETENTION 4
72#define PMIC4_SMPS_MODE_PFM 5
73#define PMIC4_SMPS_MODE_AUTO 6
74#define PMIC4_SMPS_MODE_PWM 7
75
76#define PMIC4_BOB_MODE_PASS 0
77#define PMIC4_BOB_MODE_PFM 1
78#define PMIC4_BOB_MODE_AUTO 2
79#define PMIC4_BOB_MODE_PWM 3
80
81#define PMIC5_LDO_MODE_RETENTION 3
82#define PMIC5_LDO_MODE_LPM 4
83#define PMIC5_LDO_MODE_HPM 7
84
85#define PMIC5_SMPS_MODE_RETENTION 3
86#define PMIC5_SMPS_MODE_PFM 4
87#define PMIC5_SMPS_MODE_AUTO 6
88#define PMIC5_SMPS_MODE_PWM 7
89
90#define PMIC5_BOB_MODE_PASS 2
91#define PMIC5_BOB_MODE_PFM 4
92#define PMIC5_BOB_MODE_AUTO 6
93#define PMIC5_BOB_MODE_PWM 7
94
95#define PMIC530_LDO_MODE_RETENTION 3
96#define PMIC530_LDO_MODE_LPM 4
97#define PMIC530_LDO_MODE_OPM 5
98#define PMIC530_LDO_MODE_HPM 7
99
100#define PMIC_ID_LEN 4
101/**
102 * struct rpmh_vreg_hw_data - RPMh regulator hardware configurations
103 * @regulator_type: RPMh accelerator type used to manage this
104 * regulator
105 * @ops: Pointer to regulator ops callback structure
106 * @voltage_ranges: The possible ranges of voltages supported by this
107 * PMIC regulator type
108 * @n_linear_ranges: Number of entries in voltage_ranges
109 * @n_voltages: The number of unique voltage set points defined
110 * by voltage_ranges
111 * @hpm_min_load_uA: Minimum load current in microamps that requires
112 * high power mode (HPM) operation. This is used
113 * for LDO hardware type regulators only.
114 * @pmic_mode_map: Array indexed by regulator framework mode
115 * containing PMIC hardware modes. Must be large
116 * enough to index all framework modes supported
117 * by this regulator hardware type.
118 * @of_map_mode: Maps an RPMH_REGULATOR_MODE_* mode value defined
119 * in device tree to a regulator framework mode
120 */
121struct rpmh_vreg_hw_data {
122 enum rpmh_regulator_type regulator_type;
123 const struct regulator_ops *ops;
124 const struct linear_range *voltage_ranges;
125 int n_linear_ranges;
126 int n_voltages;
127 int hpm_min_load_uA;
128 const int *pmic_mode_map;
129 unsigned int (*of_map_mode)(unsigned int mode);
130};
131
132/**
133 * struct rpmh_vreg - individual RPMh regulator data structure encapsulating a
134 * single regulator device
135 * @dev: Device pointer for the top-level PMIC RPMh
136 * regulator parent device. This is used as a
137 * handle in RPMh write requests.
138 * @addr: Base address of the regulator resource within
139 * an RPMh accelerator
140 * @rdesc: Regulator descriptor
141 * @hw_data: PMIC regulator configuration data for this RPMh
142 * regulator
143 * @always_wait_for_ack: Boolean flag indicating if a request must always
144 * wait for an ACK from RPMh before continuing even
145 * if it corresponds to a strictly lower power
146 * state (e.g. enabled --> disabled).
147 * @enabled: Flag indicating if the regulator is enabled or
148 * not
149 * @bypassed: Boolean indicating if the regulator is in
150 * bypass (pass-through) mode or not. This is
151 * only used by BOB rpmh-regulator resources.
152 * @voltage_selector: Selector used for get_voltage_sel() and
153 * set_voltage_sel() callbacks
154 * @mode: RPMh VRM regulator current framework mode
155 */
156struct rpmh_vreg {
157 struct device *dev;
158 u32 addr;
159 struct regulator_desc rdesc;
160 const struct rpmh_vreg_hw_data *hw_data;
161 bool always_wait_for_ack;
162
163 int enabled;
164 bool bypassed;
165 int voltage_selector;
166 unsigned int mode;
167};
168
169/**
170 * struct rpmh_vreg_init_data - initialization data for an RPMh regulator
171 * @name: Name for the regulator which also corresponds
172 * to the device tree subnode name of the regulator
173 * @index: This is the index number of the regulator present
174 * on the PMIC.
175 * @vreg_hw_type: Regulator HW type enum, this must be BOB, SMPS,
176 * LDO, VS, based on the regulator HW type.
177 * @supply_name: Parent supply regulator name
178 * @hw_data: Configuration data for this PMIC regulator type
179 */
180struct rpmh_vreg_init_data {
181 const char *name;
182 enum regulator_hw_type vreg_hw_type;
183 int index;
184 const char *supply_name;
185 const struct rpmh_vreg_hw_data *hw_data;
186};
187
188/**
189 * rpmh_regulator_send_request() - send the request to RPMh
190 * @vreg: Pointer to the RPMh regulator
191 * @cmd: Pointer to the RPMh command to send
192 * @wait_for_ack: Boolean indicating if execution must wait until the
193 * request has been acknowledged as complete
194 *
195 * Return: 0 on success, or a negative error number on failure
196 */
197static int rpmh_regulator_send_request(struct rpmh_vreg *vreg,
198 struct tcs_cmd *cmd, bool wait_for_ack)
199{
200 int ret;
201
202 if (wait_for_ack || vreg->always_wait_for_ack)
203 ret = rpmh_write(dev: vreg->dev, state: RPMH_ACTIVE_ONLY_STATE, cmd, n: 1);
204 else
205 ret = rpmh_write_async(dev: vreg->dev, state: RPMH_ACTIVE_ONLY_STATE, cmd,
206 n: 1);
207
208 return ret;
209}
210
211static int _rpmh_regulator_vrm_set_voltage_sel(struct regulator_dev *rdev,
212 unsigned int selector, bool wait_for_ack)
213{
214 struct rpmh_vreg *vreg = rdev_get_drvdata(rdev);
215 struct tcs_cmd cmd = {
216 .addr = vreg->addr + RPMH_REGULATOR_REG_VRM_VOLTAGE,
217 };
218 int ret;
219
220 /* VRM voltage control register is set with voltage in millivolts. */
221 cmd.data = DIV_ROUND_UP(regulator_list_voltage_linear_range(rdev,
222 selector), 1000);
223
224 ret = rpmh_regulator_send_request(vreg, cmd: &cmd, wait_for_ack);
225 if (!ret)
226 vreg->voltage_selector = selector;
227
228 return ret;
229}
230
231static int rpmh_regulator_vrm_set_voltage_sel(struct regulator_dev *rdev,
232 unsigned int selector)
233{
234 struct rpmh_vreg *vreg = rdev_get_drvdata(rdev);
235
236 if (vreg->enabled == -EINVAL) {
237 /*
238 * Cache the voltage and send it later when the regulator is
239 * enabled or disabled.
240 */
241 vreg->voltage_selector = selector;
242 return 0;
243 }
244
245 return _rpmh_regulator_vrm_set_voltage_sel(rdev, selector,
246 wait_for_ack: selector > vreg->voltage_selector);
247}
248
249static int rpmh_regulator_vrm_get_voltage_sel(struct regulator_dev *rdev)
250{
251 struct rpmh_vreg *vreg = rdev_get_drvdata(rdev);
252
253 return vreg->voltage_selector;
254}
255
256static int rpmh_regulator_is_enabled(struct regulator_dev *rdev)
257{
258 struct rpmh_vreg *vreg = rdev_get_drvdata(rdev);
259
260 return vreg->enabled;
261}
262
263static int rpmh_regulator_set_enable_state(struct regulator_dev *rdev,
264 bool enable)
265{
266 struct rpmh_vreg *vreg = rdev_get_drvdata(rdev);
267 struct tcs_cmd cmd = {
268 .addr = vreg->addr + RPMH_REGULATOR_REG_ENABLE,
269 .data = enable,
270 };
271 int ret;
272
273 if (vreg->enabled == -EINVAL &&
274 vreg->voltage_selector != -ENOTRECOVERABLE) {
275 ret = _rpmh_regulator_vrm_set_voltage_sel(rdev,
276 selector: vreg->voltage_selector, wait_for_ack: true);
277 if (ret < 0)
278 return ret;
279 }
280
281 ret = rpmh_regulator_send_request(vreg, cmd: &cmd, wait_for_ack: enable);
282 if (!ret)
283 vreg->enabled = enable;
284
285 return ret;
286}
287
288static int rpmh_regulator_enable(struct regulator_dev *rdev)
289{
290 return rpmh_regulator_set_enable_state(rdev, enable: true);
291}
292
293static int rpmh_regulator_disable(struct regulator_dev *rdev)
294{
295 return rpmh_regulator_set_enable_state(rdev, enable: false);
296}
297
298static int rpmh_regulator_vrm_set_mode_bypass(struct rpmh_vreg *vreg,
299 unsigned int mode, bool bypassed)
300{
301 struct tcs_cmd cmd = {
302 .addr = vreg->addr + RPMH_REGULATOR_REG_VRM_MODE,
303 };
304 int pmic_mode;
305
306 if (mode > REGULATOR_MODE_STANDBY)
307 return -EINVAL;
308
309 pmic_mode = vreg->hw_data->pmic_mode_map[mode];
310 if (pmic_mode < 0)
311 return pmic_mode;
312
313 if (bypassed)
314 cmd.data = PMIC4_BOB_MODE_PASS;
315 else
316 cmd.data = pmic_mode;
317
318 return rpmh_regulator_send_request(vreg, cmd: &cmd, wait_for_ack: true);
319}
320
321static int rpmh_regulator_vrm_set_mode(struct regulator_dev *rdev,
322 unsigned int mode)
323{
324 struct rpmh_vreg *vreg = rdev_get_drvdata(rdev);
325 int ret;
326
327 if (mode == vreg->mode)
328 return 0;
329
330 ret = rpmh_regulator_vrm_set_mode_bypass(vreg, mode, bypassed: vreg->bypassed);
331 if (!ret)
332 vreg->mode = mode;
333
334 return ret;
335}
336
337static unsigned int rpmh_regulator_vrm_get_mode(struct regulator_dev *rdev)
338{
339 struct rpmh_vreg *vreg = rdev_get_drvdata(rdev);
340
341 return vreg->mode;
342}
343
344/**
345 * rpmh_regulator_vrm_get_optimum_mode() - get the mode based on the load
346 * @rdev: Regulator device pointer for the rpmh-regulator
347 * @input_uV: Input voltage
348 * @output_uV: Output voltage
349 * @load_uA: Aggregated load current in microamps
350 *
351 * This function is used in the regulator_ops for VRM type RPMh regulator
352 * devices.
353 *
354 * Return: 0 on success, or a negative error number on failure
355 */
356static unsigned int rpmh_regulator_vrm_get_optimum_mode(
357 struct regulator_dev *rdev, int input_uV, int output_uV, int load_uA)
358{
359 struct rpmh_vreg *vreg = rdev_get_drvdata(rdev);
360
361 if (load_uA >= vreg->hw_data->hpm_min_load_uA)
362 return REGULATOR_MODE_NORMAL;
363 else
364 return REGULATOR_MODE_IDLE;
365}
366
367static int rpmh_regulator_vrm_set_bypass(struct regulator_dev *rdev,
368 bool enable)
369{
370 struct rpmh_vreg *vreg = rdev_get_drvdata(rdev);
371 int ret;
372
373 if (vreg->bypassed == enable)
374 return 0;
375
376 ret = rpmh_regulator_vrm_set_mode_bypass(vreg, mode: vreg->mode, bypassed: enable);
377 if (!ret)
378 vreg->bypassed = enable;
379
380 return ret;
381}
382
383static int rpmh_regulator_vrm_get_bypass(struct regulator_dev *rdev,
384 bool *enable)
385{
386 struct rpmh_vreg *vreg = rdev_get_drvdata(rdev);
387
388 *enable = vreg->bypassed;
389
390 return 0;
391}
392
393static const struct regulator_ops rpmh_regulator_vrm_ops = {
394 .enable = rpmh_regulator_enable,
395 .disable = rpmh_regulator_disable,
396 .is_enabled = rpmh_regulator_is_enabled,
397 .set_voltage_sel = rpmh_regulator_vrm_set_voltage_sel,
398 .get_voltage_sel = rpmh_regulator_vrm_get_voltage_sel,
399 .list_voltage = regulator_list_voltage_linear_range,
400 .set_mode = rpmh_regulator_vrm_set_mode,
401 .get_mode = rpmh_regulator_vrm_get_mode,
402};
403
404static const struct regulator_ops rpmh_regulator_vrm_drms_ops = {
405 .enable = rpmh_regulator_enable,
406 .disable = rpmh_regulator_disable,
407 .is_enabled = rpmh_regulator_is_enabled,
408 .set_voltage_sel = rpmh_regulator_vrm_set_voltage_sel,
409 .get_voltage_sel = rpmh_regulator_vrm_get_voltage_sel,
410 .list_voltage = regulator_list_voltage_linear_range,
411 .set_mode = rpmh_regulator_vrm_set_mode,
412 .get_mode = rpmh_regulator_vrm_get_mode,
413 .get_optimum_mode = rpmh_regulator_vrm_get_optimum_mode,
414};
415
416static const struct regulator_ops rpmh_regulator_vrm_bypass_ops = {
417 .enable = rpmh_regulator_enable,
418 .disable = rpmh_regulator_disable,
419 .is_enabled = rpmh_regulator_is_enabled,
420 .set_voltage_sel = rpmh_regulator_vrm_set_voltage_sel,
421 .get_voltage_sel = rpmh_regulator_vrm_get_voltage_sel,
422 .list_voltage = regulator_list_voltage_linear_range,
423 .set_mode = rpmh_regulator_vrm_set_mode,
424 .get_mode = rpmh_regulator_vrm_get_mode,
425 .set_bypass = rpmh_regulator_vrm_set_bypass,
426 .get_bypass = rpmh_regulator_vrm_get_bypass,
427};
428
429static const struct regulator_ops rpmh_regulator_xob_ops = {
430 .enable = rpmh_regulator_enable,
431 .disable = rpmh_regulator_disable,
432 .is_enabled = rpmh_regulator_is_enabled,
433};
434
435/**
436 * rpmh_regulator_init_vreg() - initialize all attributes of an rpmh-regulator
437 * @vreg: Pointer to the individual rpmh-regulator resource
438 * @dev: Pointer to the top level rpmh-regulator PMIC device
439 * @node: Pointer to the individual rpmh-regulator resource
440 * device node
441 * @pmic_id: String used to identify the top level rpmh-regulator
442 * PMIC device on the board
443 * @pmic_rpmh_data: Pointer to a null-terminated array of rpmh-regulator
444 * resources defined for the top level PMIC device
445 *
446 * Return: 0 on success, or a negative error number on failure
447 */
448static int rpmh_regulator_init_vreg(struct rpmh_vreg *vreg, struct device *dev,
449 struct device_node *node, const char *pmic_id,
450 const struct rpmh_vreg_init_data *pmic_rpmh_data)
451{
452 struct regulator_config reg_config = {};
453 char rpmh_resource_name[20] = "";
454 const char *rsc_name;
455 const struct rpmh_vreg_init_data *rpmh_data;
456 struct regulator_init_data *init_data;
457 struct regulator_dev *rdev;
458 int ret;
459
460 vreg->dev = dev;
461
462 for (rpmh_data = pmic_rpmh_data; rpmh_data->name; rpmh_data++)
463 if (of_node_name_eq(np: node, name: rpmh_data->name))
464 break;
465
466 if (!rpmh_data->name) {
467 dev_err(dev, "Unknown regulator %pOFn\n", node);
468 return -EINVAL;
469 }
470
471 if (strnlen(p: pmic_id, PMIC_ID_LEN) > 1 && strnstr(pmic_id, "_E", PMIC_ID_LEN)) {
472 rsc_name = vreg_rsc_name_lookup[rpmh_data->vreg_hw_type].rsc_name_fmt;
473 scnprintf(buf: rpmh_resource_name, size: sizeof(rpmh_resource_name),
474 fmt: rsc_name, rpmh_data->index, pmic_id);
475
476 } else {
477 rsc_name = vreg_rsc_name_lookup[rpmh_data->vreg_hw_type].rsc_name_fmt1;
478 scnprintf(buf: rpmh_resource_name, size: sizeof(rpmh_resource_name),
479 fmt: rsc_name, pmic_id, rpmh_data->index);
480 }
481
482 vreg->addr = cmd_db_read_addr(resource_id: rpmh_resource_name);
483 if (!vreg->addr) {
484 dev_err(dev, "%pOFn: could not find RPMh address for resource %s\n",
485 node, rpmh_resource_name);
486 return -ENODEV;
487 }
488
489 vreg->rdesc.name = rpmh_data->name;
490 vreg->rdesc.supply_name = rpmh_data->supply_name;
491 vreg->hw_data = rpmh_data->hw_data;
492
493 vreg->enabled = -EINVAL;
494 vreg->voltage_selector = -ENOTRECOVERABLE;
495 vreg->mode = REGULATOR_MODE_INVALID;
496
497 if (rpmh_data->hw_data->n_voltages) {
498 vreg->rdesc.linear_ranges = rpmh_data->hw_data->voltage_ranges;
499 vreg->rdesc.n_linear_ranges = rpmh_data->hw_data->n_linear_ranges;
500 vreg->rdesc.n_voltages = rpmh_data->hw_data->n_voltages;
501 }
502
503 vreg->always_wait_for_ack = of_property_read_bool(np: node,
504 propname: "qcom,always-wait-for-ack");
505
506 vreg->rdesc.owner = THIS_MODULE;
507 vreg->rdesc.type = REGULATOR_VOLTAGE;
508 vreg->rdesc.ops = vreg->hw_data->ops;
509 vreg->rdesc.of_map_mode = vreg->hw_data->of_map_mode;
510
511 init_data = of_get_regulator_init_data(dev, node, desc: &vreg->rdesc);
512 if (!init_data)
513 return -ENOMEM;
514
515 if (rpmh_data->hw_data->regulator_type == XOB &&
516 init_data->constraints.min_uV &&
517 init_data->constraints.min_uV == init_data->constraints.max_uV) {
518 vreg->rdesc.fixed_uV = init_data->constraints.min_uV;
519 vreg->rdesc.n_voltages = 1;
520 }
521
522 reg_config.dev = dev;
523 reg_config.init_data = init_data;
524 reg_config.of_node = node;
525 reg_config.driver_data = vreg;
526
527 rdev = devm_regulator_register(dev, regulator_desc: &vreg->rdesc, config: &reg_config);
528 if (IS_ERR(ptr: rdev)) {
529 ret = PTR_ERR(ptr: rdev);
530 dev_err(dev, "%pOFn: devm_regulator_register() failed, ret=%d\n",
531 node, ret);
532 return ret;
533 }
534
535 dev_dbg(dev, "%pOFn regulator registered for RPMh resource %s @ 0x%05X\n",
536 node, rpmh_resource_name, vreg->addr);
537
538 return 0;
539}
540
541static const int pmic_mode_map_pmic4_ldo[REGULATOR_MODE_STANDBY + 1] = {
542 [REGULATOR_MODE_INVALID] = -EINVAL,
543 [REGULATOR_MODE_STANDBY] = PMIC4_LDO_MODE_RETENTION,
544 [REGULATOR_MODE_IDLE] = PMIC4_LDO_MODE_LPM,
545 [REGULATOR_MODE_NORMAL] = PMIC4_LDO_MODE_HPM,
546 [REGULATOR_MODE_FAST] = -EINVAL,
547};
548
549static const int pmic_mode_map_pmic5_ldo[REGULATOR_MODE_STANDBY + 1] = {
550 [REGULATOR_MODE_INVALID] = -EINVAL,
551 [REGULATOR_MODE_STANDBY] = PMIC5_LDO_MODE_RETENTION,
552 [REGULATOR_MODE_IDLE] = PMIC5_LDO_MODE_LPM,
553 [REGULATOR_MODE_NORMAL] = PMIC5_LDO_MODE_HPM,
554 [REGULATOR_MODE_FAST] = -EINVAL,
555};
556
557static const int pmic_mode_map_pmic5_ldo_hpm[REGULATOR_MODE_STANDBY + 1] = {
558 [REGULATOR_MODE_INVALID] = -EINVAL,
559 [REGULATOR_MODE_STANDBY] = -EINVAL,
560 [REGULATOR_MODE_IDLE] = -EINVAL,
561 [REGULATOR_MODE_NORMAL] = PMIC5_LDO_MODE_HPM,
562 [REGULATOR_MODE_FAST] = -EINVAL,
563};
564
565static const int pmic_mode_map_pmic530_ldo[REGULATOR_MODE_STANDBY + 1] = {
566 [REGULATOR_MODE_INVALID] = -EINVAL,
567 [REGULATOR_MODE_STANDBY] = PMIC530_LDO_MODE_RETENTION,
568 [REGULATOR_MODE_IDLE] = PMIC530_LDO_MODE_LPM,
569 [REGULATOR_MODE_NORMAL] = PMIC530_LDO_MODE_OPM,
570 [REGULATOR_MODE_FAST] = PMIC530_LDO_MODE_HPM,
571};
572
573static unsigned int rpmh_regulator_pmic4_ldo_of_map_mode(unsigned int rpmh_mode)
574{
575 unsigned int mode;
576
577 switch (rpmh_mode) {
578 case RPMH_REGULATOR_MODE_HPM:
579 mode = REGULATOR_MODE_NORMAL;
580 break;
581 case RPMH_REGULATOR_MODE_LPM:
582 mode = REGULATOR_MODE_IDLE;
583 break;
584 case RPMH_REGULATOR_MODE_RET:
585 mode = REGULATOR_MODE_STANDBY;
586 break;
587 default:
588 mode = REGULATOR_MODE_INVALID;
589 break;
590 }
591
592 return mode;
593}
594
595static unsigned int rpmh_regulator_pmic530_ldo_of_map_mode(unsigned int rpmh_mode)
596{
597 unsigned int mode;
598
599 switch (rpmh_mode) {
600 case RPMH_REGULATOR_MODE_HPM:
601 mode = REGULATOR_MODE_FAST;
602 break;
603 case RPMH_REGULATOR_MODE_AUTO:
604 mode = REGULATOR_MODE_NORMAL;
605 break;
606 case RPMH_REGULATOR_MODE_LPM:
607 mode = REGULATOR_MODE_IDLE;
608 break;
609 case RPMH_REGULATOR_MODE_RET:
610 mode = REGULATOR_MODE_STANDBY;
611 break;
612 default:
613 mode = REGULATOR_MODE_INVALID;
614 break;
615 }
616 return mode;
617}
618
619static const int pmic_mode_map_pmic4_smps[REGULATOR_MODE_STANDBY + 1] = {
620 [REGULATOR_MODE_INVALID] = -EINVAL,
621 [REGULATOR_MODE_STANDBY] = PMIC4_SMPS_MODE_RETENTION,
622 [REGULATOR_MODE_IDLE] = PMIC4_SMPS_MODE_PFM,
623 [REGULATOR_MODE_NORMAL] = PMIC4_SMPS_MODE_AUTO,
624 [REGULATOR_MODE_FAST] = PMIC4_SMPS_MODE_PWM,
625};
626
627static const int pmic_mode_map_pmic5_smps[REGULATOR_MODE_STANDBY + 1] = {
628 [REGULATOR_MODE_INVALID] = -EINVAL,
629 [REGULATOR_MODE_STANDBY] = PMIC5_SMPS_MODE_RETENTION,
630 [REGULATOR_MODE_IDLE] = PMIC5_SMPS_MODE_PFM,
631 [REGULATOR_MODE_NORMAL] = PMIC5_SMPS_MODE_AUTO,
632 [REGULATOR_MODE_FAST] = PMIC5_SMPS_MODE_PWM,
633};
634
635static unsigned int
636rpmh_regulator_pmic4_smps_of_map_mode(unsigned int rpmh_mode)
637{
638 unsigned int mode;
639
640 switch (rpmh_mode) {
641 case RPMH_REGULATOR_MODE_HPM:
642 mode = REGULATOR_MODE_FAST;
643 break;
644 case RPMH_REGULATOR_MODE_AUTO:
645 mode = REGULATOR_MODE_NORMAL;
646 break;
647 case RPMH_REGULATOR_MODE_LPM:
648 mode = REGULATOR_MODE_IDLE;
649 break;
650 case RPMH_REGULATOR_MODE_RET:
651 mode = REGULATOR_MODE_STANDBY;
652 break;
653 default:
654 mode = REGULATOR_MODE_INVALID;
655 break;
656 }
657
658 return mode;
659}
660
661static const int pmic_mode_map_pmic4_bob[REGULATOR_MODE_STANDBY + 1] = {
662 [REGULATOR_MODE_INVALID] = -EINVAL,
663 [REGULATOR_MODE_STANDBY] = -EINVAL,
664 [REGULATOR_MODE_IDLE] = PMIC4_BOB_MODE_PFM,
665 [REGULATOR_MODE_NORMAL] = PMIC4_BOB_MODE_AUTO,
666 [REGULATOR_MODE_FAST] = PMIC4_BOB_MODE_PWM,
667};
668
669static const int pmic_mode_map_pmic5_bob[REGULATOR_MODE_STANDBY + 1] = {
670 [REGULATOR_MODE_INVALID] = -EINVAL,
671 [REGULATOR_MODE_STANDBY] = -EINVAL,
672 [REGULATOR_MODE_IDLE] = PMIC5_BOB_MODE_PFM,
673 [REGULATOR_MODE_NORMAL] = PMIC5_BOB_MODE_AUTO,
674 [REGULATOR_MODE_FAST] = PMIC5_BOB_MODE_PWM,
675};
676
677static unsigned int rpmh_regulator_pmic4_bob_of_map_mode(unsigned int rpmh_mode)
678{
679 unsigned int mode;
680
681 switch (rpmh_mode) {
682 case RPMH_REGULATOR_MODE_HPM:
683 mode = REGULATOR_MODE_FAST;
684 break;
685 case RPMH_REGULATOR_MODE_AUTO:
686 mode = REGULATOR_MODE_NORMAL;
687 break;
688 case RPMH_REGULATOR_MODE_LPM:
689 mode = REGULATOR_MODE_IDLE;
690 break;
691 default:
692 mode = REGULATOR_MODE_INVALID;
693 break;
694 }
695
696 return mode;
697}
698
699static const struct rpmh_vreg_hw_data pmic4_pldo = {
700 .regulator_type = VRM,
701 .ops = &rpmh_regulator_vrm_drms_ops,
702 .voltage_ranges = (struct linear_range[]) {
703 REGULATOR_LINEAR_RANGE(1664000, 0, 255, 8000),
704 },
705 .n_linear_ranges = 1,
706 .n_voltages = 256,
707 .hpm_min_load_uA = 10000,
708 .pmic_mode_map = pmic_mode_map_pmic4_ldo,
709 .of_map_mode = rpmh_regulator_pmic4_ldo_of_map_mode,
710};
711
712static const struct rpmh_vreg_hw_data pmic4_pldo_lv = {
713 .regulator_type = VRM,
714 .ops = &rpmh_regulator_vrm_drms_ops,
715 .voltage_ranges = (struct linear_range[]) {
716 REGULATOR_LINEAR_RANGE(1256000, 0, 127, 8000),
717 },
718 .n_linear_ranges = 1,
719 .n_voltages = 128,
720 .hpm_min_load_uA = 10000,
721 .pmic_mode_map = pmic_mode_map_pmic4_ldo,
722 .of_map_mode = rpmh_regulator_pmic4_ldo_of_map_mode,
723};
724
725static const struct rpmh_vreg_hw_data pmic4_nldo = {
726 .regulator_type = VRM,
727 .ops = &rpmh_regulator_vrm_drms_ops,
728 .voltage_ranges = (struct linear_range[]) {
729 REGULATOR_LINEAR_RANGE(312000, 0, 127, 8000),
730 },
731 .n_linear_ranges = 1,
732 .n_voltages = 128,
733 .hpm_min_load_uA = 30000,
734 .pmic_mode_map = pmic_mode_map_pmic4_ldo,
735 .of_map_mode = rpmh_regulator_pmic4_ldo_of_map_mode,
736};
737
738static const struct rpmh_vreg_hw_data pmic4_hfsmps3 = {
739 .regulator_type = VRM,
740 .ops = &rpmh_regulator_vrm_ops,
741 .voltage_ranges = (struct linear_range[]) {
742 REGULATOR_LINEAR_RANGE(320000, 0, 215, 8000),
743 },
744 .n_linear_ranges = 1,
745 .n_voltages = 216,
746 .pmic_mode_map = pmic_mode_map_pmic4_smps,
747 .of_map_mode = rpmh_regulator_pmic4_smps_of_map_mode,
748};
749
750static const struct rpmh_vreg_hw_data pmic4_ftsmps426 = {
751 .regulator_type = VRM,
752 .ops = &rpmh_regulator_vrm_ops,
753 .voltage_ranges = (struct linear_range[]) {
754 REGULATOR_LINEAR_RANGE(320000, 0, 258, 4000),
755 },
756 .n_linear_ranges = 1,
757 .n_voltages = 259,
758 .pmic_mode_map = pmic_mode_map_pmic4_smps,
759 .of_map_mode = rpmh_regulator_pmic4_smps_of_map_mode,
760};
761
762static const struct rpmh_vreg_hw_data pmic4_bob = {
763 .regulator_type = VRM,
764 .ops = &rpmh_regulator_vrm_bypass_ops,
765 .voltage_ranges = (struct linear_range[]) {
766 REGULATOR_LINEAR_RANGE(1824000, 0, 83, 32000),
767 },
768 .n_linear_ranges = 1,
769 .n_voltages = 84,
770 .pmic_mode_map = pmic_mode_map_pmic4_bob,
771 .of_map_mode = rpmh_regulator_pmic4_bob_of_map_mode,
772};
773
774static const struct rpmh_vreg_hw_data pmic4_lvs = {
775 .regulator_type = XOB,
776 .ops = &rpmh_regulator_xob_ops,
777 /* LVS hardware does not support voltage or mode configuration. */
778};
779
780static const struct rpmh_vreg_hw_data pmic5_pldo = {
781 .regulator_type = VRM,
782 .ops = &rpmh_regulator_vrm_drms_ops,
783 .voltage_ranges = (struct linear_range[]) {
784 REGULATOR_LINEAR_RANGE(1504000, 0, 255, 8000),
785 },
786 .n_linear_ranges = 1,
787 .n_voltages = 256,
788 .hpm_min_load_uA = 10000,
789 .pmic_mode_map = pmic_mode_map_pmic5_ldo,
790 .of_map_mode = rpmh_regulator_pmic4_ldo_of_map_mode,
791};
792
793static const struct rpmh_vreg_hw_data pmic5_pldo_lv = {
794 .regulator_type = VRM,
795 .ops = &rpmh_regulator_vrm_drms_ops,
796 .voltage_ranges = (struct linear_range[]) {
797 REGULATOR_LINEAR_RANGE(1504000, 0, 62, 8000),
798 },
799 .n_linear_ranges = 1,
800 .n_voltages = 63,
801 .hpm_min_load_uA = 10000,
802 .pmic_mode_map = pmic_mode_map_pmic5_ldo,
803 .of_map_mode = rpmh_regulator_pmic4_ldo_of_map_mode,
804};
805
806static const struct rpmh_vreg_hw_data pmic5_pldo515_mv = {
807 .regulator_type = VRM,
808 .ops = &rpmh_regulator_vrm_drms_ops,
809 .voltage_ranges = (struct linear_range[]) {
810 REGULATOR_LINEAR_RANGE(1800000, 0, 187, 8000),
811 },
812 .n_linear_ranges = 1,
813 .n_voltages = 188,
814 .hpm_min_load_uA = 10000,
815 .pmic_mode_map = pmic_mode_map_pmic5_ldo,
816 .of_map_mode = rpmh_regulator_pmic4_ldo_of_map_mode,
817};
818
819static const struct rpmh_vreg_hw_data pmic5_pldo502 = {
820 .regulator_type = VRM,
821 .ops = &rpmh_regulator_vrm_ops,
822 .voltage_ranges = (struct linear_range[]) {
823 REGULATOR_LINEAR_RANGE(1504000, 0, 255, 8000),
824 },
825 .n_linear_ranges = 1,
826 .n_voltages = 256,
827 .pmic_mode_map = pmic_mode_map_pmic5_ldo_hpm,
828 .of_map_mode = rpmh_regulator_pmic4_ldo_of_map_mode,
829};
830
831static const struct rpmh_vreg_hw_data pmic5_pldo502ln = {
832 .regulator_type = VRM,
833 .ops = &rpmh_regulator_vrm_ops,
834 .voltage_ranges = (struct linear_range[]) {
835 REGULATOR_LINEAR_RANGE(1800000, 0, 2, 200000),
836 REGULATOR_LINEAR_RANGE(2608000, 3, 28, 16000),
837 REGULATOR_LINEAR_RANGE(3104000, 29, 30, 96000),
838 REGULATOR_LINEAR_RANGE(3312000, 31, 31, 0),
839 },
840 .n_linear_ranges = 4,
841 .n_voltages = 32,
842 .pmic_mode_map = pmic_mode_map_pmic5_ldo_hpm,
843 .of_map_mode = rpmh_regulator_pmic4_ldo_of_map_mode,
844};
845
846static const struct rpmh_vreg_hw_data pmic5_nldo = {
847 .regulator_type = VRM,
848 .ops = &rpmh_regulator_vrm_drms_ops,
849 .voltage_ranges = (struct linear_range[]) {
850 REGULATOR_LINEAR_RANGE(320000, 0, 123, 8000),
851 },
852 .n_linear_ranges = 1,
853 .n_voltages = 124,
854 .hpm_min_load_uA = 30000,
855 .pmic_mode_map = pmic_mode_map_pmic5_ldo,
856 .of_map_mode = rpmh_regulator_pmic4_ldo_of_map_mode,
857};
858
859static const struct rpmh_vreg_hw_data pmic5_nldo515 = {
860 .regulator_type = VRM,
861 .ops = &rpmh_regulator_vrm_drms_ops,
862 .voltage_ranges = (struct linear_range[]) {
863 REGULATOR_LINEAR_RANGE(320000, 0, 210, 8000),
864 },
865 .n_linear_ranges = 1,
866 .n_voltages = 211,
867 .hpm_min_load_uA = 30000,
868 .pmic_mode_map = pmic_mode_map_pmic5_ldo,
869 .of_map_mode = rpmh_regulator_pmic4_ldo_of_map_mode,
870};
871
872static const struct rpmh_vreg_hw_data pmic5_nldo502 = {
873 .regulator_type = VRM,
874 .ops = &rpmh_regulator_vrm_drms_ops,
875 .voltage_ranges = (struct linear_range[]) {
876 REGULATOR_LINEAR_RANGE(528000, 0, 127, 8000),
877 },
878 .n_linear_ranges = 1,
879 .n_voltages = 128,
880 .hpm_min_load_uA = 30000,
881 .pmic_mode_map = pmic_mode_map_pmic5_ldo,
882 .of_map_mode = rpmh_regulator_pmic4_ldo_of_map_mode,
883};
884
885static const struct rpmh_vreg_hw_data pmic5_hfsmps510 = {
886 .regulator_type = VRM,
887 .ops = &rpmh_regulator_vrm_ops,
888 .voltage_ranges = (struct linear_range[]) {
889 REGULATOR_LINEAR_RANGE(320000, 0, 215, 8000),
890 },
891 .n_linear_ranges = 1,
892 .n_voltages = 216,
893 .pmic_mode_map = pmic_mode_map_pmic5_smps,
894 .of_map_mode = rpmh_regulator_pmic4_smps_of_map_mode,
895};
896
897static const struct rpmh_vreg_hw_data pmic5_ftsmps510 = {
898 .regulator_type = VRM,
899 .ops = &rpmh_regulator_vrm_ops,
900 .voltage_ranges = (struct linear_range[]) {
901 REGULATOR_LINEAR_RANGE(300000, 0, 263, 4000),
902 },
903 .n_linear_ranges = 1,
904 .n_voltages = 264,
905 .pmic_mode_map = pmic_mode_map_pmic5_smps,
906 .of_map_mode = rpmh_regulator_pmic4_smps_of_map_mode,
907};
908
909static const struct rpmh_vreg_hw_data pmic5_ftsmps520 = {
910 .regulator_type = VRM,
911 .ops = &rpmh_regulator_vrm_ops,
912 .voltage_ranges = (struct linear_range[]) {
913 REGULATOR_LINEAR_RANGE(300000, 0, 263, 4000),
914 },
915 .n_linear_ranges = 1,
916 .n_voltages = 264,
917 .pmic_mode_map = pmic_mode_map_pmic5_smps,
918 .of_map_mode = rpmh_regulator_pmic4_smps_of_map_mode,
919};
920
921static const struct rpmh_vreg_hw_data pmic5_ftsmps525 = {
922 .regulator_type = VRM,
923 .ops = &rpmh_regulator_vrm_ops,
924 .voltage_ranges = (struct linear_range[]) {
925 REGULATOR_LINEAR_RANGE(300000, 0, 267, 4000),
926 REGULATOR_LINEAR_RANGE(1376000, 268, 438, 8000),
927 },
928 .n_linear_ranges = 2,
929 .n_voltages = 439,
930 .pmic_mode_map = pmic_mode_map_pmic5_smps,
931 .of_map_mode = rpmh_regulator_pmic4_smps_of_map_mode,
932};
933
934static const struct rpmh_vreg_hw_data pmic5_ftsmps527 = {
935 .regulator_type = VRM,
936 .ops = &rpmh_regulator_vrm_ops,
937 .voltage_ranges = (struct linear_range[]) {
938 REGULATOR_LINEAR_RANGE(320000, 0, 215, 8000),
939 },
940 .n_linear_ranges = 1,
941 .n_voltages = 215,
942 .pmic_mode_map = pmic_mode_map_pmic5_smps,
943 .of_map_mode = rpmh_regulator_pmic4_smps_of_map_mode,
944};
945
946static const struct rpmh_vreg_hw_data pmic5_hfsmps515 = {
947 .regulator_type = VRM,
948 .ops = &rpmh_regulator_vrm_ops,
949 .voltage_ranges = (struct linear_range[]) {
950 REGULATOR_LINEAR_RANGE(320000, 0, 235, 16000),
951 },
952 .n_linear_ranges = 1,
953 .n_voltages = 236,
954 .pmic_mode_map = pmic_mode_map_pmic5_smps,
955 .of_map_mode = rpmh_regulator_pmic4_smps_of_map_mode,
956};
957
958static const struct rpmh_vreg_hw_data pmic5_hfsmps515_1 = {
959 .regulator_type = VRM,
960 .ops = &rpmh_regulator_vrm_ops,
961 .voltage_ranges = (struct linear_range[]) {
962 REGULATOR_LINEAR_RANGE(900000, 0, 4, 16000),
963 },
964 .n_linear_ranges = 1,
965 .n_voltages = 5,
966 .pmic_mode_map = pmic_mode_map_pmic5_smps,
967 .of_map_mode = rpmh_regulator_pmic4_smps_of_map_mode,
968};
969
970static const struct rpmh_vreg_hw_data pmic5_bob = {
971 .regulator_type = VRM,
972 .ops = &rpmh_regulator_vrm_bypass_ops,
973 .voltage_ranges = (struct linear_range[]) {
974 REGULATOR_LINEAR_RANGE(3000000, 0, 31, 32000),
975 },
976 .n_linear_ranges = 1,
977 .n_voltages = 32,
978 .pmic_mode_map = pmic_mode_map_pmic5_bob,
979 .of_map_mode = rpmh_regulator_pmic4_bob_of_map_mode,
980};
981
982static const struct rpmh_vreg_hw_data pmic5_nldo530 = {
983 .regulator_type = VRM,
984 .ops = &rpmh_regulator_vrm_drms_ops,
985 .voltage_ranges = (struct linear_range[]) {
986 REGULATOR_LINEAR_RANGE(320000, 0, 210, 8000),
987 },
988 .n_linear_ranges = 1,
989 .n_voltages = 211,
990 .hpm_min_load_uA = 30000,
991 .pmic_mode_map = pmic_mode_map_pmic530_ldo,
992 .of_map_mode = rpmh_regulator_pmic530_ldo_of_map_mode,
993};
994
995static const struct rpmh_vreg_hw_data pmic5_pldo530_mvp150 = {
996 .regulator_type = VRM,
997 .ops = &rpmh_regulator_vrm_drms_ops,
998 .voltage_ranges = (struct linear_range[]) {
999 REGULATOR_LINEAR_RANGE(1504000, 0, 255, 8000),
1000 },
1001 .n_linear_ranges = 1,
1002 .n_voltages = 256,
1003 .hpm_min_load_uA = 10000,
1004 .pmic_mode_map = pmic_mode_map_pmic530_ldo,
1005 .of_map_mode = rpmh_regulator_pmic530_ldo_of_map_mode,
1006};
1007
1008static const struct rpmh_vreg_hw_data pmic5_pldo530_mvp300 = {
1009 .regulator_type = VRM,
1010 .ops = &rpmh_regulator_vrm_drms_ops,
1011 .voltage_ranges = (struct linear_range[]) {
1012 REGULATOR_LINEAR_RANGE(1504000, 0, 255, 8000),
1013 },
1014 .n_linear_ranges = 1,
1015 .n_voltages = 256,
1016 .hpm_min_load_uA = 20000,
1017 .pmic_mode_map = pmic_mode_map_pmic530_ldo,
1018 .of_map_mode = rpmh_regulator_pmic530_ldo_of_map_mode,
1019};
1020
1021static const struct rpmh_vreg_hw_data pmic5_pldo530_mvp600 = {
1022 .regulator_type = VRM,
1023 .ops = &rpmh_regulator_vrm_drms_ops,
1024 .voltage_ranges = (struct linear_range[]) {
1025 REGULATOR_LINEAR_RANGE(1504000, 0, 255, 8000),
1026 },
1027 .n_linear_ranges = 1,
1028 .n_voltages = 256,
1029 .hpm_min_load_uA = 40000,
1030 .pmic_mode_map = pmic_mode_map_pmic530_ldo,
1031 .of_map_mode = rpmh_regulator_pmic530_ldo_of_map_mode,
1032};
1033
1034static const struct rpmh_vreg_hw_data pmic5_ftsmps530 = {
1035 .regulator_type = VRM,
1036 .ops = &rpmh_regulator_vrm_ops,
1037 .voltage_ranges = (struct linear_range[]) {
1038 REGULATOR_LINEAR_RANGE(252000, 0, 305, 4000),
1039 REGULATOR_LINEAR_RANGE(1480000, 306, 464, 8000),
1040 },
1041 .n_linear_ranges = 2,
1042 .n_voltages = 465,
1043 .pmic_mode_map = pmic_mode_map_pmic5_smps,
1044 .of_map_mode = rpmh_regulator_pmic4_smps_of_map_mode,
1045};
1046
1047#define RPMH_VREG(_name, _vreg_hw_type, _index, _hw_data, _supply_name) \
1048{ \
1049 .name = _name, \
1050 .vreg_hw_type = _vreg_hw_type, \
1051 .index = _index, \
1052 .hw_data = _hw_data, \
1053 .supply_name = _supply_name, \
1054}
1055
1056static const struct rpmh_vreg_init_data pm8998_vreg_data[] = {
1057 RPMH_VREG("smps1", SMPS, 1, &pmic4_ftsmps426, "vdd-s1"),
1058 RPMH_VREG("smps2", SMPS, 2, &pmic4_ftsmps426, "vdd-s2"),
1059 RPMH_VREG("smps3", SMPS, 3, &pmic4_hfsmps3, "vdd-s3"),
1060 RPMH_VREG("smps4", SMPS, 4, &pmic4_hfsmps3, "vdd-s4"),
1061 RPMH_VREG("smps5", SMPS, 5, &pmic4_hfsmps3, "vdd-s5"),
1062 RPMH_VREG("smps6", SMPS, 6, &pmic4_ftsmps426, "vdd-s6"),
1063 RPMH_VREG("smps7", SMPS, 7, &pmic4_ftsmps426, "vdd-s7"),
1064 RPMH_VREG("smps8", SMPS, 8, &pmic4_ftsmps426, "vdd-s8"),
1065 RPMH_VREG("smps9", SMPS, 9, &pmic4_ftsmps426, "vdd-s9"),
1066 RPMH_VREG("smps10", SMPS, 10, &pmic4_ftsmps426, "vdd-s10"),
1067 RPMH_VREG("smps11", SMPS, 11, &pmic4_ftsmps426, "vdd-s11"),
1068 RPMH_VREG("smps12", SMPS, 12, &pmic4_ftsmps426, "vdd-s12"),
1069 RPMH_VREG("smps13", SMPS, 13, &pmic4_ftsmps426, "vdd-s13"),
1070 RPMH_VREG("ldo1", LDO, 1, &pmic4_nldo, "vdd-l1-l27"),
1071 RPMH_VREG("ldo2", LDO, 2, &pmic4_nldo, "vdd-l2-l8-l17"),
1072 RPMH_VREG("ldo3", LDO, 3, &pmic4_nldo, "vdd-l3-l11"),
1073 RPMH_VREG("ldo4", LDO, 4, &pmic4_nldo, "vdd-l4-l5"),
1074 RPMH_VREG("ldo5", LDO, 5, &pmic4_nldo, "vdd-l4-l5"),
1075 RPMH_VREG("ldo6", LDO, 6, &pmic4_pldo, "vdd-l6"),
1076 RPMH_VREG("ldo7", LDO, 7, &pmic4_pldo_lv, "vdd-l7-l12-l14-l15"),
1077 RPMH_VREG("ldo8", LDO, 8, &pmic4_nldo, "vdd-l2-l8-l17"),
1078 RPMH_VREG("ldo9", LDO, 9, &pmic4_pldo, "vdd-l9"),
1079 RPMH_VREG("ldo10", LDO, 10, &pmic4_pldo, "vdd-l10-l23-l25"),
1080 RPMH_VREG("ldo11", LDO, 11, &pmic4_nldo, "vdd-l3-l11"),
1081 RPMH_VREG("ldo12", LDO, 12, &pmic4_pldo_lv, "vdd-l7-l12-l14-l15"),
1082 RPMH_VREG("ldo13", LDO, 13, &pmic4_pldo, "vdd-l13-l19-l21"),
1083 RPMH_VREG("ldo14", LDO, 14, &pmic4_pldo_lv, "vdd-l7-l12-l14-l15"),
1084 RPMH_VREG("ldo15", LDO, 15, &pmic4_pldo_lv, "vdd-l7-l12-l14-l15"),
1085 RPMH_VREG("ldo16", LDO, 16, &pmic4_pldo, "vdd-l16-l28"),
1086 RPMH_VREG("ldo17", LDO, 17, &pmic4_nldo, "vdd-l2-l8-l17"),
1087 RPMH_VREG("ldo18", LDO, 18, &pmic4_pldo, "vdd-l18-l22"),
1088 RPMH_VREG("ldo19", LDO, 19, &pmic4_pldo, "vdd-l13-l19-l21"),
1089 RPMH_VREG("ldo20", LDO, 20, &pmic4_pldo, "vdd-l20-l24"),
1090 RPMH_VREG("ldo21", LDO, 21, &pmic4_pldo, "vdd-l13-l19-l21"),
1091 RPMH_VREG("ldo22", LDO, 22, &pmic4_pldo, "vdd-l18-l22"),
1092 RPMH_VREG("ldo23", LDO, 23, &pmic4_pldo, "vdd-l10-l23-l25"),
1093 RPMH_VREG("ldo24", LDO, 24, &pmic4_pldo, "vdd-l20-l24"),
1094 RPMH_VREG("ldo25", LDO, 25, &pmic4_pldo, "vdd-l10-l23-l25"),
1095 RPMH_VREG("ldo26", LDO, 26, &pmic4_nldo, "vdd-l26"),
1096 RPMH_VREG("ldo27", LDO, 27, &pmic4_nldo, "vdd-l1-l27"),
1097 RPMH_VREG("ldo28", LDO, 28, &pmic4_pldo, "vdd-l16-l28"),
1098 RPMH_VREG("lvs1", VS, 1, &pmic4_lvs, "vin-lvs-1-2"),
1099 RPMH_VREG("lvs2", VS, 2, &pmic4_lvs, "vin-lvs-1-2"),
1100 {}
1101};
1102
1103static const struct rpmh_vreg_init_data pmg1110_vreg_data[] = {
1104 RPMH_VREG("smps1", SMPS, 1, &pmic5_ftsmps510, "vdd-s1"),
1105 {}
1106};
1107
1108static const struct rpmh_vreg_init_data pmi8998_vreg_data[] = {
1109 RPMH_VREG("bob", BOB, 1, &pmic4_bob, "vdd-bob"),
1110 {}
1111};
1112
1113static const struct rpmh_vreg_init_data pm8005_vreg_data[] = {
1114 RPMH_VREG("smps1", SMPS, 1, &pmic4_ftsmps426, "vdd-s1"),
1115 RPMH_VREG("smps2", SMPS, 2, &pmic4_ftsmps426, "vdd-s2"),
1116 RPMH_VREG("smps3", SMPS, 3, &pmic4_ftsmps426, "vdd-s3"),
1117 RPMH_VREG("smps4", SMPS, 4, &pmic4_ftsmps426, "vdd-s4"),
1118 {}
1119};
1120
1121static const struct rpmh_vreg_init_data pm8150_vreg_data[] = {
1122 RPMH_VREG("smps1", SMPS, 1, &pmic5_ftsmps510, "vdd-s1"),
1123 RPMH_VREG("smps2", SMPS, 2, &pmic5_ftsmps510, "vdd-s2"),
1124 RPMH_VREG("smps3", SMPS, 3, &pmic5_ftsmps510, "vdd-s3"),
1125 RPMH_VREG("smps4", SMPS, 4, &pmic5_hfsmps510, "vdd-s4"),
1126 RPMH_VREG("smps5", SMPS, 5, &pmic5_hfsmps510, "vdd-s5"),
1127 RPMH_VREG("smps6", SMPS, 6, &pmic5_ftsmps510, "vdd-s6"),
1128 RPMH_VREG("smps7", SMPS, 7, &pmic5_ftsmps510, "vdd-s7"),
1129 RPMH_VREG("smps8", SMPS, 8, &pmic5_ftsmps510, "vdd-s8"),
1130 RPMH_VREG("smps9", SMPS, 9, &pmic5_ftsmps510, "vdd-s9"),
1131 RPMH_VREG("smps10", SMPS, 10, &pmic5_ftsmps510, "vdd-s10"),
1132 RPMH_VREG("ldo1", LDO, 1, &pmic5_nldo, "vdd-l1-l8-l11"),
1133 RPMH_VREG("ldo2", LDO, 2, &pmic5_pldo, "vdd-l2-l10"),
1134 RPMH_VREG("ldo3", LDO, 3, &pmic5_nldo, "vdd-l3-l4-l5-l18"),
1135 RPMH_VREG("ldo4", LDO, 4, &pmic5_nldo, "vdd-l3-l4-l5-l18"),
1136 RPMH_VREG("ldo5", LDO, 5, &pmic5_nldo, "vdd-l3-l4-l5-l18"),
1137 RPMH_VREG("ldo6", LDO, 6, &pmic5_nldo, "vdd-l6-l9"),
1138 RPMH_VREG("ldo7", LDO, 7, &pmic5_pldo, "vdd-l7-l12-l14-l15"),
1139 RPMH_VREG("ldo8", LDO, 8, &pmic5_nldo, "vdd-l1-l8-l11"),
1140 RPMH_VREG("ldo9", LDO, 9, &pmic5_nldo, "vdd-l6-l9"),
1141 RPMH_VREG("ldo10", LDO, 10, &pmic5_pldo, "vdd-l2-l10"),
1142 RPMH_VREG("ldo11", LDO, 11, &pmic5_nldo, "vdd-l1-l8-l11"),
1143 RPMH_VREG("ldo12", LDO, 12, &pmic5_pldo_lv, "vdd-l7-l12-l14-l15"),
1144 RPMH_VREG("ldo13", LDO, 13, &pmic5_pldo, "vdd-l13-l16-l17"),
1145 RPMH_VREG("ldo14", LDO, 14, &pmic5_pldo_lv, "vdd-l7-l12-l14-l15"),
1146 RPMH_VREG("ldo15", LDO, 15, &pmic5_pldo_lv, "vdd-l7-l12-l14-l15"),
1147 RPMH_VREG("ldo16", LDO, 16, &pmic5_pldo, "vdd-l13-l16-l17"),
1148 RPMH_VREG("ldo17", LDO, 17, &pmic5_pldo, "vdd-l13-l16-l17"),
1149 RPMH_VREG("ldo18", LDO, 18, &pmic5_nldo, "vdd-l3-l4-l5-l18"),
1150 {}
1151};
1152
1153static const struct rpmh_vreg_init_data pm8150l_vreg_data[] = {
1154 RPMH_VREG("smps1", SMPS, 1, &pmic5_ftsmps510, "vdd-s1"),
1155 RPMH_VREG("smps2", SMPS, 2, &pmic5_ftsmps510, "vdd-s2"),
1156 RPMH_VREG("smps3", SMPS, 3, &pmic5_ftsmps510, "vdd-s3"),
1157 RPMH_VREG("smps4", SMPS, 4, &pmic5_ftsmps510, "vdd-s4"),
1158 RPMH_VREG("smps5", SMPS, 5, &pmic5_ftsmps510, "vdd-s5"),
1159 RPMH_VREG("smps6", SMPS, 6, &pmic5_ftsmps510, "vdd-s6"),
1160 RPMH_VREG("smps7", SMPS, 7, &pmic5_ftsmps510, "vdd-s7"),
1161 RPMH_VREG("smps8", SMPS, 8, &pmic5_hfsmps510, "vdd-s8"),
1162 RPMH_VREG("ldo1", LDO, 1, &pmic5_pldo_lv, "vdd-l1-l8"),
1163 RPMH_VREG("ldo2", LDO, 2, &pmic5_nldo, "vdd-l2-l3"),
1164 RPMH_VREG("ldo3", LDO, 3, &pmic5_nldo, "vdd-l2-l3"),
1165 RPMH_VREG("ldo4", LDO, 4, &pmic5_pldo, "vdd-l4-l5-l6"),
1166 RPMH_VREG("ldo5", LDO, 5, &pmic5_pldo, "vdd-l4-l5-l6"),
1167 RPMH_VREG("ldo6", LDO, 6, &pmic5_pldo, "vdd-l4-l5-l6"),
1168 RPMH_VREG("ldo7", LDO, 7, &pmic5_pldo, "vdd-l7-l11"),
1169 RPMH_VREG("ldo8", LDO, 8, &pmic5_pldo_lv, "vdd-l1-l8"),
1170 RPMH_VREG("ldo9", LDO, 9, &pmic5_pldo, "vdd-l9-l10"),
1171 RPMH_VREG("ldo10", LDO, 10, &pmic5_pldo, "vdd-l9-l10"),
1172 RPMH_VREG("ldo11", LDO, 11, &pmic5_pldo, "vdd-l7-l11"),
1173 RPMH_VREG("bob", BOB, 1, &pmic5_bob, "vdd-bob"),
1174 {}
1175};
1176
1177static const struct rpmh_vreg_init_data pmm8155au_vreg_data[] = {
1178 RPMH_VREG("smps1", SMPS, 1, &pmic5_ftsmps510, "vdd-s1"),
1179 RPMH_VREG("smps2", SMPS, 2, &pmic5_ftsmps510, "vdd-s2"),
1180 RPMH_VREG("smps3", SMPS, 3, &pmic5_ftsmps510, "vdd-s3"),
1181 RPMH_VREG("smps4", SMPS, 4, &pmic5_hfsmps510, "vdd-s4"),
1182 RPMH_VREG("smps5", SMPS, 5, &pmic5_hfsmps510, "vdd-s5"),
1183 RPMH_VREG("smps6", SMPS, 6, &pmic5_ftsmps510, "vdd-s6"),
1184 RPMH_VREG("smps7", SMPS, 7, &pmic5_ftsmps510, "vdd-s7"),
1185 RPMH_VREG("smps8", SMPS, 8, &pmic5_ftsmps510, "vdd-s8"),
1186 RPMH_VREG("smps9", SMPS, 9, &pmic5_ftsmps510, "vdd-s9"),
1187 RPMH_VREG("smps10", SMPS, 10, &pmic5_ftsmps510, "vdd-s10"),
1188 RPMH_VREG("ldo1", LDO, 1, &pmic5_nldo, "vdd-l1-l8-l11"),
1189 RPMH_VREG("ldo2", LDO, 2, &pmic5_pldo, "vdd-l2-l10"),
1190 RPMH_VREG("ldo3", LDO, 3, &pmic5_nldo, "vdd-l3-l4-l5-l18"),
1191 RPMH_VREG("ldo4", LDO, 4, &pmic5_nldo, "vdd-l3-l4-l5-l18"),
1192 RPMH_VREG("ldo5", LDO, 5, &pmic5_nldo, "vdd-l3-l4-l5-l18"),
1193 RPMH_VREG("ldo6", LDO, 6, &pmic5_nldo, "vdd-l6-l9"),
1194 RPMH_VREG("ldo7", LDO, 7, &pmic5_pldo_lv, "vdd-l7-l12-l14-l15"),
1195 RPMH_VREG("ldo8", LDO, 8, &pmic5_nldo, "vdd-l1-l8-l11"),
1196 RPMH_VREG("ldo9", LDO, 9, &pmic5_nldo, "vdd-l6-l9"),
1197 RPMH_VREG("ldo10", LDO, 10, &pmic5_pldo, "vdd-l2-l10"),
1198 RPMH_VREG("ldo11", LDO, 11, &pmic5_nldo, "vdd-l1-l8-l11"),
1199 RPMH_VREG("ldo12", LDO, 12, &pmic5_pldo_lv, "vdd-l7-l12-l14-l15"),
1200 RPMH_VREG("ldo13", LDO, 13, &pmic5_pldo, "vdd-l13-l16-l17"),
1201 RPMH_VREG("ldo14", LDO, 14, &pmic5_pldo_lv, "vdd-l7-l12-l14-l15"),
1202 RPMH_VREG("ldo15", LDO, 15, &pmic5_pldo_lv, "vdd-l7-l12-l14-l15"),
1203 RPMH_VREG("ldo16", LDO, 16, &pmic5_pldo, "vdd-l13-l16-l17"),
1204 RPMH_VREG("ldo17", LDO, 17, &pmic5_pldo, "vdd-l13-l16-l17"),
1205 RPMH_VREG("ldo18", LDO, 18, &pmic5_nldo, "vdd-l3-l4-l5-l18"),
1206 {}
1207};
1208
1209static const struct rpmh_vreg_init_data pmm8654au_vreg_data[] = {
1210 RPMH_VREG("smps1", SMPS, 1, &pmic5_ftsmps527, "vdd-s1"),
1211 RPMH_VREG("smps2", SMPS, 2, &pmic5_ftsmps527, "vdd-s2"),
1212 RPMH_VREG("smps3", SMPS, 3, &pmic5_ftsmps527, "vdd-s3"),
1213 RPMH_VREG("smps4", SMPS, 4, &pmic5_ftsmps527, "vdd-s4"),
1214 RPMH_VREG("smps5", SMPS, 5, &pmic5_ftsmps527, "vdd-s5"),
1215 RPMH_VREG("smps6", SMPS, 6, &pmic5_ftsmps527, "vdd-s6"),
1216 RPMH_VREG("smps7", SMPS, 7, &pmic5_ftsmps527, "vdd-s7"),
1217 RPMH_VREG("smps8", SMPS, 8, &pmic5_ftsmps527, "vdd-s8"),
1218 RPMH_VREG("smps9", SMPS, 9, &pmic5_ftsmps527, "vdd-s9"),
1219 RPMH_VREG("ldo1", LDO, 1, &pmic5_nldo515, "vdd-s9"),
1220 RPMH_VREG("ldo2", LDO, 2, &pmic5_nldo515, "vdd-l2-l3"),
1221 RPMH_VREG("ldo3", LDO, 3, &pmic5_nldo515, "vdd-l2-l3"),
1222 RPMH_VREG("ldo4", LDO, 4, &pmic5_nldo515, "vdd-s9"),
1223 RPMH_VREG("ldo5", LDO, 5, &pmic5_nldo515, "vdd-s9"),
1224 RPMH_VREG("ldo6", LDO, 6, &pmic5_nldo515, "vdd-l6-l7"),
1225 RPMH_VREG("ldo7", LDO, 7, &pmic5_nldo515, "vdd-l6-l7"),
1226 RPMH_VREG("ldo8", LDO, 8, &pmic5_pldo515_mv, "vdd-l8-l9"),
1227 RPMH_VREG("ldo9", LDO, 9, &pmic5_pldo, "vdd-l8-l9"),
1228 {}
1229};
1230
1231static const struct rpmh_vreg_init_data pm8350_vreg_data[] = {
1232 RPMH_VREG("smps1", SMPS, 1, &pmic5_ftsmps510, "vdd-s1"),
1233 RPMH_VREG("smps2", SMPS, 2, &pmic5_ftsmps510, "vdd-s2"),
1234 RPMH_VREG("smps3", SMPS, 3, &pmic5_ftsmps510, "vdd-s3"),
1235 RPMH_VREG("smps4", SMPS, 4, &pmic5_ftsmps510, "vdd-s4"),
1236 RPMH_VREG("smps5", SMPS, 5, &pmic5_ftsmps510, "vdd-s5"),
1237 RPMH_VREG("smps6", SMPS, 6, &pmic5_ftsmps510, "vdd-s6"),
1238 RPMH_VREG("smps7", SMPS, 7, &pmic5_ftsmps510, "vdd-s7"),
1239 RPMH_VREG("smps8", SMPS, 8, &pmic5_ftsmps510, "vdd-s8"),
1240 RPMH_VREG("smps9", SMPS, 9, &pmic5_ftsmps510, "vdd-s9"),
1241 RPMH_VREG("smps10", SMPS, 10, &pmic5_hfsmps510, "vdd-s10"),
1242 RPMH_VREG("smps11", SMPS, 11, &pmic5_hfsmps510, "vdd-s11"),
1243 RPMH_VREG("smps12", SMPS, 12, &pmic5_hfsmps510, "vdd-s12"),
1244 RPMH_VREG("ldo1", LDO, 1, &pmic5_nldo, "vdd-l1-l4"),
1245 RPMH_VREG("ldo2", LDO, 2, &pmic5_pldo, "vdd-l2-l7"),
1246 RPMH_VREG("ldo3", LDO, 3, &pmic5_nldo, "vdd-l3-l5"),
1247 RPMH_VREG("ldo4", LDO, 4, &pmic5_nldo, "vdd-l1-l4"),
1248 RPMH_VREG("ldo5", LDO, 5, &pmic5_nldo, "vdd-l3-l5"),
1249 RPMH_VREG("ldo6", LDO, 6, &pmic5_nldo, "vdd-l6-l9-l10"),
1250 RPMH_VREG("ldo7", LDO, 7, &pmic5_pldo, "vdd-l2-l7"),
1251 RPMH_VREG("ldo8", LDO, 8, &pmic5_nldo, "vdd-l8"),
1252 RPMH_VREG("ldo9", LDO, 9, &pmic5_nldo, "vdd-l6-l9-l10"),
1253 RPMH_VREG("ldo10", LDO, 10, &pmic5_nldo, "vdd-l6-l9-l10"),
1254 {}
1255};
1256
1257static const struct rpmh_vreg_init_data pm8350c_vreg_data[] = {
1258 RPMH_VREG("smps1", SMPS, 1, &pmic5_hfsmps515, "vdd-s1"),
1259 RPMH_VREG("smps2", SMPS, 2, &pmic5_ftsmps510, "vdd-s2"),
1260 RPMH_VREG("smps3", SMPS, 3, &pmic5_ftsmps510, "vdd-s3"),
1261 RPMH_VREG("smps4", SMPS, 4, &pmic5_ftsmps510, "vdd-s4"),
1262 RPMH_VREG("smps5", SMPS, 5, &pmic5_ftsmps510, "vdd-s5"),
1263 RPMH_VREG("smps6", SMPS, 6, &pmic5_ftsmps510, "vdd-s6"),
1264 RPMH_VREG("smps7", SMPS, 7, &pmic5_ftsmps510, "vdd-s7"),
1265 RPMH_VREG("smps8", SMPS, 8, &pmic5_ftsmps510, "vdd-s8"),
1266 RPMH_VREG("smps9", SMPS, 9, &pmic5_ftsmps510, "vdd-s9"),
1267 RPMH_VREG("smps10", SMPS, 10, &pmic5_ftsmps510, "vdd-s10"),
1268 RPMH_VREG("ldo1", LDO, 1, &pmic5_pldo_lv, "vdd-l1-l12"),
1269 RPMH_VREG("ldo2", LDO, 2, &pmic5_pldo_lv, "vdd-l2-l8"),
1270 RPMH_VREG("ldo3", LDO, 3, &pmic5_pldo, "vdd-l3-l4-l5-l7-l13"),
1271 RPMH_VREG("ldo4", LDO, 4, &pmic5_pldo, "vdd-l3-l4-l5-l7-l13"),
1272 RPMH_VREG("ldo5", LDO, 5, &pmic5_pldo, "vdd-l3-l4-l5-l7-l13"),
1273 RPMH_VREG("ldo6", LDO, 6, &pmic5_pldo, "vdd-l6-l9-l11"),
1274 RPMH_VREG("ldo7", LDO, 7, &pmic5_pldo, "vdd-l3-l4-l5-l7-l13"),
1275 RPMH_VREG("ldo8", LDO, 8, &pmic5_pldo_lv, "vdd-l2-l8"),
1276 RPMH_VREG("ldo9", LDO, 9, &pmic5_pldo, "vdd-l6-l9-l11"),
1277 RPMH_VREG("ldo10", LDO, 10, &pmic5_nldo, "vdd-l10"),
1278 RPMH_VREG("ldo11", LDO, 11, &pmic5_pldo, "vdd-l6-l9-l11"),
1279 RPMH_VREG("ldo12", LDO, 12, &pmic5_pldo_lv, "vdd-l1-l12"),
1280 RPMH_VREG("ldo13", LDO, 13, &pmic5_pldo, "vdd-l3-l4-l5-l7-l13"),
1281 RPMH_VREG("bob", BOB, 1, &pmic5_bob, "vdd-bob"),
1282 {}
1283};
1284
1285static const struct rpmh_vreg_init_data pm8450_vreg_data[] = {
1286 RPMH_VREG("smps1", SMPS, 1, &pmic5_ftsmps520, "vdd-s1"),
1287 RPMH_VREG("smps2", SMPS, 2, &pmic5_ftsmps520, "vdd-s2"),
1288 RPMH_VREG("smps3", SMPS, 3, &pmic5_ftsmps520, "vdd-s3"),
1289 RPMH_VREG("smps4", SMPS, 4, &pmic5_ftsmps520, "vdd-s4"),
1290 RPMH_VREG("smps5", SMPS, 5, &pmic5_ftsmps520, "vdd-s5"),
1291 RPMH_VREG("smps6", SMPS, 6, &pmic5_ftsmps520, "vdd-s6"),
1292 RPMH_VREG("ldo1", LDO, 1, &pmic5_nldo, "vdd-l1"),
1293 RPMH_VREG("ldo2", LDO, 2, &pmic5_nldo, "vdd-l2"),
1294 RPMH_VREG("ldo3", LDO, 3, &pmic5_nldo, "vdd-l3"),
1295 RPMH_VREG("ldo4", LDO, 4, &pmic5_pldo_lv, "vdd-l4"),
1296 {}
1297};
1298
1299static const struct rpmh_vreg_init_data pm8550_vreg_data[] = {
1300 RPMH_VREG("ldo1", LDO, 1, &pmic5_nldo515, "vdd-l1-l4-l10"),
1301 RPMH_VREG("ldo2", LDO, 2, &pmic5_pldo, "vdd-l2-l13-l14"),
1302 RPMH_VREG("ldo3", LDO, 3, &pmic5_nldo515, "vdd-l3"),
1303 RPMH_VREG("ldo4", LDO, 4, &pmic5_nldo515, "vdd-l1-l4-l10"),
1304 RPMH_VREG("ldo5", LDO, 5, &pmic5_pldo, "vdd-l5-l16"),
1305 RPMH_VREG("ldo6", LDO, 6, &pmic5_pldo, "vdd-l6-l7"),
1306 RPMH_VREG("ldo7", LDO, 7, &pmic5_pldo, "vdd-l6-l7"),
1307 RPMH_VREG("ldo8", LDO, 8, &pmic5_pldo, "vdd-l8-l9"),
1308 RPMH_VREG("ldo9", LDO, 9, &pmic5_pldo, "vdd-l8-l9"),
1309 RPMH_VREG("ldo10", LDO, 10, &pmic5_nldo515, "vdd-l1-l4-l10"),
1310 RPMH_VREG("ldo11", LDO, 11, &pmic5_nldo515, "vdd-l11"),
1311 RPMH_VREG("ldo12", LDO, 12, &pmic5_nldo515, "vdd-l12"),
1312 RPMH_VREG("ldo13", LDO, 13, &pmic5_pldo, "vdd-l2-l13-l14"),
1313 RPMH_VREG("ldo14", LDO, 14, &pmic5_pldo, "vdd-l2-l13-l14"),
1314 RPMH_VREG("ldo15", LDO, 15, &pmic5_nldo515, "vdd-l15"),
1315 RPMH_VREG("ldo16", LDO, 16, &pmic5_pldo, "vdd-l5-l16"),
1316 RPMH_VREG("ldo17", LDO, 17, &pmic5_pldo, "vdd-l17"),
1317 RPMH_VREG("bob1", BOB, 1, &pmic5_bob, "vdd-bob1"),
1318 RPMH_VREG("bob2", BOB, 2, &pmic5_bob, "vdd-bob2"),
1319 {}
1320};
1321
1322static const struct rpmh_vreg_init_data pm8550vs_vreg_data[] = {
1323 RPMH_VREG("smps1", SMPS, 1, &pmic5_ftsmps525, "vdd-s1"),
1324 RPMH_VREG("smps2", SMPS, 2, &pmic5_ftsmps525, "vdd-s2"),
1325 RPMH_VREG("smps3", SMPS, 3, &pmic5_ftsmps525, "vdd-s3"),
1326 RPMH_VREG("smps4", SMPS, 4, &pmic5_ftsmps525, "vdd-s4"),
1327 RPMH_VREG("smps5", SMPS, 5, &pmic5_ftsmps525, "vdd-s5"),
1328 RPMH_VREG("smps6", SMPS, 6, &pmic5_ftsmps525, "vdd-s6"),
1329 RPMH_VREG("ldo1", LDO, 1, &pmic5_nldo515, "vdd-l1"),
1330 RPMH_VREG("ldo2", LDO, 2, &pmic5_nldo515, "vdd-l2"),
1331 RPMH_VREG("ldo3", LDO, 3, &pmic5_nldo515, "vdd-l3"),
1332 {}
1333};
1334
1335static const struct rpmh_vreg_init_data pm8550ve_vreg_data[] = {
1336 RPMH_VREG("smps1", SMPS, 1, &pmic5_ftsmps525, "vdd-s1"),
1337 RPMH_VREG("smps2", SMPS, 2, &pmic5_ftsmps525, "vdd-s2"),
1338 RPMH_VREG("smps3", SMPS, 3, &pmic5_ftsmps525, "vdd-s3"),
1339 RPMH_VREG("smps4", SMPS, 4, &pmic5_ftsmps525, "vdd-s4"),
1340 RPMH_VREG("smps5", SMPS, 5, &pmic5_ftsmps525, "vdd-s5"),
1341 RPMH_VREG("smps6", SMPS, 6, &pmic5_ftsmps525, "vdd-s6"),
1342 RPMH_VREG("smps7", SMPS, 7, &pmic5_ftsmps525, "vdd-s7"),
1343 RPMH_VREG("smps8", SMPS, 8, &pmic5_ftsmps525, "vdd-s8"),
1344 RPMH_VREG("ldo1", LDO, 1, &pmic5_nldo515, "vdd-l1"),
1345 RPMH_VREG("ldo2", LDO, 2, &pmic5_nldo515, "vdd-l2"),
1346 RPMH_VREG("ldo3", LDO, 3, &pmic5_nldo515, "vdd-l3"),
1347 {}
1348};
1349
1350static const struct rpmh_vreg_init_data pmc8380_vreg_data[] = {
1351 RPMH_VREG("smps1", SMPS, 1, &pmic5_ftsmps525, "vdd-s1"),
1352 RPMH_VREG("smps2", SMPS, 2, &pmic5_ftsmps525, "vdd-s2"),
1353 RPMH_VREG("smps3", SMPS, 3, &pmic5_ftsmps525, "vdd-s3"),
1354 RPMH_VREG("smps4", SMPS, 4, &pmic5_ftsmps525, "vdd-s4"),
1355 RPMH_VREG("smps5", SMPS, 5, &pmic5_ftsmps525, "vdd-s5"),
1356 RPMH_VREG("smps6", SMPS, 6, &pmic5_ftsmps525, "vdd-s6"),
1357 RPMH_VREG("smps7", SMPS, 7, &pmic5_ftsmps525, "vdd-s7"),
1358 RPMH_VREG("smps8", SMPS, 8, &pmic5_ftsmps525, "vdd-s8"),
1359 RPMH_VREG("ldo1", LDO, 1, &pmic5_nldo515, "vdd-l1"),
1360 RPMH_VREG("ldo2", LDO, 2, &pmic5_nldo515, "vdd-l2"),
1361 RPMH_VREG("ldo3", LDO, 3, &pmic5_nldo515, "vdd-l3"),
1362 {}
1363};
1364
1365static const struct rpmh_vreg_init_data pm8009_vreg_data[] = {
1366 RPMH_VREG("smps1", SMPS, 1, &pmic5_hfsmps510, "vdd-s1"),
1367 RPMH_VREG("smps2", SMPS, 2, &pmic5_hfsmps515, "vdd-s2"),
1368 RPMH_VREG("ldo1", LDO, 1, &pmic5_nldo, "vdd-l1"),
1369 RPMH_VREG("ldo2", LDO, 2, &pmic5_nldo, "vdd-l2"),
1370 RPMH_VREG("ldo3", LDO, 3, &pmic5_nldo, "vdd-l3"),
1371 RPMH_VREG("ldo4", LDO, 4, &pmic5_nldo, "vdd-l4"),
1372 RPMH_VREG("ldo5", LDO, 5, &pmic5_pldo, "vdd-l5-l6"),
1373 RPMH_VREG("ldo6", LDO, 6, &pmic5_pldo, "vdd-l5-l6"),
1374 RPMH_VREG("ldo7", LDO, 7, &pmic5_pldo_lv, "vdd-l7"),
1375 {}
1376};
1377
1378static const struct rpmh_vreg_init_data pm8009_1_vreg_data[] = {
1379 RPMH_VREG("smps1", SMPS, 1, &pmic5_hfsmps510, "vdd-s1"),
1380 RPMH_VREG("smps2", SMPS, 2, &pmic5_hfsmps515_1, "vdd-s2"),
1381 RPMH_VREG("ldo1", LDO, 1, &pmic5_nldo, "vdd-l1"),
1382 RPMH_VREG("ldo2", LDO, 2, &pmic5_nldo, "vdd-l2"),
1383 RPMH_VREG("ldo3", LDO, 3, &pmic5_nldo, "vdd-l3"),
1384 RPMH_VREG("ldo4", LDO, 4, &pmic5_nldo, "vdd-l4"),
1385 RPMH_VREG("ldo5", LDO, 5, &pmic5_pldo, "vdd-l5-l6"),
1386 RPMH_VREG("ldo6", LDO, 6, &pmic5_pldo, "vdd-l5-l6"),
1387 RPMH_VREG("ldo7", LDO, 7, &pmic5_pldo_lv, "vdd-l7"),
1388 {}
1389};
1390
1391static const struct rpmh_vreg_init_data pm8010_vreg_data[] = {
1392 RPMH_VREG("ldo1", LDO, 1, &pmic5_nldo502, "vdd-l1-l2"),
1393 RPMH_VREG("ldo2", LDO, 2, &pmic5_nldo502, "vdd-l1-l2"),
1394 RPMH_VREG("ldo3", LDO, 3, &pmic5_pldo502ln, "vdd-l3-l4"),
1395 RPMH_VREG("ldo4", LDO, 4, &pmic5_pldo502ln, "vdd-l3-l4"),
1396 RPMH_VREG("ldo5", LDO, 5, &pmic5_pldo502, "vdd-l5"),
1397 RPMH_VREG("ldo6", LDO, 6, &pmic5_pldo502ln, "vdd-l6"),
1398 RPMH_VREG("ldo7", LDO, 7, &pmic5_pldo502, "vdd-l7"),
1399};
1400
1401static const struct rpmh_vreg_init_data pm6150_vreg_data[] = {
1402 RPMH_VREG("smps1", SMPS, 1, &pmic5_ftsmps510, "vdd-s1"),
1403 RPMH_VREG("smps2", SMPS, 2, &pmic5_ftsmps510, "vdd-s2"),
1404 RPMH_VREG("smps3", SMPS, 3, &pmic5_ftsmps510, "vdd-s3"),
1405 RPMH_VREG("smps4", SMPS, 4, &pmic5_hfsmps510, "vdd-s4"),
1406 RPMH_VREG("smps5", SMPS, 5, &pmic5_hfsmps510, "vdd-s5"),
1407 RPMH_VREG("ldo1", LDO, 1, &pmic5_nldo, "vdd-l1"),
1408 RPMH_VREG("ldo2", LDO, 2, &pmic5_nldo, "vdd-l2-l3"),
1409 RPMH_VREG("ldo3", LDO, 3, &pmic5_nldo, "vdd-l2-l3"),
1410 RPMH_VREG("ldo4", LDO, 4, &pmic5_nldo, "vdd-l4-l7-l8"),
1411 RPMH_VREG("ldo5", LDO, 5, &pmic5_pldo, "vdd-l5-l16-l17-l18-l19"),
1412 RPMH_VREG("ldo6", LDO, 6, &pmic5_nldo, "vdd-l6"),
1413 RPMH_VREG("ldo7", LDO, 7, &pmic5_nldo, "vdd-l4-l7-l8"),
1414 RPMH_VREG("ldo8", LDO, 8, &pmic5_nldo, "vdd-l4-l7-l8"),
1415 RPMH_VREG("ldo9", LDO, 9, &pmic5_nldo, "vdd-l9"),
1416 RPMH_VREG("ldo10", LDO, 10, &pmic5_pldo_lv, "vdd-l10-l14-l15"),
1417 RPMH_VREG("ldo11", LDO, 11, &pmic5_pldo_lv, "vdd-l11-l12-l13"),
1418 RPMH_VREG("ldo12", LDO, 12, &pmic5_pldo_lv, "vdd-l11-l12-l13"),
1419 RPMH_VREG("ldo13", LDO, 13, &pmic5_pldo_lv, "vdd-l11-l12-l13"),
1420 RPMH_VREG("ldo14", LDO, 14, &pmic5_pldo_lv, "vdd-l10-l14-l15"),
1421 RPMH_VREG("ldo15", LDO, 15, &pmic5_pldo_lv, "vdd-l10-l14-l15"),
1422 RPMH_VREG("ldo16", LDO, 16, &pmic5_pldo, "vdd-l5-l16-l17-l18-l19"),
1423 RPMH_VREG("ldo17", LDO, 17, &pmic5_pldo, "vdd-l5-l16-l17-l18-l19"),
1424 RPMH_VREG("ldo18", LDO, 18, &pmic5_pldo, "vdd-l5-l16-l17-l18-l19"),
1425 RPMH_VREG("ldo19", LDO, 19, &pmic5_pldo, "vdd-l5-l16-l17-l18-l19"),
1426 {}
1427};
1428
1429static const struct rpmh_vreg_init_data pm6150l_vreg_data[] = {
1430 RPMH_VREG("smps1", SMPS, 1, &pmic5_ftsmps510, "vdd-s1"),
1431 RPMH_VREG("smps2", SMPS, 2, &pmic5_ftsmps510, "vdd-s2"),
1432 RPMH_VREG("smps3", SMPS, 3, &pmic5_ftsmps510, "vdd-s3"),
1433 RPMH_VREG("smps4", SMPS, 4, &pmic5_ftsmps510, "vdd-s4"),
1434 RPMH_VREG("smps5", SMPS, 5, &pmic5_ftsmps510, "vdd-s5"),
1435 RPMH_VREG("smps6", SMPS, 6, &pmic5_ftsmps510, "vdd-s6"),
1436 RPMH_VREG("smps7", SMPS, 7, &pmic5_ftsmps510, "vdd-s7"),
1437 RPMH_VREG("smps8", SMPS, 8, &pmic5_hfsmps510, "vdd-s8"),
1438 RPMH_VREG("ldo1", LDO, 1, &pmic5_pldo_lv, "vdd-l1-l8"),
1439 RPMH_VREG("ldo2", LDO, 2, &pmic5_nldo, "vdd-l2-l3"),
1440 RPMH_VREG("ldo3", LDO, 3, &pmic5_nldo, "vdd-l2-l3"),
1441 RPMH_VREG("ldo4", LDO, 4, &pmic5_pldo, "vdd-l4-l5-l6"),
1442 RPMH_VREG("ldo5", LDO, 5, &pmic5_pldo, "vdd-l4-l5-l6"),
1443 RPMH_VREG("ldo6", LDO, 6, &pmic5_pldo, "vdd-l4-l5-l6"),
1444 RPMH_VREG("ldo7", LDO, 7, &pmic5_pldo, "vdd-l7-l11"),
1445 RPMH_VREG("ldo8", LDO, 8, &pmic5_pldo, "vdd-l1-l8"),
1446 RPMH_VREG("ldo9", LDO, 9, &pmic5_pldo, "vdd-l9-l10"),
1447 RPMH_VREG("ldo10", LDO, 10, &pmic5_pldo, "vdd-l9-l10"),
1448 RPMH_VREG("ldo11", LDO, 11, &pmic5_pldo, "vdd-l7-l11"),
1449 RPMH_VREG("bob", BOB, 1, &pmic5_bob, "vdd-bob"),
1450 {}
1451};
1452
1453static const struct rpmh_vreg_init_data pm6350_vreg_data[] = {
1454 RPMH_VREG("smps1", SMPS, 1, &pmic5_ftsmps510, NULL),
1455 RPMH_VREG("smps2", SMPS, 2, &pmic5_hfsmps510, NULL),
1456 /* smps3 - smps5 not configured */
1457 RPMH_VREG("ldo1", LDO, 1, &pmic5_nldo, NULL),
1458 RPMH_VREG("ldo2", LDO, 2, &pmic5_pldo, NULL),
1459 RPMH_VREG("ldo3", LDO, 3, &pmic5_pldo, NULL),
1460 RPMH_VREG("ldo4", LDO, 4, &pmic5_nldo, NULL),
1461 RPMH_VREG("ldo5", LDO, 5, &pmic5_pldo, NULL),
1462 RPMH_VREG("ldo6", LDO, 6, &pmic5_pldo, NULL),
1463 RPMH_VREG("ldo7", LDO, 7, &pmic5_pldo, NULL),
1464 RPMH_VREG("ldo8", LDO, 8, &pmic5_pldo, NULL),
1465 RPMH_VREG("ldo9", LDO, 9, &pmic5_pldo, NULL),
1466 RPMH_VREG("ldo10", LDO, 10, &pmic5_pldo, NULL),
1467 RPMH_VREG("ldo11", LDO, 11, &pmic5_pldo, NULL),
1468 RPMH_VREG("ldo12", LDO, 12, &pmic5_pldo, NULL),
1469 RPMH_VREG("ldo13", LDO, 13, &pmic5_nldo, NULL),
1470 RPMH_VREG("ldo14", LDO, 14, &pmic5_pldo, NULL),
1471 RPMH_VREG("ldo15", LDO, 15, &pmic5_nldo, NULL),
1472 RPMH_VREG("ldo16", LDO, 16, &pmic5_nldo, NULL),
1473 /* ldo17 not configured */
1474 RPMH_VREG("ldo18", LDO, 18, &pmic5_nldo, NULL),
1475 RPMH_VREG("ldo19", LDO, 19, &pmic5_nldo, NULL),
1476 RPMH_VREG("ldo20", LDO, 20, &pmic5_nldo, NULL),
1477 RPMH_VREG("ldo21", LDO, 21, &pmic5_nldo, NULL),
1478 RPMH_VREG("ldo22", LDO, 22, &pmic5_nldo, NULL),
1479};
1480
1481static const struct rpmh_vreg_init_data pmcx0102_vreg_data[] = {
1482 RPMH_VREG("smps1", SMPS, 1, &pmic5_ftsmps530, "vdd-s1"),
1483 RPMH_VREG("smps2", SMPS, 2, &pmic5_ftsmps530, "vdd-s2"),
1484 RPMH_VREG("smps3", SMPS, 3, &pmic5_ftsmps530, "vdd-s3"),
1485 RPMH_VREG("smps4", SMPS, 4, &pmic5_ftsmps530, "vdd-s4"),
1486 RPMH_VREG("smps5", SMPS, 5, &pmic5_ftsmps530, "vdd-s5"),
1487 RPMH_VREG("smps6", SMPS, 6, &pmic5_ftsmps530, "vdd-s6"),
1488 RPMH_VREG("smps7", SMPS, 7, &pmic5_ftsmps530, "vdd-s7"),
1489 RPMH_VREG("smps8", SMPS, 8, &pmic5_ftsmps530, "vdd-s8"),
1490 RPMH_VREG("smps9", SMPS, 9, &pmic5_ftsmps530, "vdd-s9"),
1491 RPMH_VREG("smps10", SMPS, 10, &pmic5_ftsmps530, "vdd-s10"),
1492 RPMH_VREG("ldo1", LDO, 1, &pmic5_nldo530, "vdd-l1"),
1493 RPMH_VREG("ldo2", LDO, 2, &pmic5_nldo530, "vdd-l2"),
1494 RPMH_VREG("ldo3", LDO, 3, &pmic5_nldo530, "vdd-l3"),
1495 RPMH_VREG("ldo4", LDO, 4, &pmic5_nldo530, "vdd-l4"),
1496 {}
1497};
1498
1499static const struct rpmh_vreg_init_data pmh0101_vreg_data[] = {
1500 RPMH_VREG("ldo1", LDO, 1, &pmic5_nldo530, "vdd-l1-l4-l10"),
1501 RPMH_VREG("ldo2", LDO, 2, &pmic5_pldo530_mvp300, "vdd-l2-l13-l14"),
1502 RPMH_VREG("ldo3", LDO, 3, &pmic5_nldo530, "vdd-l3-l11"),
1503 RPMH_VREG("ldo4", LDO, 4, &pmic5_nldo530, "vdd-l1-l4-l10"),
1504 RPMH_VREG("ldo5", LDO, 5, &pmic5_pldo530_mvp150, "vdd-l5-l16"),
1505 RPMH_VREG("ldo6", LDO, 6, &pmic5_pldo530_mvp300, "vdd-l6-l7"),
1506 RPMH_VREG("ldo7", LDO, 7, &pmic5_pldo530_mvp300, "vdd-l6-l7"),
1507 RPMH_VREG("ldo8", LDO, 8, &pmic5_pldo530_mvp150, "vdd-l8-l9"),
1508 RPMH_VREG("ldo9", LDO, 9, &pmic5_pldo515_mv, "vdd-l8-l9"),
1509 RPMH_VREG("ldo10", LDO, 10, &pmic5_nldo530, "vdd-l1-l4-l10"),
1510 RPMH_VREG("ldo11", LDO, 11, &pmic5_nldo530, "vdd-l3-l11"),
1511 RPMH_VREG("ldo12", LDO, 12, &pmic5_nldo530, "vdd-l12"),
1512 RPMH_VREG("ldo13", LDO, 13, &pmic5_pldo530_mvp150, "vdd-l2-l13-l14"),
1513 RPMH_VREG("ldo14", LDO, 14, &pmic5_pldo530_mvp150, "vdd-l2-l13-l14"),
1514 RPMH_VREG("ldo15", LDO, 15, &pmic5_nldo530, "vdd-l15"),
1515 RPMH_VREG("ldo16", LDO, 15, &pmic5_pldo530_mvp600, "vdd-l5-l16"),
1516 RPMH_VREG("ldo17", LDO, 17, &pmic5_pldo515_mv, "vdd-l17"),
1517 RPMH_VREG("ldo18", LDO, 18, &pmic5_nldo530, "vdd-l18"),
1518 RPMH_VREG("bob1", BOB, 1, &pmic5_bob, "vdd-bob1"),
1519 RPMH_VREG("bob2", BOB, 2, &pmic5_bob, "vdd-bob2"),
1520 {}
1521};
1522
1523static const struct rpmh_vreg_init_data pmh0104_vreg_data[] = {
1524 RPMH_VREG("smps1", SMPS, 1, &pmic5_ftsmps530, "vdd-s1"),
1525 RPMH_VREG("smps2", SMPS, 2, &pmic5_ftsmps530, "vdd-s2"),
1526 RPMH_VREG("smps3", SMPS, 3, &pmic5_ftsmps530, "vdd-s3"),
1527 RPMH_VREG("smps4", SMPS, 4, &pmic5_ftsmps530, "vdd-s4"),
1528 {}
1529};
1530
1531static const struct rpmh_vreg_init_data pmh0110_vreg_data[] = {
1532 RPMH_VREG("smps1", SMPS, 1, &pmic5_ftsmps530, "vdd-s1"),
1533 RPMH_VREG("smps2", SMPS, 2, &pmic5_ftsmps530, "vdd-s2"),
1534 RPMH_VREG("smps3", SMPS, 3, &pmic5_ftsmps530, "vdd-s3"),
1535 RPMH_VREG("smps4", SMPS, 4, &pmic5_ftsmps530, "vdd-s4"),
1536 RPMH_VREG("smps5", SMPS, 5, &pmic5_ftsmps530, "vdd-s5"),
1537 RPMH_VREG("smps6", SMPS, 6, &pmic5_ftsmps530, "vdd-s6"),
1538 RPMH_VREG("smps7", SMPS, 7, &pmic5_ftsmps530, "vdd-s7"),
1539 RPMH_VREG("smps8", SMPS, 8, &pmic5_ftsmps530, "vdd-s8"),
1540 RPMH_VREG("smps9", SMPS, 9, &pmic5_ftsmps530, "vdd-s9"),
1541 RPMH_VREG("smps10", SMPS, 10, &pmic5_ftsmps530, "vdd-s10"),
1542 RPMH_VREG("ldo1", LDO, 1, &pmic5_nldo530, "vdd-l1"),
1543 RPMH_VREG("ldo2", LDO, 2, &pmic5_nldo530, "vdd-l2"),
1544 RPMH_VREG("ldo3", LDO, 3, &pmic5_nldo530, "vdd-l3"),
1545 RPMH_VREG("ldo4", LDO, 4, &pmic5_nldo530, "vdd-l4"),
1546 {}
1547};
1548
1549static const struct rpmh_vreg_init_data pmx55_vreg_data[] = {
1550 RPMH_VREG("smps1", SMPS, 1, &pmic5_ftsmps510, "vdd-s1"),
1551 RPMH_VREG("smps2", SMPS, 2, &pmic5_hfsmps510, "vdd-s2"),
1552 RPMH_VREG("smps3", SMPS, 3, &pmic5_hfsmps510, "vdd-s3"),
1553 RPMH_VREG("smps4", SMPS, 4, &pmic5_hfsmps510, "vdd-s4"),
1554 RPMH_VREG("smps5", SMPS, 5, &pmic5_hfsmps510, "vdd-s5"),
1555 RPMH_VREG("smps6", SMPS, 6, &pmic5_ftsmps510, "vdd-s6"),
1556 RPMH_VREG("smps7", SMPS, 7, &pmic5_hfsmps510, "vdd-s7"),
1557 RPMH_VREG("ldo1", LDO, 1, &pmic5_nldo, "vdd-l1-l2"),
1558 RPMH_VREG("ldo2", LDO, 2, &pmic5_nldo, "vdd-l1-l2"),
1559 RPMH_VREG("ldo3", LDO, 3, &pmic5_nldo, "vdd-l3-l9"),
1560 RPMH_VREG("ldo4", LDO, 4, &pmic5_nldo, "vdd-l4-l12"),
1561 RPMH_VREG("ldo5", LDO, 5, &pmic5_pldo, "vdd-l5-l6"),
1562 RPMH_VREG("ldo6", LDO, 6, &pmic5_pldo, "vdd-l5-l6"),
1563 RPMH_VREG("ldo7", LDO, 7, &pmic5_nldo, "vdd-l7-l8"),
1564 RPMH_VREG("ldo8", LDO, 8, &pmic5_nldo, "vdd-l7-l8"),
1565 RPMH_VREG("ldo9", LDO, 9, &pmic5_nldo, "vdd-l3-l9"),
1566 RPMH_VREG("ldo10", LDO, 10, &pmic5_pldo, "vdd-l10-l11-l13"),
1567 RPMH_VREG("ldo11", LDO, 11, &pmic5_pldo, "vdd-l10-l11-l13"),
1568 RPMH_VREG("ldo12", LDO, 12, &pmic5_nldo, "vdd-l4-l12"),
1569 RPMH_VREG("ldo13", LDO, 13, &pmic5_pldo, "vdd-l10-l11-l13"),
1570 RPMH_VREG("ldo14", LDO, 14, &pmic5_nldo, "vdd-l14"),
1571 RPMH_VREG("ldo15", LDO, 15, &pmic5_nldo, "vdd-l15"),
1572 RPMH_VREG("ldo16", LDO, 16, &pmic5_pldo, "vdd-l16"),
1573 {}
1574};
1575
1576static const struct rpmh_vreg_init_data pmx65_vreg_data[] = {
1577 RPMH_VREG("smps1", SMPS, 1, &pmic5_ftsmps510, "vdd-s1"),
1578 RPMH_VREG("smps2", SMPS, 2, &pmic5_hfsmps510, "vdd-s2"),
1579 RPMH_VREG("smps3", SMPS, 3, &pmic5_hfsmps510, "vdd-s3"),
1580 RPMH_VREG("smps4", SMPS, 4, &pmic5_hfsmps510, "vdd-s4"),
1581 RPMH_VREG("smps5", SMPS, 5, &pmic5_hfsmps510, "vdd-s5"),
1582 RPMH_VREG("smps6", SMPS, 6, &pmic5_ftsmps510, "vdd-s6"),
1583 RPMH_VREG("smps7", SMPS, 7, &pmic5_hfsmps510, "vdd-s7"),
1584 RPMH_VREG("smps8", SMPS, 8, &pmic5_hfsmps510, "vdd-s8"),
1585 RPMH_VREG("ldo1", LDO, 1, &pmic5_nldo, "vdd-l1"),
1586 RPMH_VREG("ldo2", LDO, 2, &pmic5_nldo, "vdd-l2-l18"),
1587 RPMH_VREG("ldo3", LDO, 3, &pmic5_nldo, "vdd-l3"),
1588 RPMH_VREG("ldo4", LDO, 4, &pmic5_nldo, "vdd-l4"),
1589 RPMH_VREG("ldo5", LDO, 5, &pmic5_pldo, "vdd-l5-l6-l16"),
1590 RPMH_VREG("ldo6", LDO, 6, &pmic5_pldo, "vdd-l5-l6-l16"),
1591 RPMH_VREG("ldo7", LDO, 7, &pmic5_nldo, "vdd-l7"),
1592 RPMH_VREG("ldo8", LDO, 8, &pmic5_nldo, "vdd-l8-l9"),
1593 RPMH_VREG("ldo9", LDO, 9, &pmic5_nldo, "vdd-l8-l9"),
1594 RPMH_VREG("ldo10", LDO, 10, &pmic5_pldo, "vdd-l10"),
1595 RPMH_VREG("ldo11", LDO, 11, &pmic5_pldo, "vdd-l11-l13"),
1596 RPMH_VREG("ldo12", LDO, 12, &pmic5_nldo, "vdd-l12"),
1597 RPMH_VREG("ldo13", LDO, 13, &pmic5_pldo, "vdd-l11-l13"),
1598 RPMH_VREG("ldo14", LDO, 14, &pmic5_nldo, "vdd-l14"),
1599 RPMH_VREG("ldo15", LDO, 15, &pmic5_nldo, "vdd-l15"),
1600 RPMH_VREG("ldo16", LDO, 16, &pmic5_pldo, "vdd-l5-l6-l16"),
1601 RPMH_VREG("ldo17", LDO, 17, &pmic5_nldo, "vdd-l17"),
1602 /* ldo18 not configured */
1603 RPMH_VREG("ldo19", LDO, 19, &pmic5_nldo, "vdd-l19"),
1604 RPMH_VREG("ldo20", LDO, 20, &pmic5_nldo, "vdd-l20"),
1605 RPMH_VREG("ldo21", LDO, 21, &pmic5_nldo, "vdd-l21"),
1606 {}
1607};
1608
1609static const struct rpmh_vreg_init_data pmx75_vreg_data[] = {
1610 RPMH_VREG("smps1", SMPS, 1, &pmic5_ftsmps525, "vdd-s1"),
1611 RPMH_VREG("smps2", SMPS, 2, &pmic5_ftsmps525, "vdd-s2"),
1612 RPMH_VREG("smps3", SMPS, 3, &pmic5_ftsmps525, "vdd-s3"),
1613 RPMH_VREG("smps4", SMPS, 4, &pmic5_ftsmps525, "vdd-s4"),
1614 RPMH_VREG("smps5", SMPS, 5, &pmic5_ftsmps525, "vdd-s5"),
1615 RPMH_VREG("smps6", SMPS, 6, &pmic5_ftsmps525, "vdd-s6"),
1616 RPMH_VREG("smps7", SMPS, 7, &pmic5_ftsmps525, "vdd-s7"),
1617 RPMH_VREG("smps8", SMPS, 8, &pmic5_ftsmps525, "vdd-s8"),
1618 RPMH_VREG("smps9", SMPS, 9, &pmic5_ftsmps525, "vdd-s9"),
1619 RPMH_VREG("smps10", SMPS, 10, &pmic5_ftsmps525, "vdd-s10"),
1620 RPMH_VREG("ldo1", LDO, 1, &pmic5_nldo515, "vdd-l1"),
1621 RPMH_VREG("ldo2", LDO, 2, &pmic5_nldo515, "vdd-l2-18"),
1622 RPMH_VREG("ldo3", LDO, 3, &pmic5_nldo515, "vdd-l3"),
1623 RPMH_VREG("ldo4", LDO, 4, &pmic5_nldo515, "vdd-l4-l16"),
1624 RPMH_VREG("ldo5", LDO, 5, &pmic5_pldo_lv, "vdd-l5-l6"),
1625 RPMH_VREG("ldo6", LDO, 6, &pmic5_pldo_lv, "vdd-l5-l6"),
1626 RPMH_VREG("ldo7", LDO, 7, &pmic5_nldo515, "vdd-l7"),
1627 RPMH_VREG("ldo8", LDO, 8, &pmic5_nldo515, "vdd-l8-l9"),
1628 RPMH_VREG("ldo9", LDO, 9, &pmic5_nldo515, "vdd-l8-l9"),
1629 RPMH_VREG("ldo10", LDO, 10, &pmic5_pldo, "vdd-l10"),
1630 RPMH_VREG("ldo11", LDO, 11, &pmic5_pldo, "vdd-l11-l13"),
1631 RPMH_VREG("ldo12", LDO, 12, &pmic5_nldo515, "vdd-l12"),
1632 RPMH_VREG("ldo13", LDO, 13, &pmic5_pldo, "vdd-l11-l13"),
1633 RPMH_VREG("ldo14", LDO, 14, &pmic5_nldo515, "vdd-l14"),
1634 RPMH_VREG("ldo15", LDO, 15, &pmic5_nldo515, "vdd-l15"),
1635 RPMH_VREG("ldo16", LDO, 16, &pmic5_nldo515, "vdd-l4-l16"),
1636 RPMH_VREG("ldo17", LDO, 17, &pmic5_nldo515, "vdd-l17"),
1637 /* ldo18 not configured */
1638 RPMH_VREG("ldo19", LDO, 19, &pmic5_nldo515, "vdd-l19"),
1639 RPMH_VREG("ldo20", LDO, 20, &pmic5_nldo515, "vdd-l20-l21"),
1640 RPMH_VREG("ldo21", LDO, 21, &pmic5_nldo515, "vdd-l20-l21"),
1641};
1642
1643static const struct rpmh_vreg_init_data pm7325_vreg_data[] = {
1644 RPMH_VREG("smps1", SMPS, 1, &pmic5_hfsmps510, "vdd-s1"),
1645 RPMH_VREG("smps2", SMPS, 2, &pmic5_ftsmps520, "vdd-s2"),
1646 RPMH_VREG("smps3", SMPS, 3, &pmic5_ftsmps520, "vdd-s3"),
1647 RPMH_VREG("smps4", SMPS, 4, &pmic5_ftsmps520, "vdd-s4"),
1648 RPMH_VREG("smps5", SMPS, 5, &pmic5_ftsmps520, "vdd-s5"),
1649 RPMH_VREG("smps6", SMPS, 6, &pmic5_ftsmps520, "vdd-s6"),
1650 RPMH_VREG("smps7", SMPS, 7, &pmic5_ftsmps520, "vdd-s7"),
1651 RPMH_VREG("smps8", SMPS, 8, &pmic5_hfsmps510, "vdd-s8"),
1652 RPMH_VREG("ldo1", LDO, 1, &pmic5_nldo, "vdd-l1-l4-l12-l15"),
1653 RPMH_VREG("ldo2", LDO, 2, &pmic5_pldo, "vdd-l2-l7"),
1654 RPMH_VREG("ldo3", LDO, 3, &pmic5_nldo, "vdd-l3"),
1655 RPMH_VREG("ldo4", LDO, 4, &pmic5_nldo, "vdd-l1-l4-l12-l15"),
1656 RPMH_VREG("ldo5", LDO, 5, &pmic5_nldo, "vdd-l5"),
1657 RPMH_VREG("ldo6", LDO, 6, &pmic5_nldo, "vdd-l6-l9-l10"),
1658 RPMH_VREG("ldo7", LDO, 7, &pmic5_pldo, "vdd-l2-l7"),
1659 RPMH_VREG("ldo8", LDO, 8, &pmic5_nldo, "vdd-l8"),
1660 RPMH_VREG("ldo9", LDO, 9, &pmic5_nldo, "vdd-l6-l9-l10"),
1661 RPMH_VREG("ldo10", LDO, 10, &pmic5_nldo, "vdd-l6-l9-l10"),
1662 RPMH_VREG("ldo11", LDO, 11, &pmic5_pldo_lv, "vdd-l11-l17-l18-l19"),
1663 RPMH_VREG("ldo12", LDO, 12, &pmic5_nldo, "vdd-l1-l4-l12-l15"),
1664 RPMH_VREG("ldo13", LDO, 13, &pmic5_nldo, "vdd-l13"),
1665 RPMH_VREG("ldo14", LDO, 14, &pmic5_nldo, "vdd-l14-l16"),
1666 RPMH_VREG("ldo15", LDO, 15, &pmic5_nldo, "vdd-l1-l4-l12-l15"),
1667 RPMH_VREG("ldo16", LDO, 16, &pmic5_nldo, "vdd-l14-l16"),
1668 RPMH_VREG("ldo17", LDO, 17, &pmic5_pldo_lv, "vdd-l11-l17-l18-l19"),
1669 RPMH_VREG("ldo18", LDO, 18, &pmic5_pldo_lv, "vdd-l11-l17-l18-l19"),
1670 RPMH_VREG("ldo19", LDO, 19, &pmic5_pldo_lv, "vdd-l11-l17-l18-l19"),
1671 {}
1672};
1673
1674static const struct rpmh_vreg_init_data pm7550_vreg_data[] = {
1675 RPMH_VREG("smps1", SMPS, 1, &pmic5_ftsmps525, "vdd-s1"),
1676 RPMH_VREG("smps2", SMPS, 2, &pmic5_ftsmps525, "vdd-s2"),
1677 RPMH_VREG("smps3", SMPS, 3, &pmic5_ftsmps525, "vdd-s3"),
1678 RPMH_VREG("smps4", SMPS, 4, &pmic5_ftsmps525, "vdd-s4"),
1679 RPMH_VREG("smps5", SMPS, 5, &pmic5_ftsmps525, "vdd-s5"),
1680 RPMH_VREG("smps6", SMPS, 6, &pmic5_ftsmps525, "vdd-s6"),
1681 RPMH_VREG("ldo1", LDO, 1, &pmic5_nldo515, "vdd-l1"),
1682 RPMH_VREG("ldo2", LDO, 2, &pmic5_nldo515, "vdd-l2-l3"),
1683 RPMH_VREG("ldo3", LDO, 3, &pmic5_nldo515, "vdd-l2-l3"),
1684 RPMH_VREG("ldo4", LDO, 4, &pmic5_nldo515, "vdd-l4-l5"),
1685 RPMH_VREG("ldo5", LDO, 5, &pmic5_nldo515, "vdd-l4-l5"),
1686 RPMH_VREG("ldo6", LDO, 6, &pmic5_nldo515, "vdd-l6"),
1687 RPMH_VREG("ldo7", LDO, 7, &pmic5_nldo515, "vdd-l7"),
1688 RPMH_VREG("ldo8", LDO, 8, &pmic5_nldo515, "vdd-l8"),
1689 RPMH_VREG("ldo9", LDO, 9, &pmic5_nldo515, "vdd-l9-l10"),
1690 RPMH_VREG("ldo10", LDO, 10, &pmic5_nldo515, "vdd-l9-l10"),
1691 RPMH_VREG("ldo11", LDO, 11, &pmic5_nldo515, "vdd-l11"),
1692 RPMH_VREG("ldo12", LDO, 12, &pmic5_pldo515_mv, "vdd-l12-l14"),
1693 RPMH_VREG("ldo13", LDO, 13, &pmic5_pldo515_mv, "vdd-l13-l16"),
1694 RPMH_VREG("ldo14", LDO, 14, &pmic5_pldo, "vdd-l12-l14"),
1695 RPMH_VREG("ldo15", LDO, 15, &pmic5_pldo, "vdd-l15-l17-l18-l19-l20-l21-l22-l23"),
1696 RPMH_VREG("ldo16", LDO, 16, &pmic5_pldo, "vdd-l13-l16"),
1697 RPMH_VREG("ldo17", LDO, 17, &pmic5_pldo, "vdd-l15-l17-l18-l19-l20-l21-l22-l23"),
1698 RPMH_VREG("ldo18", LDO, 18, &pmic5_pldo, "vdd-l15-l17-l18-l19-l20-l21-l22-l23"),
1699 RPMH_VREG("ldo19", LDO, 19, &pmic5_pldo, "vdd-l15-l17-l18-l19-l20-l21-l22-l23"),
1700 RPMH_VREG("ldo20", LDO, 20, &pmic5_pldo, "vdd-l15-l17-l18-l19-l20-l21-l22-l23"),
1701 RPMH_VREG("ldo21", LDO, 21, &pmic5_pldo, "vdd-l15-l17-l18-l19-l20-l21-l22-l23"),
1702 RPMH_VREG("ldo22", LDO, 22, &pmic5_pldo, "vdd-l15-l17-l18-l19-l20-l21-l22-l23"),
1703 RPMH_VREG("ldo23", LDO, 23, &pmic5_pldo, "vdd-l15-l17-l18-l19-l20-l21-l22-l23"),
1704 RPMH_VREG("bob", BOB, 1, &pmic5_bob, "vdd-bob"),
1705 {}
1706};
1707
1708static const struct rpmh_vreg_init_data pmr735a_vreg_data[] = {
1709 RPMH_VREG("smps1", SMPS, 1, &pmic5_ftsmps520, "vdd-s1"),
1710 RPMH_VREG("smps2", SMPS, 2, &pmic5_ftsmps520, "vdd-s2"),
1711 RPMH_VREG("smps3", SMPS, 3, &pmic5_hfsmps515, "vdd-s3"),
1712 RPMH_VREG("ldo1", LDO, 1, &pmic5_nldo, "vdd-l1-l2"),
1713 RPMH_VREG("ldo2", LDO, 2, &pmic5_nldo, "vdd-l1-l2"),
1714 RPMH_VREG("ldo3", LDO, 3, &pmic5_nldo, "vdd-l3"),
1715 RPMH_VREG("ldo4", LDO, 4, &pmic5_pldo_lv, "vdd-l4"),
1716 RPMH_VREG("ldo5", LDO, 5, &pmic5_nldo, "vdd-l5-l6"),
1717 RPMH_VREG("ldo6", LDO, 6, &pmic5_nldo, "vdd-l5-l6"),
1718 RPMH_VREG("ldo7", LDO, 7, &pmic5_pldo, "vdd-l7-bob"),
1719 {}
1720};
1721
1722static const struct rpmh_vreg_init_data pmr735b_vreg_data[] = {
1723 RPMH_VREG("ldo1", LDO, 1, &pmic5_nldo, "vdd-l1-l2"),
1724 RPMH_VREG("ldo2", LDO, 2, &pmic5_nldo, "vdd-l1-l2"),
1725 RPMH_VREG("ldo3", LDO, 3, &pmic5_nldo, "vdd-l3"),
1726 RPMH_VREG("ldo4", LDO, 4, &pmic5_pldo_lv, "vdd-l4"),
1727 RPMH_VREG("ldo5", LDO, 5, &pmic5_nldo, "vdd-l5"),
1728 RPMH_VREG("ldo6", LDO, 6, &pmic5_nldo, "vdd-l6"),
1729 RPMH_VREG("ldo7", LDO, 7, &pmic5_nldo, "vdd-l7-l8"),
1730 RPMH_VREG("ldo8", LDO, 8, &pmic5_nldo, "vdd-l7-l8"),
1731 RPMH_VREG("ldo9", LDO, 9, &pmic5_nldo, "vdd-l9"),
1732 RPMH_VREG("ldo10", LDO, 10, &pmic5_pldo_lv, "vdd-l10"),
1733 RPMH_VREG("ldo11", LDO, 11, &pmic5_nldo, "vdd-l11"),
1734 RPMH_VREG("ldo12", LDO, 12, &pmic5_nldo, "vdd-l12"),
1735 {}
1736};
1737
1738static const struct rpmh_vreg_init_data pmr735d_vreg_data[] = {
1739 RPMH_VREG("ldo1", LDO, 1, &pmic5_nldo515, "vdd-l1-l2-l5"),
1740 RPMH_VREG("ldo2", LDO, 2, &pmic5_nldo515, "vdd-l1-l2-l5"),
1741 RPMH_VREG("ldo3", LDO, 3, &pmic5_nldo515, "vdd-l3-l4"),
1742 RPMH_VREG("ldo4", LDO, 4, &pmic5_nldo515, "vdd-l3-l4"),
1743 RPMH_VREG("ldo5", LDO, 5, &pmic5_nldo515, "vdd-l1-l2-l5"),
1744 RPMH_VREG("ldo6", LDO, 6, &pmic5_nldo515, "vdd-l6"),
1745 RPMH_VREG("ldo7", LDO, 7, &pmic5_nldo515, "vdd-l7"),
1746 {}
1747};
1748
1749static const struct rpmh_vreg_init_data pm660_vreg_data[] = {
1750 RPMH_VREG("smps1", SMPS, 1, &pmic4_ftsmps426, "vdd-s1"),
1751 RPMH_VREG("smps2", SMPS, 2, &pmic4_ftsmps426, "vdd-s2"),
1752 RPMH_VREG("smps3", SMPS, 3, &pmic4_ftsmps426, "vdd-s3"),
1753 RPMH_VREG("smps4", SMPS, 4, &pmic4_hfsmps3, "vdd-s4"),
1754 RPMH_VREG("smps5", SMPS, 5, &pmic4_hfsmps3, "vdd-s5"),
1755 RPMH_VREG("smps6", SMPS, 6, &pmic4_hfsmps3, "vdd-s6"),
1756 RPMH_VREG("ldo1", LDO, 1, &pmic4_nldo, "vdd-l1-l6-l7"),
1757 RPMH_VREG("ldo2", LDO, 2, &pmic4_nldo, "vdd-l2-l3"),
1758 RPMH_VREG("ldo3", LDO, 3, &pmic4_nldo, "vdd-l2-l3"),
1759 /* ldo4 is inaccessible on PM660 */
1760 RPMH_VREG("ldo5", LDO, 5, &pmic4_nldo, "vdd-l5"),
1761 RPMH_VREG("ldo6", LDO, 6, &pmic4_nldo, "vdd-l1-l6-l7"),
1762 RPMH_VREG("ldo7", LDO, 7, &pmic4_nldo, "vdd-l1-l6-l7"),
1763 RPMH_VREG("ldo8", LDO, 8, &pmic4_pldo_lv, "vdd-l8-l9-l10-l11-l12-l13-l14"),
1764 RPMH_VREG("ldo9", LDO, 9, &pmic4_pldo_lv, "vdd-l8-l9-l10-l11-l12-l13-l14"),
1765 RPMH_VREG("ldo10", LDO, 10, &pmic4_pldo_lv, "vdd-l8-l9-l10-l11-l12-l13-l14"),
1766 RPMH_VREG("ldo11", LDO, 11, &pmic4_pldo_lv, "vdd-l8-l9-l10-l11-l12-l13-l14"),
1767 RPMH_VREG("ldo12", LDO, 12, &pmic4_pldo_lv, "vdd-l8-l9-l10-l11-l12-l13-l14"),
1768 RPMH_VREG("ldo13", LDO, 13, &pmic4_pldo_lv, "vdd-l8-l9-l10-l11-l12-l13-l14"),
1769 RPMH_VREG("ldo14", LDO, 14, &pmic4_pldo_lv, "vdd-l8-l9-l10-l11-l12-l13-l14"),
1770 RPMH_VREG("ldo15", LDO, 15, &pmic4_pldo, "vdd-l15-l16-l17-l18-l19"),
1771 RPMH_VREG("ldo16", LDO, 16, &pmic4_pldo, "vdd-l15-l16-l17-l18-l19"),
1772 RPMH_VREG("ldo17", LDO, 17, &pmic4_pldo, "vdd-l15-l16-l17-l18-l19"),
1773 RPMH_VREG("ldo18", LDO, 18, &pmic4_pldo, "vdd-l15-l16-l17-l18-l19"),
1774 RPMH_VREG("ldo19", LDO, 19, &pmic4_pldo, "vdd-l15-l16-l17-l18-l19"),
1775 {}
1776};
1777
1778static const struct rpmh_vreg_init_data pm660l_vreg_data[] = {
1779 RPMH_VREG("smps1", SMPS, 1, &pmic4_ftsmps426, "vdd-s1"),
1780 RPMH_VREG("smps2", SMPS, 2, &pmic4_ftsmps426, "vdd-s2"),
1781 RPMH_VREG("smps3", SMPS, 3, &pmic4_ftsmps426, "vdd-s3-s4"),
1782 RPMH_VREG("smps5", SMPS, 5, &pmic4_ftsmps426, "vdd-s5"),
1783 RPMH_VREG("ldo1", LDO, 1, &pmic4_nldo, "vdd-l1-l9-l10"),
1784 RPMH_VREG("ldo2", LDO, 2, &pmic4_pldo, "vdd-l2"),
1785 RPMH_VREG("ldo3", LDO, 3, &pmic4_pldo, "vdd-l3-l5-l7-l8"),
1786 RPMH_VREG("ldo4", LDO, 4, &pmic4_pldo, "vdd-l4-l6"),
1787 RPMH_VREG("ldo5", LDO, 5, &pmic4_pldo, "vdd-l3-l5-l7-l8"),
1788 RPMH_VREG("ldo6", LDO, 6, &pmic4_pldo, "vdd-l4-l6"),
1789 RPMH_VREG("ldo7", LDO, 7, &pmic4_pldo, "vdd-l3-l5-l7-l8"),
1790 RPMH_VREG("ldo8", LDO, 8, &pmic4_pldo, "vdd-l3-l5-l7-l8"),
1791 RPMH_VREG("bob", BOB, 1, &pmic4_bob, "vdd-bob"),
1792 {}
1793};
1794
1795static int rpmh_regulator_probe(struct platform_device *pdev)
1796{
1797 struct device *dev = &pdev->dev;
1798 const struct rpmh_vreg_init_data *vreg_data;
1799 struct rpmh_vreg *vreg;
1800 const char *pmic_id;
1801 int ret;
1802
1803 vreg_data = of_device_get_match_data(dev);
1804 if (!vreg_data)
1805 return -ENODEV;
1806
1807 ret = of_property_read_string(np: dev->of_node, propname: "qcom,pmic-id", out_string: &pmic_id);
1808 if (ret < 0) {
1809 dev_err(dev, "qcom,pmic-id missing in DT node\n");
1810 return ret;
1811 }
1812
1813 for_each_available_child_of_node_scoped(dev->of_node, node) {
1814 vreg = devm_kzalloc(dev, size: sizeof(*vreg), GFP_KERNEL);
1815 if (!vreg)
1816 return -ENOMEM;
1817
1818 ret = rpmh_regulator_init_vreg(vreg, dev, node, pmic_id,
1819 pmic_rpmh_data: vreg_data);
1820 if (ret < 0)
1821 return ret;
1822 }
1823
1824 return 0;
1825}
1826
1827static const struct of_device_id __maybe_unused rpmh_regulator_match_table[] = {
1828 {
1829 .compatible = "qcom,pm8005-rpmh-regulators",
1830 .data = pm8005_vreg_data,
1831 },
1832 {
1833 .compatible = "qcom,pm8009-rpmh-regulators",
1834 .data = pm8009_vreg_data,
1835 },
1836 {
1837 .compatible = "qcom,pm8009-1-rpmh-regulators",
1838 .data = pm8009_1_vreg_data,
1839 },
1840 {
1841 .compatible = "qcom,pm8010-rpmh-regulators",
1842 .data = pm8010_vreg_data,
1843 },
1844 {
1845 .compatible = "qcom,pm8150-rpmh-regulators",
1846 .data = pm8150_vreg_data,
1847 },
1848 {
1849 .compatible = "qcom,pm8150l-rpmh-regulators",
1850 .data = pm8150l_vreg_data,
1851 },
1852 {
1853 .compatible = "qcom,pm8350-rpmh-regulators",
1854 .data = pm8350_vreg_data,
1855 },
1856 {
1857 .compatible = "qcom,pm8350c-rpmh-regulators",
1858 .data = pm8350c_vreg_data,
1859 },
1860 {
1861 .compatible = "qcom,pm8450-rpmh-regulators",
1862 .data = pm8450_vreg_data,
1863 },
1864 {
1865 .compatible = "qcom,pm8550-rpmh-regulators",
1866 .data = pm8550_vreg_data,
1867 },
1868 {
1869 .compatible = "qcom,pm8550ve-rpmh-regulators",
1870 .data = pm8550ve_vreg_data,
1871 },
1872 {
1873 .compatible = "qcom,pm8550vs-rpmh-regulators",
1874 .data = pm8550vs_vreg_data,
1875 },
1876 {
1877 .compatible = "qcom,pm8998-rpmh-regulators",
1878 .data = pm8998_vreg_data,
1879 },
1880 {
1881 .compatible = "qcom,pmg1110-rpmh-regulators",
1882 .data = pmg1110_vreg_data,
1883 },
1884 {
1885 .compatible = "qcom,pmi8998-rpmh-regulators",
1886 .data = pmi8998_vreg_data,
1887 },
1888 {
1889 .compatible = "qcom,pm6150-rpmh-regulators",
1890 .data = pm6150_vreg_data,
1891 },
1892 {
1893 .compatible = "qcom,pm6150l-rpmh-regulators",
1894 .data = pm6150l_vreg_data,
1895 },
1896 {
1897 .compatible = "qcom,pm6350-rpmh-regulators",
1898 .data = pm6350_vreg_data,
1899 },
1900 {
1901 .compatible = "qcom,pmc8180-rpmh-regulators",
1902 .data = pm8150_vreg_data,
1903 },
1904 {
1905 .compatible = "qcom,pmc8180c-rpmh-regulators",
1906 .data = pm8150l_vreg_data,
1907 },
1908 {
1909 .compatible = "qcom,pmc8380-rpmh-regulators",
1910 .data = pmc8380_vreg_data,
1911 },
1912 {
1913 .compatible = "qcom,pmcx0102-rpmh-regulators",
1914 .data = pmcx0102_vreg_data,
1915 },
1916 {
1917 .compatible = "qcom,pmh0101-rpmh-regulators",
1918 .data = pmh0101_vreg_data,
1919 },
1920 {
1921 .compatible = "qcom,pmh0104-rpmh-regulators",
1922 .data = pmh0104_vreg_data,
1923 },
1924 {
1925 .compatible = "qcom,pmh0110-rpmh-regulators",
1926 .data = pmh0110_vreg_data,
1927 },
1928 {
1929 .compatible = "qcom,pmm8155au-rpmh-regulators",
1930 .data = pmm8155au_vreg_data,
1931 },
1932 {
1933 .compatible = "qcom,pmm8654au-rpmh-regulators",
1934 .data = pmm8654au_vreg_data,
1935 },
1936 {
1937 .compatible = "qcom,pmx55-rpmh-regulators",
1938 .data = pmx55_vreg_data,
1939 },
1940 {
1941 .compatible = "qcom,pmx65-rpmh-regulators",
1942 .data = pmx65_vreg_data,
1943 },
1944 {
1945 .compatible = "qcom,pmx75-rpmh-regulators",
1946 .data = pmx75_vreg_data,
1947 },
1948 {
1949 .compatible = "qcom,pm7325-rpmh-regulators",
1950 .data = pm7325_vreg_data,
1951 },
1952 {
1953 .compatible = "qcom,pm7550-rpmh-regulators",
1954 .data = pm7550_vreg_data,
1955 },
1956 {
1957 .compatible = "qcom,pmr735a-rpmh-regulators",
1958 .data = pmr735a_vreg_data,
1959 },
1960 {
1961 .compatible = "qcom,pmr735b-rpmh-regulators",
1962 .data = pmr735b_vreg_data,
1963 },
1964 {
1965 .compatible = "qcom,pmr735d-rpmh-regulators",
1966 .data = pmr735d_vreg_data,
1967 },
1968 {
1969 .compatible = "qcom,pm660-rpmh-regulators",
1970 .data = pm660_vreg_data,
1971 },
1972 {
1973 .compatible = "qcom,pm660l-rpmh-regulators",
1974 .data = pm660l_vreg_data,
1975 },
1976 {}
1977};
1978MODULE_DEVICE_TABLE(of, rpmh_regulator_match_table);
1979
1980static struct platform_driver rpmh_regulator_driver = {
1981 .driver = {
1982 .name = "qcom-rpmh-regulator",
1983 .probe_type = PROBE_PREFER_ASYNCHRONOUS,
1984 .of_match_table = of_match_ptr(rpmh_regulator_match_table),
1985 },
1986 .probe = rpmh_regulator_probe,
1987};
1988module_platform_driver(rpmh_regulator_driver);
1989
1990MODULE_DESCRIPTION("Qualcomm RPMh regulator driver");
1991MODULE_LICENSE("GPL v2");
1992

source code of linux/drivers/regulator/qcom-rpmh-regulator.c