1// SPDX-License-Identifier: GPL-2.0
2// BQ25980 Battery Charger Driver
3// Copyright (C) 2020 Texas Instruments Incorporated - http://www.ti.com/
4
5#include <linux/err.h>
6#include <linux/i2c.h>
7#include <linux/init.h>
8#include <linux/interrupt.h>
9#include <linux/kernel.h>
10#include <linux/module.h>
11#include <linux/gpio/consumer.h>
12#include <linux/power_supply.h>
13#include <linux/regmap.h>
14#include <linux/types.h>
15#include <linux/delay.h>
16#include <linux/device.h>
17#include <linux/moduleparam.h>
18#include <linux/slab.h>
19
20#include "bq25980_charger.h"
21
22struct bq25980_state {
23 bool dischg;
24 bool ovp;
25 bool ocp;
26 bool wdt;
27 bool tflt;
28 bool online;
29 bool ce;
30 bool hiz;
31 bool bypass;
32
33 u32 vbat_adc;
34 u32 vsys_adc;
35 u32 ibat_adc;
36};
37
38enum bq25980_id {
39 BQ25980,
40 BQ25975,
41 BQ25960,
42};
43
44struct bq25980_chip_info {
45
46 int model_id;
47
48 const struct regmap_config *regmap_config;
49
50 int busocp_def;
51 int busocp_sc_max;
52 int busocp_byp_max;
53 int busocp_sc_min;
54 int busocp_byp_min;
55
56 int busovp_sc_def;
57 int busovp_byp_def;
58 int busovp_sc_step;
59
60 int busovp_sc_offset;
61 int busovp_byp_step;
62 int busovp_byp_offset;
63 int busovp_sc_min;
64 int busovp_sc_max;
65 int busovp_byp_min;
66 int busovp_byp_max;
67
68 int batovp_def;
69 int batovp_max;
70 int batovp_min;
71 int batovp_step;
72 int batovp_offset;
73
74 int batocp_def;
75 int batocp_max;
76};
77
78struct bq25980_init_data {
79 u32 ichg;
80 u32 bypass_ilim;
81 u32 sc_ilim;
82 u32 vreg;
83 u32 iterm;
84 u32 iprechg;
85 u32 bypass_vlim;
86 u32 sc_vlim;
87 u32 ichg_max;
88 u32 vreg_max;
89};
90
91struct bq25980_device {
92 struct i2c_client *client;
93 struct device *dev;
94 struct power_supply *charger;
95 struct power_supply *battery;
96 struct mutex lock;
97 struct regmap *regmap;
98
99 char model_name[I2C_NAME_SIZE];
100
101 struct bq25980_init_data init_data;
102 const struct bq25980_chip_info *chip_info;
103 struct bq25980_state state;
104 int watchdog_timer;
105};
106
107static const struct reg_default bq25980_reg_defs[] = {
108 {BQ25980_BATOVP, 0x5A},
109 {BQ25980_BATOVP_ALM, 0x46},
110 {BQ25980_BATOCP, 0x51},
111 {BQ25980_BATOCP_ALM, 0x50},
112 {BQ25980_BATUCP_ALM, 0x28},
113 {BQ25980_CHRGR_CTRL_1, 0x0},
114 {BQ25980_BUSOVP, 0x26},
115 {BQ25980_BUSOVP_ALM, 0x22},
116 {BQ25980_BUSOCP, 0xD},
117 {BQ25980_BUSOCP_ALM, 0xC},
118 {BQ25980_TEMP_CONTROL, 0x30},
119 {BQ25980_TDIE_ALM, 0xC8},
120 {BQ25980_TSBUS_FLT, 0x15},
121 {BQ25980_TSBAT_FLG, 0x15},
122 {BQ25980_VAC_CONTROL, 0x0},
123 {BQ25980_CHRGR_CTRL_2, 0x0},
124 {BQ25980_CHRGR_CTRL_3, 0x20},
125 {BQ25980_CHRGR_CTRL_4, 0x1D},
126 {BQ25980_CHRGR_CTRL_5, 0x18},
127 {BQ25980_STAT1, 0x0},
128 {BQ25980_STAT2, 0x0},
129 {BQ25980_STAT3, 0x0},
130 {BQ25980_STAT4, 0x0},
131 {BQ25980_STAT5, 0x0},
132 {BQ25980_FLAG1, 0x0},
133 {BQ25980_FLAG2, 0x0},
134 {BQ25980_FLAG3, 0x0},
135 {BQ25980_FLAG4, 0x0},
136 {BQ25980_FLAG5, 0x0},
137 {BQ25980_MASK1, 0x0},
138 {BQ25980_MASK2, 0x0},
139 {BQ25980_MASK3, 0x0},
140 {BQ25980_MASK4, 0x0},
141 {BQ25980_MASK5, 0x0},
142 {BQ25980_DEVICE_INFO, 0x8},
143 {BQ25980_ADC_CONTROL1, 0x0},
144 {BQ25980_ADC_CONTROL2, 0x0},
145 {BQ25980_IBUS_ADC_LSB, 0x0},
146 {BQ25980_IBUS_ADC_MSB, 0x0},
147 {BQ25980_VBUS_ADC_LSB, 0x0},
148 {BQ25980_VBUS_ADC_MSB, 0x0},
149 {BQ25980_VAC1_ADC_LSB, 0x0},
150 {BQ25980_VAC2_ADC_LSB, 0x0},
151 {BQ25980_VOUT_ADC_LSB, 0x0},
152 {BQ25980_VBAT_ADC_LSB, 0x0},
153 {BQ25980_IBAT_ADC_MSB, 0x0},
154 {BQ25980_IBAT_ADC_LSB, 0x0},
155 {BQ25980_TSBUS_ADC_LSB, 0x0},
156 {BQ25980_TSBAT_ADC_LSB, 0x0},
157 {BQ25980_TDIE_ADC_LSB, 0x0},
158 {BQ25980_DEGLITCH_TIME, 0x0},
159 {BQ25980_CHRGR_CTRL_6, 0x0},
160};
161
162static const struct reg_default bq25975_reg_defs[] = {
163 {BQ25980_BATOVP, 0x5A},
164 {BQ25980_BATOVP_ALM, 0x46},
165 {BQ25980_BATOCP, 0x51},
166 {BQ25980_BATOCP_ALM, 0x50},
167 {BQ25980_BATUCP_ALM, 0x28},
168 {BQ25980_CHRGR_CTRL_1, 0x0},
169 {BQ25980_BUSOVP, 0x26},
170 {BQ25980_BUSOVP_ALM, 0x22},
171 {BQ25980_BUSOCP, 0xD},
172 {BQ25980_BUSOCP_ALM, 0xC},
173 {BQ25980_TEMP_CONTROL, 0x30},
174 {BQ25980_TDIE_ALM, 0xC8},
175 {BQ25980_TSBUS_FLT, 0x15},
176 {BQ25980_TSBAT_FLG, 0x15},
177 {BQ25980_VAC_CONTROL, 0x0},
178 {BQ25980_CHRGR_CTRL_2, 0x0},
179 {BQ25980_CHRGR_CTRL_3, 0x20},
180 {BQ25980_CHRGR_CTRL_4, 0x1D},
181 {BQ25980_CHRGR_CTRL_5, 0x18},
182 {BQ25980_STAT1, 0x0},
183 {BQ25980_STAT2, 0x0},
184 {BQ25980_STAT3, 0x0},
185 {BQ25980_STAT4, 0x0},
186 {BQ25980_STAT5, 0x0},
187 {BQ25980_FLAG1, 0x0},
188 {BQ25980_FLAG2, 0x0},
189 {BQ25980_FLAG3, 0x0},
190 {BQ25980_FLAG4, 0x0},
191 {BQ25980_FLAG5, 0x0},
192 {BQ25980_MASK1, 0x0},
193 {BQ25980_MASK2, 0x0},
194 {BQ25980_MASK3, 0x0},
195 {BQ25980_MASK4, 0x0},
196 {BQ25980_MASK5, 0x0},
197 {BQ25980_DEVICE_INFO, 0x8},
198 {BQ25980_ADC_CONTROL1, 0x0},
199 {BQ25980_ADC_CONTROL2, 0x0},
200 {BQ25980_IBUS_ADC_LSB, 0x0},
201 {BQ25980_IBUS_ADC_MSB, 0x0},
202 {BQ25980_VBUS_ADC_LSB, 0x0},
203 {BQ25980_VBUS_ADC_MSB, 0x0},
204 {BQ25980_VAC1_ADC_LSB, 0x0},
205 {BQ25980_VAC2_ADC_LSB, 0x0},
206 {BQ25980_VOUT_ADC_LSB, 0x0},
207 {BQ25980_VBAT_ADC_LSB, 0x0},
208 {BQ25980_IBAT_ADC_MSB, 0x0},
209 {BQ25980_IBAT_ADC_LSB, 0x0},
210 {BQ25980_TSBUS_ADC_LSB, 0x0},
211 {BQ25980_TSBAT_ADC_LSB, 0x0},
212 {BQ25980_TDIE_ADC_LSB, 0x0},
213 {BQ25980_DEGLITCH_TIME, 0x0},
214 {BQ25980_CHRGR_CTRL_6, 0x0},
215};
216
217static const struct reg_default bq25960_reg_defs[] = {
218 {BQ25980_BATOVP, 0x5A},
219 {BQ25980_BATOVP_ALM, 0x46},
220 {BQ25980_BATOCP, 0x51},
221 {BQ25980_BATOCP_ALM, 0x50},
222 {BQ25980_BATUCP_ALM, 0x28},
223 {BQ25980_CHRGR_CTRL_1, 0x0},
224 {BQ25980_BUSOVP, 0x26},
225 {BQ25980_BUSOVP_ALM, 0x22},
226 {BQ25980_BUSOCP, 0xD},
227 {BQ25980_BUSOCP_ALM, 0xC},
228 {BQ25980_TEMP_CONTROL, 0x30},
229 {BQ25980_TDIE_ALM, 0xC8},
230 {BQ25980_TSBUS_FLT, 0x15},
231 {BQ25980_TSBAT_FLG, 0x15},
232 {BQ25980_VAC_CONTROL, 0x0},
233 {BQ25980_CHRGR_CTRL_2, 0x0},
234 {BQ25980_CHRGR_CTRL_3, 0x20},
235 {BQ25980_CHRGR_CTRL_4, 0x1D},
236 {BQ25980_CHRGR_CTRL_5, 0x18},
237 {BQ25980_STAT1, 0x0},
238 {BQ25980_STAT2, 0x0},
239 {BQ25980_STAT3, 0x0},
240 {BQ25980_STAT4, 0x0},
241 {BQ25980_STAT5, 0x0},
242 {BQ25980_FLAG1, 0x0},
243 {BQ25980_FLAG2, 0x0},
244 {BQ25980_FLAG3, 0x0},
245 {BQ25980_FLAG4, 0x0},
246 {BQ25980_FLAG5, 0x0},
247 {BQ25980_MASK1, 0x0},
248 {BQ25980_MASK2, 0x0},
249 {BQ25980_MASK3, 0x0},
250 {BQ25980_MASK4, 0x0},
251 {BQ25980_MASK5, 0x0},
252 {BQ25980_DEVICE_INFO, 0x8},
253 {BQ25980_ADC_CONTROL1, 0x0},
254 {BQ25980_ADC_CONTROL2, 0x0},
255 {BQ25980_IBUS_ADC_LSB, 0x0},
256 {BQ25980_IBUS_ADC_MSB, 0x0},
257 {BQ25980_VBUS_ADC_LSB, 0x0},
258 {BQ25980_VBUS_ADC_MSB, 0x0},
259 {BQ25980_VAC1_ADC_LSB, 0x0},
260 {BQ25980_VAC2_ADC_LSB, 0x0},
261 {BQ25980_VOUT_ADC_LSB, 0x0},
262 {BQ25980_VBAT_ADC_LSB, 0x0},
263 {BQ25980_IBAT_ADC_MSB, 0x0},
264 {BQ25980_IBAT_ADC_LSB, 0x0},
265 {BQ25980_TSBUS_ADC_LSB, 0x0},
266 {BQ25980_TSBAT_ADC_LSB, 0x0},
267 {BQ25980_TDIE_ADC_LSB, 0x0},
268 {BQ25980_DEGLITCH_TIME, 0x0},
269 {BQ25980_CHRGR_CTRL_6, 0x0},
270};
271
272static int bq25980_watchdog_time[BQ25980_NUM_WD_VAL] = {5000, 10000, 50000,
273 300000};
274
275static int bq25980_get_input_curr_lim(struct bq25980_device *bq)
276{
277 unsigned int busocp_reg_code;
278 int ret;
279
280 ret = regmap_read(map: bq->regmap, BQ25980_BUSOCP, val: &busocp_reg_code);
281 if (ret)
282 return ret;
283
284 return (busocp_reg_code * BQ25980_BUSOCP_STEP_uA) + BQ25980_BUSOCP_OFFSET_uA;
285}
286
287static int bq25980_set_hiz(struct bq25980_device *bq, int setting)
288{
289 return regmap_update_bits(map: bq->regmap, BQ25980_CHRGR_CTRL_2,
290 BQ25980_EN_HIZ, val: setting);
291}
292
293static int bq25980_set_input_curr_lim(struct bq25980_device *bq, int busocp)
294{
295 unsigned int busocp_reg_code;
296 int ret;
297
298 if (!busocp)
299 return bq25980_set_hiz(bq, BQ25980_ENABLE_HIZ);
300
301 bq25980_set_hiz(bq, BQ25980_DISABLE_HIZ);
302
303 if (busocp < BQ25980_BUSOCP_MIN_uA)
304 busocp = BQ25980_BUSOCP_MIN_uA;
305
306 if (bq->state.bypass)
307 busocp = min(busocp, bq->chip_info->busocp_sc_max);
308 else
309 busocp = min(busocp, bq->chip_info->busocp_byp_max);
310
311 busocp_reg_code = (busocp - BQ25980_BUSOCP_OFFSET_uA)
312 / BQ25980_BUSOCP_STEP_uA;
313
314 ret = regmap_write(map: bq->regmap, BQ25980_BUSOCP, val: busocp_reg_code);
315 if (ret)
316 return ret;
317
318 return regmap_write(map: bq->regmap, BQ25980_BUSOCP_ALM, val: busocp_reg_code);
319}
320
321static int bq25980_get_input_volt_lim(struct bq25980_device *bq)
322{
323 unsigned int busovp_reg_code;
324 unsigned int busovp_offset;
325 unsigned int busovp_step;
326 int ret;
327
328 if (bq->state.bypass) {
329 busovp_step = bq->chip_info->busovp_byp_step;
330 busovp_offset = bq->chip_info->busovp_byp_offset;
331 } else {
332 busovp_step = bq->chip_info->busovp_sc_step;
333 busovp_offset = bq->chip_info->busovp_sc_offset;
334 }
335
336 ret = regmap_read(map: bq->regmap, BQ25980_BUSOVP, val: &busovp_reg_code);
337 if (ret)
338 return ret;
339
340 return (busovp_reg_code * busovp_step) + busovp_offset;
341}
342
343static int bq25980_set_input_volt_lim(struct bq25980_device *bq, int busovp)
344{
345 unsigned int busovp_reg_code;
346 unsigned int busovp_step;
347 unsigned int busovp_offset;
348 int ret;
349
350 if (bq->state.bypass) {
351 busovp_step = bq->chip_info->busovp_byp_step;
352 busovp_offset = bq->chip_info->busovp_byp_offset;
353 if (busovp > bq->chip_info->busovp_byp_max)
354 busovp = bq->chip_info->busovp_byp_max;
355 else if (busovp < bq->chip_info->busovp_byp_min)
356 busovp = bq->chip_info->busovp_byp_min;
357 } else {
358 busovp_step = bq->chip_info->busovp_sc_step;
359 busovp_offset = bq->chip_info->busovp_sc_offset;
360 if (busovp > bq->chip_info->busovp_sc_max)
361 busovp = bq->chip_info->busovp_sc_max;
362 else if (busovp < bq->chip_info->busovp_sc_min)
363 busovp = bq->chip_info->busovp_sc_min;
364 }
365
366 busovp_reg_code = (busovp - busovp_offset) / busovp_step;
367
368 ret = regmap_write(map: bq->regmap, BQ25980_BUSOVP, val: busovp_reg_code);
369 if (ret)
370 return ret;
371
372 return regmap_write(map: bq->regmap, BQ25980_BUSOVP_ALM, val: busovp_reg_code);
373}
374
375static int bq25980_get_const_charge_curr(struct bq25980_device *bq)
376{
377 unsigned int batocp_reg_code;
378 int ret;
379
380 ret = regmap_read(map: bq->regmap, BQ25980_BATOCP, val: &batocp_reg_code);
381 if (ret)
382 return ret;
383
384 return (batocp_reg_code & BQ25980_BATOCP_MASK) *
385 BQ25980_BATOCP_STEP_uA;
386}
387
388static int bq25980_set_const_charge_curr(struct bq25980_device *bq, int batocp)
389{
390 unsigned int batocp_reg_code;
391 int ret;
392
393 batocp = max(batocp, BQ25980_BATOCP_MIN_uA);
394 batocp = min(batocp, bq->chip_info->batocp_max);
395
396 batocp_reg_code = batocp / BQ25980_BATOCP_STEP_uA;
397
398 ret = regmap_update_bits(map: bq->regmap, BQ25980_BATOCP,
399 BQ25980_BATOCP_MASK, val: batocp_reg_code);
400 if (ret)
401 return ret;
402
403 return regmap_update_bits(map: bq->regmap, BQ25980_BATOCP_ALM,
404 BQ25980_BATOCP_MASK, val: batocp_reg_code);
405}
406
407static int bq25980_get_const_charge_volt(struct bq25980_device *bq)
408{
409 unsigned int batovp_reg_code;
410 int ret;
411
412 ret = regmap_read(map: bq->regmap, BQ25980_BATOVP, val: &batovp_reg_code);
413 if (ret)
414 return ret;
415
416 return ((batovp_reg_code * bq->chip_info->batovp_step) +
417 bq->chip_info->batovp_offset);
418}
419
420static int bq25980_set_const_charge_volt(struct bq25980_device *bq, int batovp)
421{
422 unsigned int batovp_reg_code;
423 int ret;
424
425 if (batovp < bq->chip_info->batovp_min)
426 batovp = bq->chip_info->batovp_min;
427
428 if (batovp > bq->chip_info->batovp_max)
429 batovp = bq->chip_info->batovp_max;
430
431 batovp_reg_code = (batovp - bq->chip_info->batovp_offset) /
432 bq->chip_info->batovp_step;
433
434 ret = regmap_write(map: bq->regmap, BQ25980_BATOVP, val: batovp_reg_code);
435 if (ret)
436 return ret;
437
438 return regmap_write(map: bq->regmap, BQ25980_BATOVP_ALM, val: batovp_reg_code);
439}
440
441static int bq25980_set_bypass(struct bq25980_device *bq, bool en_bypass)
442{
443 int ret;
444
445 if (en_bypass)
446 ret = regmap_update_bits(map: bq->regmap, BQ25980_CHRGR_CTRL_2,
447 BQ25980_EN_BYPASS, BQ25980_EN_BYPASS);
448 else
449 ret = regmap_update_bits(map: bq->regmap, BQ25980_CHRGR_CTRL_2,
450 BQ25980_EN_BYPASS, val: en_bypass);
451 if (ret)
452 return ret;
453
454 bq->state.bypass = en_bypass;
455
456 return bq->state.bypass;
457}
458
459static int bq25980_set_chg_en(struct bq25980_device *bq, bool en_chg)
460{
461 int ret;
462
463 if (en_chg)
464 ret = regmap_update_bits(map: bq->regmap, BQ25980_CHRGR_CTRL_2,
465 BQ25980_CHG_EN, BQ25980_CHG_EN);
466 else
467 ret = regmap_update_bits(map: bq->regmap, BQ25980_CHRGR_CTRL_2,
468 BQ25980_CHG_EN, val: en_chg);
469 if (ret)
470 return ret;
471
472 bq->state.ce = en_chg;
473
474 return 0;
475}
476
477static int bq25980_get_adc_ibus(struct bq25980_device *bq)
478{
479 int ibus_adc_lsb, ibus_adc_msb;
480 u16 ibus_adc;
481 int ret;
482
483 ret = regmap_read(map: bq->regmap, BQ25980_IBUS_ADC_MSB, val: &ibus_adc_msb);
484 if (ret)
485 return ret;
486
487 ret = regmap_read(map: bq->regmap, BQ25980_IBUS_ADC_LSB, val: &ibus_adc_lsb);
488 if (ret)
489 return ret;
490
491 ibus_adc = (ibus_adc_msb << 8) | ibus_adc_lsb;
492
493 if (ibus_adc_msb & BQ25980_ADC_POLARITY_BIT)
494 return ((ibus_adc ^ 0xffff) + 1) * BQ25980_ADC_CURR_STEP_uA;
495
496 return ibus_adc * BQ25980_ADC_CURR_STEP_uA;
497}
498
499static int bq25980_get_adc_vbus(struct bq25980_device *bq)
500{
501 int vbus_adc_lsb, vbus_adc_msb;
502 u16 vbus_adc;
503 int ret;
504
505 ret = regmap_read(map: bq->regmap, BQ25980_VBUS_ADC_MSB, val: &vbus_adc_msb);
506 if (ret)
507 return ret;
508
509 ret = regmap_read(map: bq->regmap, BQ25980_VBUS_ADC_LSB, val: &vbus_adc_lsb);
510 if (ret)
511 return ret;
512
513 vbus_adc = (vbus_adc_msb << 8) | vbus_adc_lsb;
514
515 return vbus_adc * BQ25980_ADC_VOLT_STEP_uV;
516}
517
518static int bq25980_get_ibat_adc(struct bq25980_device *bq)
519{
520 int ret;
521 int ibat_adc_lsb, ibat_adc_msb;
522 int ibat_adc;
523
524 ret = regmap_read(map: bq->regmap, BQ25980_IBAT_ADC_MSB, val: &ibat_adc_msb);
525 if (ret)
526 return ret;
527
528 ret = regmap_read(map: bq->regmap, BQ25980_IBAT_ADC_LSB, val: &ibat_adc_lsb);
529 if (ret)
530 return ret;
531
532 ibat_adc = (ibat_adc_msb << 8) | ibat_adc_lsb;
533
534 if (ibat_adc_msb & BQ25980_ADC_POLARITY_BIT)
535 return ((ibat_adc ^ 0xffff) + 1) * BQ25980_ADC_CURR_STEP_uA;
536
537 return ibat_adc * BQ25980_ADC_CURR_STEP_uA;
538}
539
540static int bq25980_get_adc_vbat(struct bq25980_device *bq)
541{
542 int vsys_adc_lsb, vsys_adc_msb;
543 u16 vsys_adc;
544 int ret;
545
546 ret = regmap_read(map: bq->regmap, BQ25980_VBAT_ADC_MSB, val: &vsys_adc_msb);
547 if (ret)
548 return ret;
549
550 ret = regmap_read(map: bq->regmap, BQ25980_VBAT_ADC_LSB, val: &vsys_adc_lsb);
551 if (ret)
552 return ret;
553
554 vsys_adc = (vsys_adc_msb << 8) | vsys_adc_lsb;
555
556 return vsys_adc * BQ25980_ADC_VOLT_STEP_uV;
557}
558
559static int bq25980_get_state(struct bq25980_device *bq,
560 struct bq25980_state *state)
561{
562 unsigned int chg_ctrl_2;
563 unsigned int stat1;
564 unsigned int stat2;
565 unsigned int stat3;
566 unsigned int stat4;
567 unsigned int ibat_adc_msb;
568 int ret;
569
570 ret = regmap_read(map: bq->regmap, BQ25980_STAT1, val: &stat1);
571 if (ret)
572 return ret;
573
574 ret = regmap_read(map: bq->regmap, BQ25980_STAT2, val: &stat2);
575 if (ret)
576 return ret;
577
578 ret = regmap_read(map: bq->regmap, BQ25980_STAT3, val: &stat3);
579 if (ret)
580 return ret;
581
582 ret = regmap_read(map: bq->regmap, BQ25980_STAT4, val: &stat4);
583 if (ret)
584 return ret;
585
586 ret = regmap_read(map: bq->regmap, BQ25980_CHRGR_CTRL_2, val: &chg_ctrl_2);
587 if (ret)
588 return ret;
589
590 ret = regmap_read(map: bq->regmap, BQ25980_IBAT_ADC_MSB, val: &ibat_adc_msb);
591 if (ret)
592 return ret;
593
594 state->dischg = ibat_adc_msb & BQ25980_ADC_POLARITY_BIT;
595 state->ovp = (stat1 & BQ25980_STAT1_OVP_MASK) |
596 (stat3 & BQ25980_STAT3_OVP_MASK);
597 state->ocp = (stat1 & BQ25980_STAT1_OCP_MASK) |
598 (stat2 & BQ25980_STAT2_OCP_MASK);
599 state->tflt = stat4 & BQ25980_STAT4_TFLT_MASK;
600 state->wdt = stat4 & BQ25980_WD_STAT;
601 state->online = stat3 & BQ25980_PRESENT_MASK;
602 state->ce = chg_ctrl_2 & BQ25980_CHG_EN;
603 state->hiz = chg_ctrl_2 & BQ25980_EN_HIZ;
604 state->bypass = chg_ctrl_2 & BQ25980_EN_BYPASS;
605
606 return 0;
607}
608
609static int bq25980_get_battery_property(struct power_supply *psy,
610 enum power_supply_property psp,
611 union power_supply_propval *val)
612{
613 struct bq25980_device *bq = power_supply_get_drvdata(psy);
614 int ret = 0;
615
616 switch (psp) {
617 case POWER_SUPPLY_PROP_CONSTANT_CHARGE_CURRENT_MAX:
618 val->intval = bq->init_data.ichg_max;
619 break;
620
621 case POWER_SUPPLY_PROP_CONSTANT_CHARGE_VOLTAGE_MAX:
622 val->intval = bq->init_data.vreg_max;
623 break;
624
625 case POWER_SUPPLY_PROP_CURRENT_NOW:
626 ret = bq25980_get_ibat_adc(bq);
627 val->intval = ret;
628 break;
629
630 case POWER_SUPPLY_PROP_VOLTAGE_NOW:
631 ret = bq25980_get_adc_vbat(bq);
632 if (ret < 0)
633 return ret;
634
635 val->intval = ret;
636 break;
637
638 default:
639 return -EINVAL;
640 }
641
642 return ret;
643}
644
645static int bq25980_set_charger_property(struct power_supply *psy,
646 enum power_supply_property prop,
647 const union power_supply_propval *val)
648{
649 struct bq25980_device *bq = power_supply_get_drvdata(psy);
650 int ret = -EINVAL;
651
652 switch (prop) {
653 case POWER_SUPPLY_PROP_INPUT_CURRENT_LIMIT:
654 ret = bq25980_set_input_curr_lim(bq, busocp: val->intval);
655 if (ret)
656 return ret;
657 break;
658
659 case POWER_SUPPLY_PROP_INPUT_VOLTAGE_LIMIT:
660 ret = bq25980_set_input_volt_lim(bq, busovp: val->intval);
661 if (ret)
662 return ret;
663 break;
664
665 case POWER_SUPPLY_PROP_CHARGE_TYPE:
666 ret = bq25980_set_bypass(bq, en_bypass: val->intval);
667 if (ret)
668 return ret;
669 break;
670
671 case POWER_SUPPLY_PROP_STATUS:
672 ret = bq25980_set_chg_en(bq, en_chg: val->intval);
673 if (ret)
674 return ret;
675 break;
676
677 case POWER_SUPPLY_PROP_CONSTANT_CHARGE_CURRENT:
678 ret = bq25980_set_const_charge_curr(bq, batocp: val->intval);
679 if (ret)
680 return ret;
681 break;
682
683 case POWER_SUPPLY_PROP_CONSTANT_CHARGE_VOLTAGE:
684 ret = bq25980_set_const_charge_volt(bq, batovp: val->intval);
685 if (ret)
686 return ret;
687 break;
688
689 default:
690 return -EINVAL;
691 }
692
693 return ret;
694}
695
696static int bq25980_get_charger_property(struct power_supply *psy,
697 enum power_supply_property psp,
698 union power_supply_propval *val)
699{
700 struct bq25980_device *bq = power_supply_get_drvdata(psy);
701 struct bq25980_state state;
702 int ret = 0;
703
704 mutex_lock(&bq->lock);
705 ret = bq25980_get_state(bq, state: &state);
706 mutex_unlock(lock: &bq->lock);
707 if (ret)
708 return ret;
709
710 switch (psp) {
711 case POWER_SUPPLY_PROP_MANUFACTURER:
712 val->strval = BQ25980_MANUFACTURER;
713 break;
714 case POWER_SUPPLY_PROP_MODEL_NAME:
715 val->strval = bq->model_name;
716 break;
717 case POWER_SUPPLY_PROP_ONLINE:
718 val->intval = state.online;
719 break;
720
721 case POWER_SUPPLY_PROP_INPUT_VOLTAGE_LIMIT:
722 ret = bq25980_get_input_volt_lim(bq);
723 if (ret < 0)
724 return ret;
725 val->intval = ret;
726 break;
727
728 case POWER_SUPPLY_PROP_INPUT_CURRENT_LIMIT:
729 ret = bq25980_get_input_curr_lim(bq);
730 if (ret < 0)
731 return ret;
732
733 val->intval = ret;
734 break;
735
736 case POWER_SUPPLY_PROP_HEALTH:
737 val->intval = POWER_SUPPLY_HEALTH_GOOD;
738
739 if (state.tflt)
740 val->intval = POWER_SUPPLY_HEALTH_OVERHEAT;
741 else if (state.ovp)
742 val->intval = POWER_SUPPLY_HEALTH_OVERVOLTAGE;
743 else if (state.ocp)
744 val->intval = POWER_SUPPLY_HEALTH_OVERCURRENT;
745 else if (state.wdt)
746 val->intval =
747 POWER_SUPPLY_HEALTH_WATCHDOG_TIMER_EXPIRE;
748 break;
749
750 case POWER_SUPPLY_PROP_STATUS:
751 val->intval = POWER_SUPPLY_STATUS_UNKNOWN;
752
753 if ((state.ce) && (!state.hiz))
754 val->intval = POWER_SUPPLY_STATUS_CHARGING;
755 else if (state.dischg)
756 val->intval = POWER_SUPPLY_STATUS_DISCHARGING;
757 else if (!state.ce)
758 val->intval = POWER_SUPPLY_STATUS_NOT_CHARGING;
759 break;
760
761 case POWER_SUPPLY_PROP_CHARGE_TYPE:
762 val->intval = POWER_SUPPLY_CHARGE_TYPE_UNKNOWN;
763
764 if (!state.ce)
765 val->intval = POWER_SUPPLY_CHARGE_TYPE_NONE;
766 else if (state.bypass)
767 val->intval = POWER_SUPPLY_CHARGE_TYPE_BYPASS;
768 else if (!state.bypass)
769 val->intval = POWER_SUPPLY_CHARGE_TYPE_STANDARD;
770 break;
771
772 case POWER_SUPPLY_PROP_CURRENT_NOW:
773 ret = bq25980_get_adc_ibus(bq);
774 if (ret < 0)
775 return ret;
776
777 val->intval = ret;
778 break;
779
780 case POWER_SUPPLY_PROP_VOLTAGE_NOW:
781 ret = bq25980_get_adc_vbus(bq);
782 if (ret < 0)
783 return ret;
784
785 val->intval = ret;
786 break;
787
788 case POWER_SUPPLY_PROP_CONSTANT_CHARGE_CURRENT:
789 ret = bq25980_get_const_charge_curr(bq);
790 if (ret < 0)
791 return ret;
792
793 val->intval = ret;
794 break;
795
796 case POWER_SUPPLY_PROP_CONSTANT_CHARGE_VOLTAGE:
797 ret = bq25980_get_const_charge_volt(bq);
798 if (ret < 0)
799 return ret;
800
801 val->intval = ret;
802 break;
803
804 default:
805 return -EINVAL;
806 }
807
808 return ret;
809}
810
811static bool bq25980_state_changed(struct bq25980_device *bq,
812 struct bq25980_state *new_state)
813{
814 struct bq25980_state old_state;
815
816 mutex_lock(&bq->lock);
817 old_state = bq->state;
818 mutex_unlock(lock: &bq->lock);
819
820 return (old_state.dischg != new_state->dischg ||
821 old_state.ovp != new_state->ovp ||
822 old_state.ocp != new_state->ocp ||
823 old_state.online != new_state->online ||
824 old_state.wdt != new_state->wdt ||
825 old_state.tflt != new_state->tflt ||
826 old_state.ce != new_state->ce ||
827 old_state.hiz != new_state->hiz ||
828 old_state.bypass != new_state->bypass);
829}
830
831static irqreturn_t bq25980_irq_handler_thread(int irq, void *private)
832{
833 struct bq25980_device *bq = private;
834 struct bq25980_state state;
835 int ret;
836
837 ret = bq25980_get_state(bq, state: &state);
838 if (ret < 0)
839 goto irq_out;
840
841 if (!bq25980_state_changed(bq, new_state: &state))
842 goto irq_out;
843
844 mutex_lock(&bq->lock);
845 bq->state = state;
846 mutex_unlock(lock: &bq->lock);
847
848 power_supply_changed(psy: bq->charger);
849
850irq_out:
851 return IRQ_HANDLED;
852}
853
854static enum power_supply_property bq25980_power_supply_props[] = {
855 POWER_SUPPLY_PROP_MANUFACTURER,
856 POWER_SUPPLY_PROP_MODEL_NAME,
857 POWER_SUPPLY_PROP_STATUS,
858 POWER_SUPPLY_PROP_ONLINE,
859 POWER_SUPPLY_PROP_HEALTH,
860 POWER_SUPPLY_PROP_INPUT_VOLTAGE_LIMIT,
861 POWER_SUPPLY_PROP_INPUT_CURRENT_LIMIT,
862 POWER_SUPPLY_PROP_CHARGE_TYPE,
863 POWER_SUPPLY_PROP_CONSTANT_CHARGE_CURRENT,
864 POWER_SUPPLY_PROP_CONSTANT_CHARGE_VOLTAGE,
865 POWER_SUPPLY_PROP_CURRENT_NOW,
866 POWER_SUPPLY_PROP_VOLTAGE_NOW,
867};
868
869static enum power_supply_property bq25980_battery_props[] = {
870 POWER_SUPPLY_PROP_CONSTANT_CHARGE_CURRENT_MAX,
871 POWER_SUPPLY_PROP_CONSTANT_CHARGE_VOLTAGE_MAX,
872 POWER_SUPPLY_PROP_CURRENT_NOW,
873 POWER_SUPPLY_PROP_VOLTAGE_NOW,
874};
875
876static char *bq25980_charger_supplied_to[] = {
877 "main-battery",
878};
879
880static int bq25980_property_is_writeable(struct power_supply *psy,
881 enum power_supply_property prop)
882{
883 switch (prop) {
884 case POWER_SUPPLY_PROP_INPUT_CURRENT_LIMIT:
885 case POWER_SUPPLY_PROP_CONSTANT_CHARGE_VOLTAGE:
886 case POWER_SUPPLY_PROP_CONSTANT_CHARGE_CURRENT:
887 case POWER_SUPPLY_PROP_CHARGE_TYPE:
888 case POWER_SUPPLY_PROP_STATUS:
889 case POWER_SUPPLY_PROP_INPUT_VOLTAGE_LIMIT:
890 return true;
891 default:
892 return false;
893 }
894}
895
896static const struct power_supply_desc bq25980_power_supply_desc = {
897 .name = "bq25980-charger",
898 .type = POWER_SUPPLY_TYPE_MAINS,
899 .properties = bq25980_power_supply_props,
900 .num_properties = ARRAY_SIZE(bq25980_power_supply_props),
901 .get_property = bq25980_get_charger_property,
902 .set_property = bq25980_set_charger_property,
903 .property_is_writeable = bq25980_property_is_writeable,
904};
905
906static struct power_supply_desc bq25980_battery_desc = {
907 .name = "bq25980-battery",
908 .type = POWER_SUPPLY_TYPE_BATTERY,
909 .get_property = bq25980_get_battery_property,
910 .properties = bq25980_battery_props,
911 .num_properties = ARRAY_SIZE(bq25980_battery_props),
912 .property_is_writeable = bq25980_property_is_writeable,
913};
914
915
916static bool bq25980_is_volatile_reg(struct device *dev, unsigned int reg)
917{
918 switch (reg) {
919 case BQ25980_CHRGR_CTRL_2:
920 case BQ25980_STAT1...BQ25980_FLAG5:
921 case BQ25980_ADC_CONTROL1...BQ25980_TDIE_ADC_LSB:
922 return true;
923 default:
924 return false;
925 }
926}
927
928static const struct regmap_config bq25980_regmap_config = {
929 .reg_bits = 8,
930 .val_bits = 8,
931
932 .max_register = BQ25980_CHRGR_CTRL_6,
933 .reg_defaults = bq25980_reg_defs,
934 .num_reg_defaults = ARRAY_SIZE(bq25980_reg_defs),
935 .cache_type = REGCACHE_MAPLE,
936 .volatile_reg = bq25980_is_volatile_reg,
937};
938
939static const struct regmap_config bq25975_regmap_config = {
940 .reg_bits = 8,
941 .val_bits = 8,
942
943 .max_register = BQ25980_CHRGR_CTRL_6,
944 .reg_defaults = bq25975_reg_defs,
945 .num_reg_defaults = ARRAY_SIZE(bq25975_reg_defs),
946 .cache_type = REGCACHE_MAPLE,
947 .volatile_reg = bq25980_is_volatile_reg,
948};
949
950static const struct regmap_config bq25960_regmap_config = {
951 .reg_bits = 8,
952 .val_bits = 8,
953
954 .max_register = BQ25980_CHRGR_CTRL_6,
955 .reg_defaults = bq25960_reg_defs,
956 .num_reg_defaults = ARRAY_SIZE(bq25960_reg_defs),
957 .cache_type = REGCACHE_MAPLE,
958 .volatile_reg = bq25980_is_volatile_reg,
959};
960
961static const struct bq25980_chip_info bq25980_chip_info_tbl[] = {
962 [BQ25980] = {
963 .model_id = BQ25980,
964 .regmap_config = &bq25980_regmap_config,
965
966 .busocp_def = BQ25980_BUSOCP_DFLT_uA,
967 .busocp_sc_min = BQ25960_BUSOCP_SC_MAX_uA,
968 .busocp_sc_max = BQ25980_BUSOCP_SC_MAX_uA,
969 .busocp_byp_max = BQ25980_BUSOCP_BYP_MAX_uA,
970 .busocp_byp_min = BQ25980_BUSOCP_MIN_uA,
971
972 .busovp_sc_def = BQ25980_BUSOVP_DFLT_uV,
973 .busovp_byp_def = BQ25980_BUSOVP_BYPASS_DFLT_uV,
974 .busovp_sc_step = BQ25980_BUSOVP_SC_STEP_uV,
975 .busovp_sc_offset = BQ25980_BUSOVP_SC_OFFSET_uV,
976 .busovp_byp_step = BQ25980_BUSOVP_BYP_STEP_uV,
977 .busovp_byp_offset = BQ25980_BUSOVP_BYP_OFFSET_uV,
978 .busovp_sc_min = BQ25980_BUSOVP_SC_MIN_uV,
979 .busovp_sc_max = BQ25980_BUSOVP_SC_MAX_uV,
980 .busovp_byp_min = BQ25980_BUSOVP_BYP_MIN_uV,
981 .busovp_byp_max = BQ25980_BUSOVP_BYP_MAX_uV,
982
983 .batovp_def = BQ25980_BATOVP_DFLT_uV,
984 .batovp_max = BQ25980_BATOVP_MAX_uV,
985 .batovp_min = BQ25980_BATOVP_MIN_uV,
986 .batovp_step = BQ25980_BATOVP_STEP_uV,
987 .batovp_offset = BQ25980_BATOVP_OFFSET_uV,
988
989 .batocp_def = BQ25980_BATOCP_DFLT_uA,
990 .batocp_max = BQ25980_BATOCP_MAX_uA,
991 },
992
993 [BQ25975] = {
994 .model_id = BQ25975,
995 .regmap_config = &bq25975_regmap_config,
996
997 .busocp_def = BQ25975_BUSOCP_DFLT_uA,
998 .busocp_sc_min = BQ25975_BUSOCP_SC_MAX_uA,
999 .busocp_sc_max = BQ25975_BUSOCP_SC_MAX_uA,
1000 .busocp_byp_min = BQ25980_BUSOCP_MIN_uA,
1001 .busocp_byp_max = BQ25975_BUSOCP_BYP_MAX_uA,
1002
1003 .busovp_sc_def = BQ25975_BUSOVP_DFLT_uV,
1004 .busovp_byp_def = BQ25975_BUSOVP_BYPASS_DFLT_uV,
1005 .busovp_sc_step = BQ25975_BUSOVP_SC_STEP_uV,
1006 .busovp_sc_offset = BQ25975_BUSOVP_SC_OFFSET_uV,
1007 .busovp_byp_step = BQ25975_BUSOVP_BYP_STEP_uV,
1008 .busovp_byp_offset = BQ25975_BUSOVP_BYP_OFFSET_uV,
1009 .busovp_sc_min = BQ25975_BUSOVP_SC_MIN_uV,
1010 .busovp_sc_max = BQ25975_BUSOVP_SC_MAX_uV,
1011 .busovp_byp_min = BQ25975_BUSOVP_BYP_MIN_uV,
1012 .busovp_byp_max = BQ25975_BUSOVP_BYP_MAX_uV,
1013
1014 .batovp_def = BQ25975_BATOVP_DFLT_uV,
1015 .batovp_max = BQ25975_BATOVP_MAX_uV,
1016 .batovp_min = BQ25975_BATOVP_MIN_uV,
1017 .batovp_step = BQ25975_BATOVP_STEP_uV,
1018 .batovp_offset = BQ25975_BATOVP_OFFSET_uV,
1019
1020 .batocp_def = BQ25980_BATOCP_DFLT_uA,
1021 .batocp_max = BQ25980_BATOCP_MAX_uA,
1022 },
1023
1024 [BQ25960] = {
1025 .model_id = BQ25960,
1026 .regmap_config = &bq25960_regmap_config,
1027
1028 .busocp_def = BQ25960_BUSOCP_DFLT_uA,
1029 .busocp_sc_min = BQ25960_BUSOCP_SC_MAX_uA,
1030 .busocp_sc_max = BQ25960_BUSOCP_SC_MAX_uA,
1031 .busocp_byp_min = BQ25960_BUSOCP_SC_MAX_uA,
1032 .busocp_byp_max = BQ25960_BUSOCP_BYP_MAX_uA,
1033
1034 .busovp_sc_def = BQ25975_BUSOVP_DFLT_uV,
1035 .busovp_byp_def = BQ25975_BUSOVP_BYPASS_DFLT_uV,
1036 .busovp_sc_step = BQ25960_BUSOVP_SC_STEP_uV,
1037 .busovp_sc_offset = BQ25960_BUSOVP_SC_OFFSET_uV,
1038 .busovp_byp_step = BQ25960_BUSOVP_BYP_STEP_uV,
1039 .busovp_byp_offset = BQ25960_BUSOVP_BYP_OFFSET_uV,
1040 .busovp_sc_min = BQ25960_BUSOVP_SC_MIN_uV,
1041 .busovp_sc_max = BQ25960_BUSOVP_SC_MAX_uV,
1042 .busovp_byp_min = BQ25960_BUSOVP_BYP_MIN_uV,
1043 .busovp_byp_max = BQ25960_BUSOVP_BYP_MAX_uV,
1044
1045 .batovp_def = BQ25960_BATOVP_DFLT_uV,
1046 .batovp_max = BQ25960_BATOVP_MAX_uV,
1047 .batovp_min = BQ25960_BATOVP_MIN_uV,
1048 .batovp_step = BQ25960_BATOVP_STEP_uV,
1049 .batovp_offset = BQ25960_BATOVP_OFFSET_uV,
1050
1051 .batocp_def = BQ25960_BATOCP_DFLT_uA,
1052 .batocp_max = BQ25960_BATOCP_MAX_uA,
1053 },
1054};
1055
1056static int bq25980_power_supply_init(struct bq25980_device *bq,
1057 struct device *dev)
1058{
1059 struct power_supply_config psy_cfg = { .drv_data = bq,
1060 .fwnode = dev_fwnode(dev), };
1061
1062 psy_cfg.supplied_to = bq25980_charger_supplied_to;
1063 psy_cfg.num_supplicants = ARRAY_SIZE(bq25980_charger_supplied_to);
1064
1065 bq->charger = devm_power_supply_register(parent: bq->dev,
1066 desc: &bq25980_power_supply_desc,
1067 cfg: &psy_cfg);
1068 if (IS_ERR(ptr: bq->charger))
1069 return -EINVAL;
1070
1071 bq->battery = devm_power_supply_register(parent: bq->dev,
1072 desc: &bq25980_battery_desc,
1073 cfg: &psy_cfg);
1074 if (IS_ERR(ptr: bq->battery))
1075 return -EINVAL;
1076
1077 return 0;
1078}
1079
1080static int bq25980_hw_init(struct bq25980_device *bq)
1081{
1082 struct power_supply_battery_info *bat_info;
1083 int wd_reg_val = BQ25980_WATCHDOG_DIS;
1084 int wd_max_val = BQ25980_NUM_WD_VAL - 1;
1085 int ret = 0;
1086 int curr_val;
1087 int volt_val;
1088 int i;
1089
1090 if (bq->watchdog_timer) {
1091 if (bq->watchdog_timer >= bq25980_watchdog_time[wd_max_val])
1092 wd_reg_val = wd_max_val;
1093 else {
1094 for (i = 0; i < wd_max_val; i++) {
1095 if (bq->watchdog_timer > bq25980_watchdog_time[i] &&
1096 bq->watchdog_timer < bq25980_watchdog_time[i + 1]) {
1097 wd_reg_val = i;
1098 break;
1099 }
1100 }
1101 }
1102 }
1103
1104 ret = regmap_update_bits(map: bq->regmap, BQ25980_CHRGR_CTRL_3,
1105 BQ25980_WATCHDOG_MASK, val: wd_reg_val);
1106 if (ret)
1107 return ret;
1108
1109 ret = power_supply_get_battery_info(psy: bq->charger, info_out: &bat_info);
1110 if (ret) {
1111 dev_warn(bq->dev, "battery info missing\n");
1112 return -EINVAL;
1113 }
1114
1115 bq->init_data.ichg_max = bat_info->constant_charge_current_max_ua;
1116 bq->init_data.vreg_max = bat_info->constant_charge_voltage_max_uv;
1117
1118 if (bq->state.bypass) {
1119 ret = regmap_update_bits(map: bq->regmap, BQ25980_CHRGR_CTRL_2,
1120 BQ25980_EN_BYPASS, BQ25980_EN_BYPASS);
1121 if (ret)
1122 return ret;
1123
1124 curr_val = bq->init_data.bypass_ilim;
1125 volt_val = bq->init_data.bypass_vlim;
1126 } else {
1127 curr_val = bq->init_data.sc_ilim;
1128 volt_val = bq->init_data.sc_vlim;
1129 }
1130
1131 ret = bq25980_set_input_curr_lim(bq, busocp: curr_val);
1132 if (ret)
1133 return ret;
1134
1135 ret = bq25980_set_input_volt_lim(bq, busovp: volt_val);
1136 if (ret)
1137 return ret;
1138
1139 return regmap_update_bits(map: bq->regmap, BQ25980_ADC_CONTROL1,
1140 BQ25980_ADC_EN, BQ25980_ADC_EN);
1141}
1142
1143static int bq25980_parse_dt(struct bq25980_device *bq)
1144{
1145 int ret;
1146
1147 ret = device_property_read_u32(dev: bq->dev, propname: "ti,watchdog-timeout-ms",
1148 val: &bq->watchdog_timer);
1149 if (ret)
1150 bq->watchdog_timer = BQ25980_WATCHDOG_MIN;
1151
1152 if (bq->watchdog_timer > BQ25980_WATCHDOG_MAX ||
1153 bq->watchdog_timer < BQ25980_WATCHDOG_MIN)
1154 return -EINVAL;
1155
1156 ret = device_property_read_u32(dev: bq->dev,
1157 propname: "ti,sc-ovp-limit-microvolt",
1158 val: &bq->init_data.sc_vlim);
1159 if (ret)
1160 bq->init_data.sc_vlim = bq->chip_info->busovp_sc_def;
1161
1162 if (bq->init_data.sc_vlim > bq->chip_info->busovp_sc_max ||
1163 bq->init_data.sc_vlim < bq->chip_info->busovp_sc_min) {
1164 dev_err(bq->dev, "SC ovp limit is out of range\n");
1165 return -EINVAL;
1166 }
1167
1168 ret = device_property_read_u32(dev: bq->dev,
1169 propname: "ti,sc-ocp-limit-microamp",
1170 val: &bq->init_data.sc_ilim);
1171 if (ret)
1172 bq->init_data.sc_ilim = bq->chip_info->busocp_def;
1173
1174 if (bq->init_data.sc_ilim > bq->chip_info->busocp_sc_max ||
1175 bq->init_data.sc_ilim < bq->chip_info->busocp_sc_min) {
1176 dev_err(bq->dev, "SC ocp limit is out of range\n");
1177 return -EINVAL;
1178 }
1179
1180 ret = device_property_read_u32(dev: bq->dev,
1181 propname: "ti,bypass-ovp-limit-microvolt",
1182 val: &bq->init_data.bypass_vlim);
1183 if (ret)
1184 bq->init_data.bypass_vlim = bq->chip_info->busovp_byp_def;
1185
1186 if (bq->init_data.bypass_vlim > bq->chip_info->busovp_byp_max ||
1187 bq->init_data.bypass_vlim < bq->chip_info->busovp_byp_min) {
1188 dev_err(bq->dev, "Bypass ovp limit is out of range\n");
1189 return -EINVAL;
1190 }
1191
1192 ret = device_property_read_u32(dev: bq->dev,
1193 propname: "ti,bypass-ocp-limit-microamp",
1194 val: &bq->init_data.bypass_ilim);
1195 if (ret)
1196 bq->init_data.bypass_ilim = bq->chip_info->busocp_def;
1197
1198 if (bq->init_data.bypass_ilim > bq->chip_info->busocp_byp_max ||
1199 bq->init_data.bypass_ilim < bq->chip_info->busocp_byp_min) {
1200 dev_err(bq->dev, "Bypass ocp limit is out of range\n");
1201 return -EINVAL;
1202 }
1203
1204
1205 bq->state.bypass = device_property_read_bool(dev: bq->dev,
1206 propname: "ti,bypass-enable");
1207 return 0;
1208}
1209
1210static int bq25980_probe(struct i2c_client *client)
1211{
1212 const struct i2c_device_id *id = i2c_client_get_device_id(client);
1213 struct device *dev = &client->dev;
1214 struct bq25980_device *bq;
1215 int ret;
1216
1217 bq = devm_kzalloc(dev, size: sizeof(*bq), GFP_KERNEL);
1218 if (!bq)
1219 return -ENOMEM;
1220
1221 bq->client = client;
1222 bq->dev = dev;
1223
1224 mutex_init(&bq->lock);
1225
1226 strscpy(bq->model_name, id->name, sizeof(bq->model_name));
1227 bq->chip_info = &bq25980_chip_info_tbl[id->driver_data];
1228
1229 bq->regmap = devm_regmap_init_i2c(client,
1230 bq->chip_info->regmap_config);
1231 if (IS_ERR(ptr: bq->regmap)) {
1232 dev_err(dev, "Failed to allocate register map\n");
1233 return PTR_ERR(ptr: bq->regmap);
1234 }
1235
1236 i2c_set_clientdata(client, data: bq);
1237
1238 ret = bq25980_parse_dt(bq);
1239 if (ret) {
1240 dev_err(dev, "Failed to read device tree properties%d\n", ret);
1241 return ret;
1242 }
1243
1244 if (client->irq) {
1245 ret = devm_request_threaded_irq(dev, irq: client->irq, NULL,
1246 thread_fn: bq25980_irq_handler_thread,
1247 IRQF_TRIGGER_FALLING |
1248 IRQF_ONESHOT,
1249 devname: dev_name(dev: &client->dev), dev_id: bq);
1250 if (ret)
1251 return ret;
1252 }
1253
1254 ret = bq25980_power_supply_init(bq, dev);
1255 if (ret) {
1256 dev_err(dev, "Failed to register power supply\n");
1257 return ret;
1258 }
1259
1260 ret = bq25980_hw_init(bq);
1261 if (ret) {
1262 dev_err(dev, "Cannot initialize the chip.\n");
1263 return ret;
1264 }
1265
1266 return 0;
1267}
1268
1269static const struct i2c_device_id bq25980_i2c_ids[] = {
1270 { "bq25980", BQ25980 },
1271 { "bq25975", BQ25975 },
1272 { "bq25960", BQ25960 },
1273 {},
1274};
1275MODULE_DEVICE_TABLE(i2c, bq25980_i2c_ids);
1276
1277static const struct of_device_id bq25980_of_match[] = {
1278 { .compatible = "ti,bq25980", .data = (void *)BQ25980 },
1279 { .compatible = "ti,bq25975", .data = (void *)BQ25975 },
1280 { .compatible = "ti,bq25960", .data = (void *)BQ25960 },
1281 { },
1282};
1283MODULE_DEVICE_TABLE(of, bq25980_of_match);
1284
1285static struct i2c_driver bq25980_driver = {
1286 .driver = {
1287 .name = "bq25980-charger",
1288 .of_match_table = bq25980_of_match,
1289 },
1290 .probe = bq25980_probe,
1291 .id_table = bq25980_i2c_ids,
1292};
1293module_i2c_driver(bq25980_driver);
1294
1295MODULE_AUTHOR("Dan Murphy <dmurphy@ti.com>");
1296MODULE_AUTHOR("Ricardo Rivera-Matos <r-rivera-matos@ti.com>");
1297MODULE_DESCRIPTION("bq25980 charger driver");
1298MODULE_LICENSE("GPL v2");
1299

source code of linux/drivers/power/supply/bq25980_charger.c