| 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
| 2 | /* |
| 3 | * Copyright (C) 2021 Western Digital Corporation or its affiliates. |
| 4 | * Copyright (C) 2022 Ventana Micro Systems Inc. |
| 5 | */ |
| 6 | |
| 7 | #ifndef _IRQ_RISCV_APLIC_MAIN_H |
| 8 | #define _IRQ_RISCV_APLIC_MAIN_H |
| 9 | |
| 10 | #include <linux/device.h> |
| 11 | #include <linux/io.h> |
| 12 | #include <linux/irq.h> |
| 13 | #include <linux/irqdomain.h> |
| 14 | #include <linux/fwnode.h> |
| 15 | |
| 16 | #define APLIC_DEFAULT_PRIORITY 1 |
| 17 | |
| 18 | struct aplic_msicfg { |
| 19 | phys_addr_t base_ppn; |
| 20 | u32 hhxs; |
| 21 | u32 hhxw; |
| 22 | u32 lhxs; |
| 23 | u32 lhxw; |
| 24 | }; |
| 25 | |
| 26 | struct aplic_priv { |
| 27 | struct device *dev; |
| 28 | u32 gsi_base; |
| 29 | u32 nr_irqs; |
| 30 | u32 nr_idcs; |
| 31 | u32 acpi_aplic_id; |
| 32 | void __iomem *regs; |
| 33 | struct aplic_msicfg msicfg; |
| 34 | }; |
| 35 | |
| 36 | void aplic_irq_unmask(struct irq_data *d); |
| 37 | void aplic_irq_mask(struct irq_data *d); |
| 38 | int aplic_irq_set_type(struct irq_data *d, unsigned int type); |
| 39 | int aplic_irqdomain_translate(struct irq_fwspec *fwspec, u32 gsi_base, |
| 40 | unsigned long *hwirq, unsigned int *type); |
| 41 | void aplic_init_hw_global(struct aplic_priv *priv, bool msi_mode); |
| 42 | int aplic_setup_priv(struct aplic_priv *priv, struct device *dev, void __iomem *regs); |
| 43 | int aplic_direct_setup(struct device *dev, void __iomem *regs); |
| 44 | #ifdef CONFIG_RISCV_APLIC_MSI |
| 45 | int aplic_msi_setup(struct device *dev, void __iomem *regs); |
| 46 | #else |
| 47 | static inline int aplic_msi_setup(struct device *dev, void __iomem *regs) |
| 48 | { |
| 49 | return -ENODEV; |
| 50 | } |
| 51 | #endif |
| 52 | |
| 53 | #endif |
| 54 | |