| 1 | /* SPDX-License-Identifier: MIT */ |
|---|---|
| 2 | /* |
| 3 | * Copyright © 2025 Intel Corporation |
| 4 | */ |
| 5 | #ifndef _XE_CONFIGFS_H_ |
| 6 | #define _XE_CONFIGFS_H_ |
| 7 | |
| 8 | #include <linux/limits.h> |
| 9 | #include <linux/types.h> |
| 10 | |
| 11 | #include <xe_hw_engine_types.h> |
| 12 | |
| 13 | struct pci_dev; |
| 14 | |
| 15 | #if IS_ENABLED(CONFIG_CONFIGFS_FS) |
| 16 | int xe_configfs_init(void); |
| 17 | void xe_configfs_exit(void); |
| 18 | void xe_configfs_check_device(struct pci_dev *pdev); |
| 19 | bool xe_configfs_get_survivability_mode(struct pci_dev *pdev); |
| 20 | bool xe_configfs_primary_gt_allowed(struct pci_dev *pdev); |
| 21 | bool xe_configfs_media_gt_allowed(struct pci_dev *pdev); |
| 22 | u64 xe_configfs_get_engines_allowed(struct pci_dev *pdev); |
| 23 | bool xe_configfs_get_psmi_enabled(struct pci_dev *pdev); |
| 24 | u32 xe_configfs_get_ctx_restore_mid_bb(struct pci_dev *pdev, enum xe_engine_class, |
| 25 | const u32 **cs); |
| 26 | u32 xe_configfs_get_ctx_restore_post_bb(struct pci_dev *pdev, enum xe_engine_class, |
| 27 | const u32 **cs); |
| 28 | #ifdef CONFIG_PCI_IOV |
| 29 | unsigned int xe_configfs_get_max_vfs(struct pci_dev *pdev); |
| 30 | #endif |
| 31 | #else |
| 32 | static inline int xe_configfs_init(void) { return 0; } |
| 33 | static inline void xe_configfs_exit(void) { } |
| 34 | static inline void xe_configfs_check_device(struct pci_dev *pdev) { } |
| 35 | static inline bool xe_configfs_get_survivability_mode(struct pci_dev *pdev) { return false; } |
| 36 | static inline bool xe_configfs_primary_gt_allowed(struct pci_dev *pdev) { return true; } |
| 37 | static inline bool xe_configfs_media_gt_allowed(struct pci_dev *pdev) { return true; } |
| 38 | static inline u64 xe_configfs_get_engines_allowed(struct pci_dev *pdev) { return U64_MAX; } |
| 39 | static inline bool xe_configfs_get_psmi_enabled(struct pci_dev *pdev) { return false; } |
| 40 | static inline u32 xe_configfs_get_ctx_restore_mid_bb(struct pci_dev *pdev, enum xe_engine_class, |
| 41 | const u32 **cs) { return 0; } |
| 42 | static inline u32 xe_configfs_get_ctx_restore_post_bb(struct pci_dev *pdev, enum xe_engine_class, |
| 43 | const u32 **cs) { return 0; } |
| 44 | static inline unsigned int xe_configfs_get_max_vfs(struct pci_dev *pdev) { return UINT_MAX; } |
| 45 | #endif |
| 46 | |
| 47 | #endif |
| 48 |