| 1 | /* SPDX-License-Identifier: MIT */ |
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| 2 | /* |
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| 3 | * Copyright © 2020 Intel Corporation |
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| 4 | */ |
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| 5 | |
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| 6 | #ifndef __INTEL_DRAM_H__ |
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| 7 | #define __INTEL_DRAM_H__ |
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| 8 | |
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| 9 | #include <linux/types.h> |
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| 10 | |
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| 11 | struct drm_i915_private; |
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| 12 | struct drm_device; |
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| 13 | |
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| 14 | struct dram_info { |
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| 15 | enum intel_dram_type { |
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| 16 | INTEL_DRAM_UNKNOWN, |
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| 17 | INTEL_DRAM_DDR2, |
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| 18 | INTEL_DRAM_DDR3, |
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| 19 | INTEL_DRAM_DDR4, |
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| 20 | INTEL_DRAM_LPDDR3, |
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| 21 | INTEL_DRAM_LPDDR4, |
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| 22 | INTEL_DRAM_DDR5, |
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| 23 | INTEL_DRAM_LPDDR5, |
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| 24 | INTEL_DRAM_GDDR, |
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| 25 | INTEL_DRAM_GDDR_ECC, |
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| 26 | __INTEL_DRAM_TYPE_MAX, |
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| 27 | } type; |
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| 28 | unsigned int fsb_freq; |
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| 29 | unsigned int mem_freq; |
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| 30 | u8 num_channels; |
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| 31 | u8 num_qgv_points; |
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| 32 | u8 num_psf_gv_points; |
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| 33 | bool ecc_impacting_de_bw; /* Only valid from Xe3p_LPD onward. */ |
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| 34 | bool symmetric_memory; |
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| 35 | bool has_16gb_dimms; |
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| 36 | }; |
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| 37 | |
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| 38 | void intel_dram_edram_detect(struct drm_i915_private *i915); |
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| 39 | int intel_dram_detect(struct drm_i915_private *i915); |
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| 40 | unsigned int intel_fsb_freq(struct drm_i915_private *i915); |
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| 41 | unsigned int intel_mem_freq(struct drm_i915_private *i915); |
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| 42 | const struct dram_info *intel_dram_info(struct drm_device *drm); |
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| 43 | const char *intel_dram_type_str(enum intel_dram_type type); |
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| 44 | |
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| 45 | #endif /* __INTEL_DRAM_H__ */ |
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| 46 | |
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