| 1 | /* SPDX-License-Identifier: MIT */ |
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| 2 | /* |
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| 3 | * Copyright © 2013-2021 Intel Corporation |
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| 4 | */ |
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| 5 | |
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| 6 | #ifndef _INTEL_PCODE_H_ |
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| 7 | #define _INTEL_PCODE_H_ |
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| 8 | |
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| 9 | #include <linux/types.h> |
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| 10 | |
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| 11 | struct drm_device; |
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| 12 | struct intel_uncore; |
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| 13 | |
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| 14 | int snb_pcode_read(struct intel_uncore *uncore, u32 mbox, u32 *val, u32 *val1); |
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| 15 | int snb_pcode_write_timeout(struct intel_uncore *uncore, u32 mbox, u32 val, int timeout_ms); |
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| 16 | #define snb_pcode_write(uncore, mbox, val) \ |
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| 17 | snb_pcode_write_timeout((uncore), (mbox), (val), 1) |
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| 18 | |
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| 19 | int skl_pcode_request(struct intel_uncore *uncore, u32 mbox, u32 request, |
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| 20 | u32 reply_mask, u32 reply, int timeout_base_ms); |
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| 21 | |
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| 22 | int intel_pcode_init(struct intel_uncore *uncore); |
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| 23 | |
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| 24 | /* |
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| 25 | * Helpers for dGfx PCODE mailbox command formatting |
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| 26 | */ |
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| 27 | int snb_pcode_read_p(struct intel_uncore *uncore, u32 mbcmd, u32 p1, u32 p2, u32 *val); |
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| 28 | int snb_pcode_write_p(struct intel_uncore *uncore, u32 mbcmd, u32 p1, u32 p2, u32 val); |
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| 29 | |
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| 30 | /* Helpers with drm device */ |
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| 31 | int intel_pcode_read(struct drm_device *drm, u32 mbox, u32 *val, u32 *val1); |
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| 32 | int intel_pcode_write_timeout(struct drm_device *drm, u32 mbox, u32 val, int timeout_ms); |
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| 33 | #define intel_pcode_write(drm, mbox, val) \ |
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| 34 | intel_pcode_write_timeout((drm), (mbox), (val), 1) |
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| 35 | |
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| 36 | int intel_pcode_request(struct drm_device *drm, u32 mbox, u32 request, |
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| 37 | u32 reply_mask, u32 reply, int timeout_base_ms); |
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| 38 | |
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| 39 | #endif /* _INTEL_PCODE_H */ |
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| 40 | |
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